Settings for registers of SolidSwitch 2 Click driver. More...

Macros
#define	SOLIDSWITCH2_CHIP_ID 0x56
	SolidSwitch 2 chip ID setting.

#define	SOLIDSWITCH2_CFG_0_OUT7 0x80
	SolidSwitch 2 CFG_0 register setting.

#define	SOLIDSWITCH2_CFG_0_OUT6 0x40

#define	SOLIDSWITCH2_CFG_0_OUT5 0x20

#define	SOLIDSWITCH2_CFG_0_OUT4 0x10

#define	SOLIDSWITCH2_CFG_0_OUT3 0x08

#define	SOLIDSWITCH2_CFG_0_OUT2 0x04

#define	SOLIDSWITCH2_CFG_0_DIS_EN 0x02

#define	SOLIDSWITCH2_CFG_0_NRES_EN 0x01

#define	SOLIDSWITCH2_CFG_1_RST 0x80
	SolidSwitch 2 CFG_1 register setting.

#define	SOLIDSWITCH2_CFG_1_ACT 0x40

#define	SOLIDSWITCH2_CFG_1_PWM_DIV_LED_122p5Hz 0x00

#define	SOLIDSWITCH2_CFG_1_PWM_DIV_LED_245p1Hz 0x01

#define	SOLIDSWITCH2_CFG_1_PWM_DIV_LED_490p2Hz 0x02

#define	SOLIDSWITCH2_CFG_1_PWM_DIV_LED_980p4Hz 0x03

#define	SOLIDSWITCH2_CFG_2_FR_ADJ_NO_FREQ_ADJ 0x00
	SolidSwitch 2 CFG_2 register setting.

#define	SOLIDSWITCH2_CFG_2_FR_ADJ_MINUS_15_PCT 0x04

#define	SOLIDSWITCH2_CFG_2_FR_ADJ_PLUS_15_PCT 0x08

#define	SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_122p5Hz 0x00

#define	SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_245p1Hz 0x01

#define	SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_490p2Hz 0x02

#define	SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_980p4Hz 0x03

#define	SOLIDSWITCH2_OUT7 0x80
	SolidSwitch 2 OUT mask setting.

#define	SOLIDSWITCH2_OUT6 0x40

#define	SOLIDSWITCH2_OUT5 0x20

#define	SOLIDSWITCH2_OUT4 0x10

#define	SOLIDSWITCH2_OUT3 0x08

#define	SOLIDSWITCH2_OUT2 0x04

#define	SOLIDSWITCH2_OUT1 0x02

#define	SOLIDSWITCH2_OUT0 0x01

#define	SOLIDSWITCH2_OUT_NONE 0x00

#define	SOLIDSWITCH2_MAX_DUTY_CYCLE 0xFF
	SolidSwitch 2 duty cycle setting.

#define	SOLIDSWITCH2_MIN_DUTY_CYCLE 0x00

#define	SOLIDSWITCH2_SPI_RW_BIT 0x80
	SolidSwitch 2 SPI frame bits setting.

#define	SOLIDSWITCH2_SPI_ERROR_BIT 0x80

#define	SOLIDSWITCH2_SPI_ERROR_BIT 0x80

#define	SOLIDSWITCH2_ADDRESS_BIT_MASK 0x1F

#define	SOLIDSWITCH2_ODD_PARITY 0x01

#define	SOLIDSWITCH2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
	Data sample selection.

#define	SOLIDSWITCH2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE

Detailed Description

Settings for registers of SolidSwitch 2 Click driver.

Macro Definition Documentation

◆ SOLIDSWITCH2_ADDRESS_BIT_MASK

#define SOLIDSWITCH2_ADDRESS_BIT_MASK 0x1F

◆ SOLIDSWITCH2_CFG_0_DIS_EN

#define SOLIDSWITCH2_CFG_0_DIS_EN 0x02

◆ SOLIDSWITCH2_CFG_0_NRES_EN

#define SOLIDSWITCH2_CFG_0_NRES_EN 0x01

◆ SOLIDSWITCH2_CFG_0_OUT2

#define SOLIDSWITCH2_CFG_0_OUT2 0x04

◆ SOLIDSWITCH2_CFG_0_OUT3

#define SOLIDSWITCH2_CFG_0_OUT3 0x08

◆ SOLIDSWITCH2_CFG_0_OUT4

#define SOLIDSWITCH2_CFG_0_OUT4 0x10

◆ SOLIDSWITCH2_CFG_0_OUT5

#define SOLIDSWITCH2_CFG_0_OUT5 0x20

◆ SOLIDSWITCH2_CFG_0_OUT6

#define SOLIDSWITCH2_CFG_0_OUT6 0x40

◆ SOLIDSWITCH2_CFG_0_OUT7

#define SOLIDSWITCH2_CFG_0_OUT7 0x80

SolidSwitch 2 CFG_0 register setting.

Specified setting for CFG_0 register of SolidSwitch 2 Click driver.

◆ SOLIDSWITCH2_CFG_1_ACT

#define SOLIDSWITCH2_CFG_1_ACT 0x40

◆ SOLIDSWITCH2_CFG_1_PWM_DIV_LED_122p5Hz

#define SOLIDSWITCH2_CFG_1_PWM_DIV_LED_122p5Hz 0x00

◆ SOLIDSWITCH2_CFG_1_PWM_DIV_LED_245p1Hz

#define SOLIDSWITCH2_CFG_1_PWM_DIV_LED_245p1Hz 0x01

◆ SOLIDSWITCH2_CFG_1_PWM_DIV_LED_490p2Hz

#define SOLIDSWITCH2_CFG_1_PWM_DIV_LED_490p2Hz 0x02

◆ SOLIDSWITCH2_CFG_1_PWM_DIV_LED_980p4Hz

#define SOLIDSWITCH2_CFG_1_PWM_DIV_LED_980p4Hz 0x03

◆ SOLIDSWITCH2_CFG_1_RST

#define SOLIDSWITCH2_CFG_1_RST 0x80

SolidSwitch 2 CFG_1 register setting.

Specified setting for CFG_1 register of SolidSwitch 2 Click driver.

◆ SOLIDSWITCH2_CFG_2_FR_ADJ_MINUS_15_PCT

#define SOLIDSWITCH2_CFG_2_FR_ADJ_MINUS_15_PCT 0x04

◆ SOLIDSWITCH2_CFG_2_FR_ADJ_NO_FREQ_ADJ

#define SOLIDSWITCH2_CFG_2_FR_ADJ_NO_FREQ_ADJ 0x00

SolidSwitch 2 CFG_2 register setting.

Specified setting for CFG_2 register of SolidSwitch 2 Click driver.

◆ SOLIDSWITCH2_CFG_2_FR_ADJ_PLUS_15_PCT

#define SOLIDSWITCH2_CFG_2_FR_ADJ_PLUS_15_PCT 0x08

◆ SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_122p5Hz

#define SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_122p5Hz 0x00

◆ SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_245p1Hz

#define SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_245p1Hz 0x01

◆ SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_490p2Hz

#define SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_490p2Hz 0x02

◆ SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_980p4Hz

#define SOLIDSWITCH2_CFG_2_PWM_DIV_GEN_980p4Hz 0x03

◆ SOLIDSWITCH2_CHIP_ID

#define SOLIDSWITCH2_CHIP_ID 0x56

SolidSwitch 2 chip ID setting.

Specified setting for chip ID of SolidSwitch 2 Click driver.

◆ SOLIDSWITCH2_MAX_DUTY_CYCLE

#define SOLIDSWITCH2_MAX_DUTY_CYCLE 0xFF

SolidSwitch 2 duty cycle setting.

Specified setting for duty cycle of SolidSwitch 2 Click driver.

◆ SOLIDSWITCH2_MIN_DUTY_CYCLE

#define SOLIDSWITCH2_MIN_DUTY_CYCLE 0x00

◆ SOLIDSWITCH2_ODD_PARITY

#define SOLIDSWITCH2_ODD_PARITY 0x01

◆ SOLIDSWITCH2_OUT0

#define SOLIDSWITCH2_OUT0 0x01

◆ SOLIDSWITCH2_OUT1

#define SOLIDSWITCH2_OUT1 0x02

◆ SOLIDSWITCH2_OUT2

#define SOLIDSWITCH2_OUT2 0x04

◆ SOLIDSWITCH2_OUT3

#define SOLIDSWITCH2_OUT3 0x08

◆ SOLIDSWITCH2_OUT4

#define SOLIDSWITCH2_OUT4 0x10

◆ SOLIDSWITCH2_OUT5

#define SOLIDSWITCH2_OUT5 0x20

◆ SOLIDSWITCH2_OUT6

#define SOLIDSWITCH2_OUT6 0x40

◆ SOLIDSWITCH2_OUT7

#define SOLIDSWITCH2_OUT7 0x80

SolidSwitch 2 OUT mask setting.

Specified setting for OUT mask of SolidSwitch 2 Click driver.

◆ SOLIDSWITCH2_OUT_NONE

#define SOLIDSWITCH2_OUT_NONE 0x00

◆ SOLIDSWITCH2_SET_DATA_SAMPLE_EDGE

#define SOLIDSWITCH2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note: Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with solidswitch2_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ SOLIDSWITCH2_SET_DATA_SAMPLE_MIDDLE

#define SOLIDSWITCH2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE

◆ SOLIDSWITCH2_SPI_ERROR_BIT [1/2]

#define SOLIDSWITCH2_SPI_ERROR_BIT 0x80

◆ SOLIDSWITCH2_SPI_ERROR_BIT [2/2]