sqiflash 2.0.0.0
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API for configuring and manipulating SQI FLASH Click driver. More...
Topics | |
SQI FLASH Registers Settings | |
Settings for registers of SQI FLASH Click driver. | |
SQI FLASH MikroBUS Map | |
MikroBUS pin mapping of SQI FLASH Click driver. | |
Functions | |
void | sqiflash_cfg_setup (sqiflash_cfg_t *cfg) |
SQI FLASH configuration object setup function. | |
err_t | sqiflash_init (sqiflash_t *ctx, sqiflash_cfg_t *cfg) |
SQI FLASH initialization function. | |
err_t | sqiflash_generic_write (sqiflash_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len) |
SQI FLASH data writing function. | |
err_t | sqiflash_generic_read (sqiflash_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len) |
SQI FLASH data reading function. | |
uint8_t | sqiflash_busy (sqiflash_t *ctx) |
SQI FLASH Busy. | |
uint8_t | sqiflash_get_status_reg (sqiflash_t *ctx) |
SQI FLASH Get Status Register. | |
uint8_t | sqiflash_erase_status (sqiflash_t *ctx) |
SQI FLASH Erase Status. | |
uint8_t | sqiflash_write_status (sqiflash_t *ctx) |
SQI FLASH Write Status. | |
uint8_t | sqiflash_program_status (sqiflash_t *ctx) |
SQI FLASH Program Status. | |
uint8_t | sqiflash_protect_status (sqiflash_t *ctx) |
SQI FLASH Protect Status. | |
void | sqiflash_lock_security_id (sqiflash_t *ctx) |
SQI FLASH Lock Security Status. | |
uint8_t | sqiflash_security_status (sqiflash_t *ctx) |
SQI FLASH Security Status. | |
void | sqiflash_write_protect_enable (sqiflash_t *ctx) |
SQI FLASH Write Protect Enable . | |
void | sqiflash_write_protect_disable (sqiflash_t *ctx) |
SQI FLASH Write Protect Disable. | |
void | sqiflash_hold_enable (sqiflash_t *ctx) |
SQI FLASH Hold Enable. | |
void | sqiflash_hold_disable (sqiflash_t *ctx) |
SQI FLASH Hold Disable. | |
void | sqiflash_write_suspend (sqiflash_t *ctx) |
SQI FLASH Write Suspend. | |
void | sqiflash_write_resume (sqiflash_t *ctx) |
SQI FLASH Write Resume. | |
void | sqiflash_spi_get_security_id (sqiflash_t *ctx, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Get Security ID SPI. | |
void | sqiflash_sqi_get_security_id (sqiflash_t *ctx, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Get Security ID SQI. | |
void | sqiflash_set_security_id (sqiflash_t *ctx, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Set Security ID. | |
void | sqiflash_write_disable (sqiflash_t *ctx) |
SQI FLASH Write Disable. | |
void | sqiflash_spi_get_bpr (sqiflash_t *ctx, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Get Block Protection Register SPI. | |
void | sqiflash_sqi_get_bpr (sqiflash_t *ctx, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Get Block Protection Register SQI. | |
void | sqiflash_set_bpr (sqiflash_t *ctx, uint8_t *buffer) |
SQI FLASH Set Block Protection Register. | |
void | sqiflash_lock_bpr (sqiflash_t *ctx) |
SQI FLASH Lock Block Protection Register. | |
void | sqiflash_nonvolatile_write_lock (sqiflash_t *ctx, uint8_t *buffer) |
SQI FLASH Non-Volatile Write-Lock. | |
void | sqiflash_global_block_unlock (sqiflash_t *ctx) |
SQI FLASH Global Block Unlock. | |
void | sqiflash_read_generic (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Read. | |
void | sqiflash_highspeed_r_read (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH High Speed Read. | |
void | sqiflash_quad_write (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Quad Write. | |
void | sqiflash_write_generic (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Write. | |
void | sqiflash_quad_enable (sqiflash_t *ctx) |
SQI FLASH Quad Enable. | |
void | sqiflash_quad_out_read (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Quad Output Read. | |
void | sqiflash_quad_io_read (sqiflash_t *ctx, uint32_t address, uint8_t mode, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Quad I/O Read. | |
void | sqiflash_quad_reset (sqiflash_t *ctx) |
SQI FLASH Quad Reset. | |
void | sqiflash_set_burst (sqiflash_t *ctx, uint8_t length) |
SQI FLASH Set Burst. | |
void | sqiflash_read_sqi_burst_wrap (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Read Burst with Wrap through SQI. | |
void | sqiflash_read_spi_burst_wrap (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Read Burst with Wrap through SPI. | |
void | sqiflash_read_dual_output (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Read Dual Output. | |
void | sqiflash_read_dual_io (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH Read Dual I/O. | |
void | sqiflash_sector_erase (sqiflash_t *ctx, uint32_t address) |
SQI FLASH Sector Erase. | |
void | sqiflash_block_erase (sqiflash_t *ctx, uint32_t address) |
SQI FLASH Block Erase. | |
void | sqiflash_chip_erase (sqiflash_t *ctx) |
SQI FLASH Chip Erase. | |
void | sqiflash_get_sfdp_params (sqiflash_t *ctx, uint32_t address, uint8_t *buffer, uint32_t data_count) |
SQI FLASH get Serial Flash Discoverable. | |
uint8_t | sqiflash_quad_device_manufac (sqiflash_t *ctx) |
SQI FLASH Quad Device Manufacturer. | |
uint8_t | sqiflash_quad_device_type (sqiflash_t *ctx) |
SQI FLASH Quad Device Type. | |
uint8_t | sqiflash_quad_device_id (sqiflash_t *ctx) |
SQI FLASH Quad Device ID. | |
uint8_t | sqiflash_device_manufac (sqiflash_t *ctx) |
SQI FLASH Device Manufacturer. | |
uint8_t | sqiflash_device_type (sqiflash_t *ctx) |
SQI FLASH Device Type. | |
uint8_t | sqiflash_device_id (sqiflash_t *ctx) |
SQI FLASH Device ID. | |
void | sqiflash_reset (sqiflash_t *ctx) |
SQI FLASH Reset. | |
void | sqiflash_write_status_reg (sqiflash_t *ctx, uint8_t s_reg) |
SQI FLASH Write Status Register. | |
uint8_t | sqiflash_get_config_reg (sqiflash_t *ctx) |
SQI FLASH Get Config Register. | |
void | sqiflash_write_enable (sqiflash_t *ctx) |
SQI FLASH Write Enable. | |
API for configuring and manipulating SQI FLASH Click driver.
Any initialization code needed for MCU to function properly. Do not remove this line or clock might not be set correctly.
void sqiflash_block_erase | ( | sqiflash_t * | ctx, |
uint32_t | address ) |
SQI FLASH Block Erase.
The Block-Erase instruction clears all bits in the selected block to ‘1’. Block sizes can be 8 KByte, 32 KByte or 64 KByte depending on address. A Block-Erase instruction applied to a protected memory area will be ignored.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start block erase from. |
uint8_t sqiflash_busy | ( | sqiflash_t * | ctx | ) |
SQI FLASH Busy.
Checks if click is busy reading/writing.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_cfg_setup | ( | sqiflash_cfg_t * | cfg | ) |
SQI FLASH configuration object setup function.
This function initializes click configuration structure to initial values.
[out] | cfg | : Click configuration structure. See sqiflash_cfg_t object definition for detailed explanation. |
void sqiflash_chip_erase | ( | sqiflash_t * | ctx | ) |
SQI FLASH Chip Erase.
The Chip-Erase instruction clears all bits in the device to ‘1.’ The Chip-Erase instruction is ignored if any of the memory area is protected.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
uint8_t sqiflash_device_id | ( | sqiflash_t * | ctx | ) |
SQI FLASH Device ID.
Using traditional SPI protocol, the JEDEC-ID Read instruction identifies the device as SST26VF064B/ 064BA and the manufacturer as Microchip®.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
uint8_t sqiflash_device_manufac | ( | sqiflash_t * | ctx | ) |
SQI FLASH Device Manufacturer.
Using traditional SPI protocol, the JEDEC-ID Read instruction identifies the device as SST26VF064B/ 064BA and the manufacturer as Microchip®.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
uint8_t sqiflash_device_type | ( | sqiflash_t * | ctx | ) |
SQI FLASH Device Type.
Using traditional SPI protocol, the JEDEC-ID Read instruction identifies the device as SST26VF064B/ 064BA and the manufacturer as Microchip®.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
uint8_t sqiflash_erase_status | ( | sqiflash_t * | ctx | ) |
SQI FLASH Erase Status.
Checks if click erase is suspended.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
err_t sqiflash_generic_read | ( | sqiflash_t * | ctx, |
uint8_t | reg, | ||
uint8_t * | data_out, | ||
uint8_t | len ) |
SQI FLASH data reading function.
This function reads a desired number of data bytes starting from the selected register by using SPI serial interface.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | reg | : Start register address. |
[out] | data_out | : Output read data. |
[in] | len | : Number of bytes to be read. |
0
- Success, -1
- Error. See #err_t definition for detailed explanation. err_t sqiflash_generic_write | ( | sqiflash_t * | ctx, |
uint8_t | reg, | ||
uint8_t * | data_in, | ||
uint8_t | len ) |
SQI FLASH data writing function.
This function writes a desired number of data bytes starting from the selected register by using SPI serial interface.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | reg | : Start register address. |
[in] | data_in | : Data to be written. |
[in] | len | : Number of bytes to be written. |
0
- Success, -1
- Error. See #err_t definition for detailed explanation. uint8_t sqiflash_get_config_reg | ( | sqiflash_t * | ctx | ) |
SQI FLASH Get Config Register.
The Read-Configuration Register command outputs the contents of the Configuration register.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_get_sfdp_params | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH get Serial Flash Discoverable.
The Serial Flash Discoverable Parameters (SFDP) contain information describing the characteristics of the device. This allows device-independent, JEDEC ID- independent, and forward/backward compatible soft- ware support for all future Serial Flash device families.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read data into. |
[in] | data_count | : Amount of bytes to read. |
uint8_t sqiflash_get_status_reg | ( | sqiflash_t * | ctx | ) |
SQI FLASH Get Status Register.
The Read-Status Register command outputs the contents of the Status register.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_global_block_unlock | ( | sqiflash_t * | ctx | ) |
SQI FLASH Global Block Unlock.
The Global Block-Protection Unlock instruction clears all write-protection bits in the Block-Protection register, except for those bits that have been locked down with the nVWLDR command.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_highspeed_r_read | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH High Speed Read.
The High-Speed Read instruction, 0BH, is supported in both SPI bus protocol and SQI protocol. This instruction supports frequencies of up to 104 MHz from 2.7-3.6V and up to 80 MHz from 2.3-3.6V.On power-up, the device is set to use SPI.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read to. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_hold_disable | ( | sqiflash_t * | ctx | ) |
SQI FLASH Hold Disable.
Enables Hold on SQI FLASH Click.
[out] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_hold_enable | ( | sqiflash_t * | ctx | ) |
SQI FLASH Hold Enable.
Enables Hold on SQI FLASH Click.
[out] | ctx | Click object. |
err_t sqiflash_init | ( | sqiflash_t * | ctx, |
sqiflash_cfg_t * | cfg ) |
SQI FLASH initialization function.
This function initializes all necessary pins and peripherals used for this click board.
[out] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | cfg | : Click configuration structure. See sqiflash_cfg_t object definition for detailed explanation. |
0
- Success, -1
- Error. See #err_t definition for detailed explanation. void sqiflash_lock_bpr | ( | sqiflash_t * | ctx | ) |
SQI FLASH Lock Block Protection Register.
The Lock-Down Block-Protection Register instruction prevents changes to the Block-Protection register during device operation. Lock-Down resets after power cycling; this allows the Block-Protection register to be changed.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_lock_security_id | ( | sqiflash_t * | ctx | ) |
SQI FLASH Lock Security Status.
The Lockout Security ID instruction prevents any future changes to the Security ID, and is supported in both SPI and SQI modes.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_nonvolatile_write_lock | ( | sqiflash_t * | ctx, |
uint8_t * | buffer ) |
SQI FLASH Non-Volatile Write-Lock.
The Non-Volatile Write-Lock Lock-Down Register (nVWLDR) instruction controls the ability to change the Write-Lock bits in the Block-Protection register.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | buffer | : Buffer with new values for BPR register. |
uint8_t sqiflash_program_status | ( | sqiflash_t * | ctx | ) |
SQI FLASH Program Status.
Checks if click write-program is suspended.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
0
- Write program not suspended. 1
- Write program suspended. uint8_t sqiflash_protect_status | ( | sqiflash_t * | ctx | ) |
SQI FLASH Protect Status.
Checks if click write-protect lock-down is suspended.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
0
- write-protect not suspended 1
- write protect suspended uint8_t sqiflash_quad_device_id | ( | sqiflash_t * | ctx | ) |
SQI FLASH Quad Device ID.
The Read Quad J-ID Read instruction identifies the device as SST26VF064B/064BA and manufacturer as Microchip.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
uint8_t sqiflash_quad_device_manufac | ( | sqiflash_t * | ctx | ) |
SQI FLASH Quad Device Manufacturer.
The Read Quad J-ID Read instruction identifies the device as SST26VF064B/064BA and manufacturer as Microchip.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
uint8_t sqiflash_quad_device_type | ( | sqiflash_t * | ctx | ) |
SQI FLASH Quad Device Type.
The Read Quad J-ID Read instruction identifies the device as SST26VF064B/064BA and manufacturer as Microchip.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_quad_enable | ( | sqiflash_t * | ctx | ) |
SQI FLASH Quad Enable.
The Enable Quad I/O (EQIO) instruction, 38H, enables the flash device for SQI bus operation. Upon comple- tion of the instruction, all instructions thereafter are expected to be 4-bit multiplexed input/output (SQI mode) until a power cycle or a “Reset Quad I/O instruc- tion” is executed.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_quad_io_read | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t | mode, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Quad I/O Read.
The SPI Quad I/O Read (SQIOR) instruction supports frequencies of up to 104 MHz from 2.7-3.6V and up to 80 MHz from 2.3-3.6V. SST26VF064B requires the IOC bit in the configuration register to be set to ‘1’ prior to executing the command.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read to. |
[in] | data_count | : Amount of bytes to read. |
[in] | mode | : Mode to put Quad I/O in. |
void sqiflash_quad_out_read | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Quad Output Read.
The SPI Quad-Output Read instruction supports fre- quencies of up to 104 MHz from 2.7-3.6V and up to 80 MHz from 2.3-3.6V. SST26VF064B requires the IOC bit in the configuration register to be set to ‘1’ prior to exe- cuting the command.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read to. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_quad_reset | ( | sqiflash_t * | ctx | ) |
SQI FLASH Quad Reset.
The Reset Quad I/O instruction, FFH, resets the device to 1-bit SPI protocol operation or exits the Set Mode configuration during a read sequence. This command allows the flash device to return to the default I/O state (SPI) without a power cycle, and executes in either 1- bit or 4-bit mode. If the device is in the Set Mode con- figuration, while in SQI High-Speed Read mode, the RSTQIO command will only return the device to a state where it can accept new command instruction. An addi- tional RSTQIO is required to reset the device to SPI mode.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_quad_write | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Quad Write.
The SPI Quad Page-Program instruction programs up to 256 Bytes of data in the memory. The data for the selected page address must be in the erased state (FFH) before initiating the SPI Quad Page-Program operation. A SPI Quad Page-Program applied to a pro- tected memory area will be ignored. SST26VF064B requires the ICO bit in the configuration register to be set to ‘1’ prior to executing the command.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start write at. |
[in] | buffer | : Buffer with data to write. |
[in] | data_count | : Amount of bytes to write. |
void sqiflash_read_dual_io | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Read Dual I/O.
Following the Set Mode configuration bits, the SST26VF064B/064BA outputs data from the specified address location. The device continually streams data output through all addresses until terminated by a low- to-high transition on CE#.
The Set Mode Configuration bit M[7:0] indicates if the next instruction cycle is another SPI Dual I/O Read command. When M[7:0] = AXH, the device expects the next continuous instruction to be another SDIOR com- mand, BBH, and does not require the op-code to be entered again. The host may set the next SDIOR cycle by driving CE# low, then sending the two-bit wide input for address A[23:0], followed by the Set Mode configu- ration bits M[7:0]. After the Set Mode configuration bits, the device outputs the data starting from the specified address location. There are no restrictions on address location access.
When M[7:0] is any value other than AXH, the device expects the next instruction initiated to be a command instruction. To reset/exit the Set Mode configuration, To reset/exit the Set Mode configuration, execute the Reset Quad I/O command.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read to. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_read_dual_output | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Read Dual Output.
The SPI Dual-Output Read instruction supports fre- quencies of up to 104 MHz from 2.7-3.6V and up to 80 MHz from 2.3-3.6V.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read to. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_read_generic | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Read.
The Read instruction, 03H, is supported in SPI bus pro- tocol only with clock frequencies up to 40 MHz. This command is not supported in SQI bus protocol. The device outputs the data starting from the specified address location, theand Configuration n continuously streams the data output through all addresses until terminated by a low- to-high transition on CE#. The internal address pointer will automatically increment until the highest memory address is reached. Once the highest memory address is reached, the address pointer will automatically return to the beginning (wrap-around) of the address space.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read to. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_read_spi_burst_wrap | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Read Burst with Wrap through SPI.
During RBSPI, the internal address pointer automati- cally increments until the last byte of the burst is reached, then it wraps around to the first byte of the burst. For example, if the burst length is eight Bytes, and the start address is 06h, the burst sequence would be: 06h, 07h, 00h, 01h, 02h, 03h, 04h, 05h, 06h, etc. The pattern repeats until the command is terminated by a low-to-high transition on CE#.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read to. |
[in] | data_count | : Amount of bytes to read. |
8 Bytes 00-07H, 08-0FH, 10-17H, 18-1FH... 16 Bytes 00-0FH, 10-1FH, 20-2FH, 30-3FH... 32 Bytes 00-1FH, 20-3FH, 40-5FH, 60-7FH... 64 Bytes 00-3FH, 40-7FH, 80-BFH, C0-FFH
void sqiflash_read_sqi_burst_wrap | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Read Burst with Wrap through SQI.
During RBSQI, the internal address pointer automati- cally increments until the last byte of the burst is reached, then it wraps around to the first byte of the burst. For example, if the burst length is eight Bytes, and the start address is 06h, the burst sequence would be: 06h, 07h, 00h, 01h, 02h, 03h, 04h, 05h, 06h, etc. The pattern repeats until the command is terminated by a low-to-high transition on CE#.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start reading from. |
[out] | buffer | : Buffer to read to. |
[in] | data_count | : Amount of bytes to read. |
8 Bytes 00-07H, 08-0FH, 10-17H, 18-1FH... 16 Bytes 00-0FH, 10-1FH, 20-2FH, 30-3FH... 32 Bytes 00-1FH, 20-3FH, 40-5FH, 60-7FH... 64 Bytes 00-3FH, 40-7FH, 80-BFH, C0-FFH
void sqiflash_reset | ( | sqiflash_t * | ctx | ) |
SQI FLASH Reset.
The Reset operation is used as a system (software) reset that puts the device in normal operating Ready mode. This operation consists of two commands: Reset-Enable (RSTEN) followed by Reset (RST).
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_sector_erase | ( | sqiflash_t * | ctx, |
uint32_t | address ) |
SQI FLASH Sector Erase.
The Sector-Erase instruction clears all bits in the selected 4 KByte sector to ‘1,’ but it does not change a protected memory area.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start sector erase from. |
uint8_t sqiflash_security_status | ( | sqiflash_t * | ctx | ) |
SQI FLASH Security Status.
Checks if click security ID is locked.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
0
- Security ID not locked. 1
- Security ID locked. void sqiflash_set_bpr | ( | sqiflash_t * | ctx, |
uint8_t * | buffer ) |
SQI FLASH Set Block Protection Register.
The Write Block-Protection Register command changes the Block-Protection register data to indicate the protection status.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | buffer | : Buffer with new BPR register values to write. |
void sqiflash_set_burst | ( | sqiflash_t * | ctx, |
uint8_t | length ) |
SQI FLASH Set Burst.
The Set Burst command specifies the number of bytes to be output during a Read Burst command before the device wraps around. It supports both SPI and SQI pro- tocols.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | length | : Number of data to be read. |
void sqiflash_set_security_id | ( | sqiflash_t * | ctx, |
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Set Security ID.
The Program Security ID instruction programs one to 2040 Bytes of data in the user-programmable, Security ID space. This Security ID space is one-time program- mable (OTP). The device ignores a Program Security ID instruction pointing to an invalid or protected address
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | buffer | : Buffer to write into. |
[in] | data_count | : Amount of bytes to write. |
void sqiflash_spi_get_bpr | ( | sqiflash_t * | ctx, |
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Get Block Protection Register SPI.
The Read Block-Protection Register instruction outputs the Block-Protection register data which determines the protection status.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[out] | buffer | : Buffer to read data into. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_spi_get_security_id | ( | sqiflash_t * | ctx, |
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Get Security ID SPI.
Reads the Unique ID Pre-Programmed at factory.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[out] | buffer | : Buffer to read data into. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_sqi_get_bpr | ( | sqiflash_t * | ctx, |
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Get Block Protection Register SQI.
The Read Block-Protection Register instruction outputs the Block-Protection register data which determines the protection status.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[out] | buffer | : Buffer to read data into. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_sqi_get_security_id | ( | sqiflash_t * | ctx, |
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Get Security ID SQI.
Reads the Unique ID Pre-Programmed at factory
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[out] | buffer | : Buffer to read data into. |
[in] | data_count | : Amount of bytes to read. |
void sqiflash_write_disable | ( | sqiflash_t * | ctx | ) |
SQI FLASH Write Disable.
The Write Disable instruction sets the Write- Enable-Latch bit in the Status register to ‘0,’ not allowing Write operations to occur.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_write_enable | ( | sqiflash_t * | ctx | ) |
SQI FLASH Write Enable.
The Write Enable (WREN) instruction sets the Write- Enable-Latch bit in the Status register to ‘1,’ allowing Write operations to occur.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_write_generic | ( | sqiflash_t * | ctx, |
uint32_t | address, | ||
uint8_t * | buffer, | ||
uint32_t | data_count ) |
SQI FLASH Write.
The Page-Program instruction programs up to 256 Bytes of data in the memory, and supports both SPI and SQI protocols. The data for the selected page address must be in the erased state (FFH) before initi- ating the Page-Program operation. A Page-Program applied to a protected memory area will be ignored.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | address | : Address to start write at. |
[in] | buffer | : Buffer with data to write. |
[in] | data_count | : Amount of bytes to write. |
void sqiflash_write_protect_disable | ( | sqiflash_t * | ctx | ) |
SQI FLASH Write Protect Disable.
Disables Write Protect on SQI FLASH Click.
[out] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_write_protect_enable | ( | sqiflash_t * | ctx | ) |
SQI FLASH Write Protect Enable .
Enables Write Protect on SQI FLASH Click.
[out] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
void sqiflash_write_resume | ( | sqiflash_t * | ctx | ) |
SQI FLASH Write Resume.
Write-Suspend allows the interruption of Sector-Erase, Block-Erase, SPI Quad Page-Program, or Page-Pro- gram operations in order to erase, program, or read data in another portion of memory. The original opera- tion can be continued with the Write-Resume com- mand. This operation is supported in both SQI and SPI protocols. Only one write operation can be suspended at a time; if an operation is already suspended, the device will ignore the Write-Suspend command. Write-Suspend during Chip-Erase is ignored; Chip-Erase is not a valid command while a write is suspended. The Write- Resume command is ignored until any write operation (Program or Erase) initiated during the Write-Suspend is complete. The device requires a minimum of 500 μs between each Write-Suspend command.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
uint8_t sqiflash_write_status | ( | sqiflash_t * | ctx | ) |
SQI FLASH Write Status.
Checks if click write is suspended.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
0
- Write not suspended 1
- Write suspended void sqiflash_write_status_reg | ( | sqiflash_t * | ctx, |
uint8_t | s_reg ) |
SQI FLASH Write Status Register.
The Write-Status Register (WRSR) command writes new values to the Configuration register.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |
[in] | s_reg | : New Conifuration Register Values |
void sqiflash_write_suspend | ( | sqiflash_t * | ctx | ) |
SQI FLASH Write Suspend.
Write-Suspend allows the interruption of Sector-Erase, Block-Erase, SPI Quad Page-Program, or Page-Pro- gram operations in order to erase, program, or read data in another portion of memory. The original opera- tion can be continued with the Write-Resume com- mand. This operation is supported in both SQI and SPI protocols. Only one write operation can be suspended at a time; if an operation is already suspended, the device will ignore the Write-Suspend command. Write-Suspend during Chip-Erase is ignored; Chip-Erase is not a valid command while a write is suspended. The Write- Resume command is ignored until any write operation (Program or Erase) initiated during the Write-Suspend is complete. The device requires a minimum of 500 μs between each Write-Suspend command.
[in] | ctx | : Click context object. See sqiflash_t object definition for detailed explanation. |