List of registers of TDC 2 Click driver. More...

Macros
#define	TDC2_REG_CFG0 0x00
	TDC 2 description register.

#define	TDC2_REG_CFG1 0x01

#define	TDC2_REG_CFG2 0x02

#define	TDC2_REG_CFG3 0x03

#define	TDC2_REG_CFG4 0x04

#define	TDC2_REG_CFG5 0x05

#define	TDC2_REG_CFG6 0x06

#define	TDC2_REG_CFG7 0x07

#define	TDC2_REG_CFG8 0x08

#define	TDC2_REG_CFG9 0x09

#define	TDC2_REG_CFG10 0x0A

#define	TDC2_REG_CFG11 0x0B

#define	TDC2_REG_CFG12 0x0C

#define	TDC2_REG_CFG13 0x0D

#define	TDC2_REG_CFG14 0x0E

#define	TDC2_REG_CFG15 0x0F

#define	TDC2_REG_CFG16 0x10

#define	TDC2_REG_INDEX_CH1_BYTE3 0x08
	TDC 2 data register.

#define	TDC2_REG_INDEX_CH1_BYTE2 0x09

#define	TDC2_REG_INDEX_CH1_BYTE1 0x0A

#define	TDC2_REG_STOP_CH1_BYTE3 0x0B

#define	TDC2_REG_STOP_CH1_BYTE2 0x0C

#define	TDC2_REG_STOP_CH1_BYTE1 0x0D

#define	TDC2_REG_INDEX_CH2_BYTE3 0x0E

#define	TDC2_REG_INDEX_CH2_BYTE2 0x0F

#define	TDC2_REG_INDEX_CH2_BYTE1 0x10

#define	TDC2_REG_STOP_CH2_BYTE3 0x11

#define	TDC2_REG_STOP_CH2_BYTE2 0x12

#define	TDC2_REG_STOP_CH2_BYTE1 0x13

#define	TDC2_REG_INDEX_CH3_BYTE3 0x14

#define	TDC2_REG_INDEX_CH3_BYTE2 0x15

#define	TDC2_REG_INDEX_CH3_BYTE1 0x16

#define	TDC2_REG_STOP_CH3_BYTE3 0x17

#define	TDC2_REG_STOP_CH3_BYTE2 0x18

#define	TDC2_REG_STOP_CH3_BYTE1 0x19

#define	TDC2_REG_INDEX_CH4_BYTE3 0x1A

#define	TDC2_REG_INDEX_CH4_BYTE2 0x1B

#define	TDC2_REG_INDEX_CH4_BYTE1 0x1C

#define	TDC2_REG_STOP_CH4_BYTE3 0x1D

#define	TDC2_REG_STOP_CH4_BYTE2 0x1E

#define	TDC2_REG_STOP_CH4_BYTE1 0x1F

Detailed Description

List of registers of TDC 2 Click driver.

Macro Definition Documentation

◆ TDC2_REG_CFG0

#define TDC2_REG_CFG0 0x00

TDC 2 description register.

Specified register for description of TDC 2 Click driver.

TDC 2 configuration register.

Specified configuration register for description of TDC 2 Click driver.

◆ TDC2_REG_CFG1

#define TDC2_REG_CFG1 0x01

◆ TDC2_REG_CFG10

#define TDC2_REG_CFG10 0x0A

◆ TDC2_REG_CFG11

#define TDC2_REG_CFG11 0x0B

◆ TDC2_REG_CFG12

#define TDC2_REG_CFG12 0x0C

◆ TDC2_REG_CFG13

#define TDC2_REG_CFG13 0x0D

◆ TDC2_REG_CFG14

#define TDC2_REG_CFG14 0x0E

◆ TDC2_REG_CFG15

#define TDC2_REG_CFG15 0x0F

◆ TDC2_REG_CFG16

#define TDC2_REG_CFG16 0x10

◆ TDC2_REG_CFG2

#define TDC2_REG_CFG2 0x02

◆ TDC2_REG_CFG3

#define TDC2_REG_CFG3 0x03

◆ TDC2_REG_CFG4

#define TDC2_REG_CFG4 0x04

◆ TDC2_REG_CFG5

#define TDC2_REG_CFG5 0x05

◆ TDC2_REG_CFG6

#define TDC2_REG_CFG6 0x06

◆ TDC2_REG_CFG7

#define TDC2_REG_CFG7 0x07

◆ TDC2_REG_CFG8

#define TDC2_REG_CFG8 0x08

◆ TDC2_REG_CFG9

#define TDC2_REG_CFG9 0x09

◆ TDC2_REG_INDEX_CH1_BYTE1

#define TDC2_REG_INDEX_CH1_BYTE1 0x0A

◆ TDC2_REG_INDEX_CH1_BYTE2

#define TDC2_REG_INDEX_CH1_BYTE2 0x09

◆ TDC2_REG_INDEX_CH1_BYTE3

#define TDC2_REG_INDEX_CH1_BYTE3 0x08

TDC 2 data register.

Specified data register for description of TDC 2 Click driver.

◆ TDC2_REG_INDEX_CH2_BYTE1

#define TDC2_REG_INDEX_CH2_BYTE1 0x10

◆ TDC2_REG_INDEX_CH2_BYTE2

#define TDC2_REG_INDEX_CH2_BYTE2 0x0F

◆ TDC2_REG_INDEX_CH2_BYTE3

#define TDC2_REG_INDEX_CH2_BYTE3 0x0E

◆ TDC2_REG_INDEX_CH3_BYTE1

#define TDC2_REG_INDEX_CH3_BYTE1 0x16

◆ TDC2_REG_INDEX_CH3_BYTE2

#define TDC2_REG_INDEX_CH3_BYTE2 0x15

◆ TDC2_REG_INDEX_CH3_BYTE3

#define TDC2_REG_INDEX_CH3_BYTE3 0x14

◆ TDC2_REG_INDEX_CH4_BYTE1

#define TDC2_REG_INDEX_CH4_BYTE1 0x1C

◆ TDC2_REG_INDEX_CH4_BYTE2

#define TDC2_REG_INDEX_CH4_BYTE2 0x1B

◆ TDC2_REG_INDEX_CH4_BYTE3

#define TDC2_REG_INDEX_CH4_BYTE3 0x1A

◆ TDC2_REG_STOP_CH1_BYTE1

#define TDC2_REG_STOP_CH1_BYTE1 0x0D

◆ TDC2_REG_STOP_CH1_BYTE2

#define TDC2_REG_STOP_CH1_BYTE2 0x0C

◆ TDC2_REG_STOP_CH1_BYTE3

#define TDC2_REG_STOP_CH1_BYTE3 0x0B

◆ TDC2_REG_STOP_CH2_BYTE1

#define TDC2_REG_STOP_CH2_BYTE1 0x13

◆ TDC2_REG_STOP_CH2_BYTE2

#define TDC2_REG_STOP_CH2_BYTE2 0x12

◆ TDC2_REG_STOP_CH2_BYTE3

#define TDC2_REG_STOP_CH2_BYTE3 0x11

◆ TDC2_REG_STOP_CH3_BYTE1

#define TDC2_REG_STOP_CH3_BYTE1 0x19

◆ TDC2_REG_STOP_CH3_BYTE2

#define TDC2_REG_STOP_CH3_BYTE2 0x18

◆ TDC2_REG_STOP_CH3_BYTE3

#define TDC2_REG_STOP_CH3_BYTE3 0x17

◆ TDC2_REG_STOP_CH4_BYTE1

#define TDC2_REG_STOP_CH4_BYTE1 0x1F

◆ TDC2_REG_STOP_CH4_BYTE2

#define TDC2_REG_STOP_CH4_BYTE2 0x1E

◆ TDC2_REG_STOP_CH4_BYTE3

#define TDC2_REG_STOP_CH4_BYTE3 0x1D

Macros