tdc2 2.1.0.0
TDC 2 Registers Settings

Settings for registers of TDC 2 Click driver. More...

Macros

#define TDC2_SPIOPC_POWER   0x30
 TDC 2 description setting.
 
#define TDC2_SPIOPC_INIT   0x18
 
#define TDC2_SPIOPC_WRITE_CONFIG   0x80
 
#define TDC2_SPIOPC_READ_CONFIG   0x40
 
#define TDC2_SPIOPC_READ_RESULTS   0x60
 
#define TDC2_SPIOPC_READ_RESULTS   0x60
 
#define TDC2_ENABLE_STOP1_PIN   0x01
 TDC 2 CFG0 register description setting.
 
#define TDC2_DISABLE_STOP1_PIN   0x00
 
#define TDC2_ENABLE_STOP2_PIN   0x02
 
#define TDC2_DISABLE_STOP2_PIN   0x00
 
#define TDC2_ENABLE_STOP3_PIN   0x04
 
#define TDC2_DISABLE_STOP3_PIN   0x00
 
#define TDC2_ENABLE_STOP4_PIN   0x08
 
#define TDC2_DISABLE_STOP4_PIN   0x00
 
#define TDC2_ENABLE_REFCLK_PIN   0x10
 
#define TDC2_DISABLE_REFCLK_PIN   0x00
 
#define TDC2_ENABLE_DISABLE_PIN   0x40
 
#define TDC2_DISABLE_DISABLE_PIN   0x00
 
#define TDC2_ENABLE_RSTINDX_PIN   0x80
 
#define TDC2_DISABLE_RSTINDX_PIN   0x00
 
#define TDC2_HIT_ENABLE_STOP1   0x01
 TDC 2 CFG1 register description setting.
 
#define TDC2_HIT_DISABLE_STOP1   0x00
 
#define TDC2_HIT_ENABLE_STOP2   0x02
 
#define TDC2_HIT_DISABLE_STOP2   0x00
 
#define TDC2_HIT_ENABLE_STOP3   0x04
 
#define TDC2_HIT_DISABLE_STOP3   0x00
 
#define TDC2_HIT_ENABLE_STOP4   0x08
 
#define TDC2_HIT_DISABLE_STOP4   0x00
 
#define TDC2_CHANNEL_COMBINE_NORMAL   0x00
 
#define TDC2_CHANNEL_COMBINE_PULSE_DISTANCE   0x10
 
#define TDC2_CHANNEL_COMBINE_PULSE_WIDTH   0x20
 
#define TDC2_HIGH_RESOLUTION_OFF   0x00
 
#define TDC2_HIGH_RESOLUTION_X2   0x40
 
#define TDC2_HIGH_RESOLUTION_X4   0x80
 
#define TDC2_FIFO_COMMON_READ_OFF   0x00
 TDC 2 CFG2 register description setting.
 
#define TDC2_FIFO_COMMON_READ_ON   0x40
 
#define TDC2_FIFO_BLOCKWISE_READ_OFF   0x00
 
#define TDC2_FIFO_BLOCKWISE_READ_ON   0x80
 
#define TDC2_CFG6_FIXED_VALUE   0xC0
 TDC 2 fixed value registers description setting.
 
#define TDC2_CFG8_FIXED_VALUE   0xA1
 
#define TDC2_CFG9_FIXED_VALUE   0x13
 
#define TDC2_CFG10_FIXED_VALUE   0x00
 
#define TDC2_CFG11_FIXED_VALUE   0x0A
 
#define TDC2_CFG12_FIXED_VALUE   0xCC
 
#define TDC2_CFG13_FIXED_VALUE   0x05
 
#define TDC2_CFG14_FIXED_VALUE   0xF1
 
#define TDC2_CFG15_FIXED_VALUE   0x7D
 
#define TDC2_CFG16_FIXED_VALUE   0x04
 
#define TDC2_CFG7_FIXED_VALUE   0x23
 TDC 2 CFG7 register description setting.
 
#define TDC2_REFERENCE_CLOCK_INTERNAL   0x80
 
#define TDC2_REFERENCE_CLOCK_EXTERNAL   0x00
 
#define TDC2_1pS_RESOLUTION   125000
 TDC 2 resolution setting.
 
#define TDC2_5pS_RESOLUTION   62500
 
#define TDC2_10pS_RESOLUTION   12500
 
#define TDC2_uS_TO_mS   1000000
 
#define TDC2_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
 Data sample selection.
 
#define TDC2_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE
 

Detailed Description

Settings for registers of TDC 2 Click driver.

Macro Definition Documentation

◆ TDC2_10pS_RESOLUTION

#define TDC2_10pS_RESOLUTION   12500

◆ TDC2_1pS_RESOLUTION

#define TDC2_1pS_RESOLUTION   125000

TDC 2 resolution setting.

Specified setting for resolution of TDC 2 Click driver.

◆ TDC2_5pS_RESOLUTION

#define TDC2_5pS_RESOLUTION   62500

◆ TDC2_CFG10_FIXED_VALUE

#define TDC2_CFG10_FIXED_VALUE   0x00

◆ TDC2_CFG11_FIXED_VALUE

#define TDC2_CFG11_FIXED_VALUE   0x0A

◆ TDC2_CFG12_FIXED_VALUE

#define TDC2_CFG12_FIXED_VALUE   0xCC

◆ TDC2_CFG13_FIXED_VALUE

#define TDC2_CFG13_FIXED_VALUE   0x05

◆ TDC2_CFG14_FIXED_VALUE

#define TDC2_CFG14_FIXED_VALUE   0xF1

◆ TDC2_CFG15_FIXED_VALUE

#define TDC2_CFG15_FIXED_VALUE   0x7D

◆ TDC2_CFG16_FIXED_VALUE

#define TDC2_CFG16_FIXED_VALUE   0x04

◆ TDC2_CFG6_FIXED_VALUE

#define TDC2_CFG6_FIXED_VALUE   0xC0

TDC 2 fixed value registers description setting.

Specified setting for fixed value registers of TDC 2 Click driver.

◆ TDC2_CFG7_FIXED_VALUE

#define TDC2_CFG7_FIXED_VALUE   0x23

TDC 2 CFG7 register description setting.

Specified setting for CFG7 register of TDC 2 Click driver.

◆ TDC2_CFG8_FIXED_VALUE

#define TDC2_CFG8_FIXED_VALUE   0xA1

◆ TDC2_CFG9_FIXED_VALUE

#define TDC2_CFG9_FIXED_VALUE   0x13

◆ TDC2_CHANNEL_COMBINE_NORMAL

#define TDC2_CHANNEL_COMBINE_NORMAL   0x00

◆ TDC2_CHANNEL_COMBINE_PULSE_DISTANCE

#define TDC2_CHANNEL_COMBINE_PULSE_DISTANCE   0x10

◆ TDC2_CHANNEL_COMBINE_PULSE_WIDTH

#define TDC2_CHANNEL_COMBINE_PULSE_WIDTH   0x20

◆ TDC2_DISABLE_DISABLE_PIN

#define TDC2_DISABLE_DISABLE_PIN   0x00

◆ TDC2_DISABLE_REFCLK_PIN

#define TDC2_DISABLE_REFCLK_PIN   0x00

◆ TDC2_DISABLE_RSTINDX_PIN

#define TDC2_DISABLE_RSTINDX_PIN   0x00

◆ TDC2_DISABLE_STOP1_PIN

#define TDC2_DISABLE_STOP1_PIN   0x00

◆ TDC2_DISABLE_STOP2_PIN

#define TDC2_DISABLE_STOP2_PIN   0x00

◆ TDC2_DISABLE_STOP3_PIN

#define TDC2_DISABLE_STOP3_PIN   0x00

◆ TDC2_DISABLE_STOP4_PIN

#define TDC2_DISABLE_STOP4_PIN   0x00

◆ TDC2_ENABLE_DISABLE_PIN

#define TDC2_ENABLE_DISABLE_PIN   0x40

◆ TDC2_ENABLE_REFCLK_PIN

#define TDC2_ENABLE_REFCLK_PIN   0x10

◆ TDC2_ENABLE_RSTINDX_PIN

#define TDC2_ENABLE_RSTINDX_PIN   0x80

◆ TDC2_ENABLE_STOP1_PIN

#define TDC2_ENABLE_STOP1_PIN   0x01

TDC 2 CFG0 register description setting.

Specified setting for CFG0 register of TDC 2 Click driver.

◆ TDC2_ENABLE_STOP2_PIN

#define TDC2_ENABLE_STOP2_PIN   0x02

◆ TDC2_ENABLE_STOP3_PIN

#define TDC2_ENABLE_STOP3_PIN   0x04

◆ TDC2_ENABLE_STOP4_PIN

#define TDC2_ENABLE_STOP4_PIN   0x08

◆ TDC2_FIFO_BLOCKWISE_READ_OFF

#define TDC2_FIFO_BLOCKWISE_READ_OFF   0x00

◆ TDC2_FIFO_BLOCKWISE_READ_ON

#define TDC2_FIFO_BLOCKWISE_READ_ON   0x80

◆ TDC2_FIFO_COMMON_READ_OFF

#define TDC2_FIFO_COMMON_READ_OFF   0x00

TDC 2 CFG2 register description setting.

Specified setting for CFG2 register of TDC 2 Click driver.

◆ TDC2_FIFO_COMMON_READ_ON

#define TDC2_FIFO_COMMON_READ_ON   0x40

◆ TDC2_HIGH_RESOLUTION_OFF

#define TDC2_HIGH_RESOLUTION_OFF   0x00

◆ TDC2_HIGH_RESOLUTION_X2

#define TDC2_HIGH_RESOLUTION_X2   0x40

◆ TDC2_HIGH_RESOLUTION_X4

#define TDC2_HIGH_RESOLUTION_X4   0x80

◆ TDC2_HIT_DISABLE_STOP1

#define TDC2_HIT_DISABLE_STOP1   0x00

◆ TDC2_HIT_DISABLE_STOP2

#define TDC2_HIT_DISABLE_STOP2   0x00

◆ TDC2_HIT_DISABLE_STOP3

#define TDC2_HIT_DISABLE_STOP3   0x00

◆ TDC2_HIT_DISABLE_STOP4

#define TDC2_HIT_DISABLE_STOP4   0x00

◆ TDC2_HIT_ENABLE_STOP1

#define TDC2_HIT_ENABLE_STOP1   0x01

TDC 2 CFG1 register description setting.

Specified setting for CFG1 register of TDC 2 Click driver.

◆ TDC2_HIT_ENABLE_STOP2

#define TDC2_HIT_ENABLE_STOP2   0x02

◆ TDC2_HIT_ENABLE_STOP3

#define TDC2_HIT_ENABLE_STOP3   0x04

◆ TDC2_HIT_ENABLE_STOP4

#define TDC2_HIT_ENABLE_STOP4   0x08

◆ TDC2_REFERENCE_CLOCK_EXTERNAL

#define TDC2_REFERENCE_CLOCK_EXTERNAL   0x00

◆ TDC2_REFERENCE_CLOCK_INTERNAL

#define TDC2_REFERENCE_CLOCK_INTERNAL   0x80

◆ TDC2_SET_DATA_SAMPLE_EDGE

#define TDC2_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note
Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with tdc2_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ TDC2_SET_DATA_SAMPLE_MIDDLE

#define TDC2_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

◆ TDC2_SPIOPC_INIT

#define TDC2_SPIOPC_INIT   0x18

◆ TDC2_SPIOPC_POWER

#define TDC2_SPIOPC_POWER   0x30

TDC 2 description setting.

Specified setting for description of TDC 2 Click driver.

TDC 2 commands.

Specified commands of TDC 2 Click driver.

◆ TDC2_SPIOPC_READ_CONFIG

#define TDC2_SPIOPC_READ_CONFIG   0x40

◆ TDC2_SPIOPC_READ_RESULTS [1/2]

#define TDC2_SPIOPC_READ_RESULTS   0x60

◆ TDC2_SPIOPC_READ_RESULTS [2/2]

#define TDC2_SPIOPC_READ_RESULTS   0x60

◆ TDC2_SPIOPC_WRITE_CONFIG

#define TDC2_SPIOPC_WRITE_CONFIG   0x80

◆ TDC2_uS_TO_mS

#define TDC2_uS_TO_mS   1000000