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#define | TDC2_SPIOPC_POWER 0x30 |
| TDC 2 description setting.
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#define | TDC2_SPIOPC_INIT 0x18 |
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#define | TDC2_SPIOPC_WRITE_CONFIG 0x80 |
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#define | TDC2_SPIOPC_READ_CONFIG 0x40 |
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#define | TDC2_SPIOPC_READ_RESULTS 0x60 |
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#define | TDC2_SPIOPC_READ_RESULTS 0x60 |
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#define | TDC2_ENABLE_STOP1_PIN 0x01 |
| TDC 2 CFG0 register description setting.
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#define | TDC2_DISABLE_STOP1_PIN 0x00 |
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#define | TDC2_ENABLE_STOP2_PIN 0x02 |
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#define | TDC2_DISABLE_STOP2_PIN 0x00 |
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#define | TDC2_ENABLE_STOP3_PIN 0x04 |
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#define | TDC2_DISABLE_STOP3_PIN 0x00 |
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#define | TDC2_ENABLE_STOP4_PIN 0x08 |
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#define | TDC2_DISABLE_STOP4_PIN 0x00 |
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#define | TDC2_ENABLE_REFCLK_PIN 0x10 |
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#define | TDC2_DISABLE_REFCLK_PIN 0x00 |
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#define | TDC2_ENABLE_DISABLE_PIN 0x40 |
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#define | TDC2_DISABLE_DISABLE_PIN 0x00 |
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#define | TDC2_ENABLE_RSTINDX_PIN 0x80 |
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#define | TDC2_DISABLE_RSTINDX_PIN 0x00 |
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#define | TDC2_HIT_ENABLE_STOP1 0x01 |
| TDC 2 CFG1 register description setting.
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#define | TDC2_HIT_DISABLE_STOP1 0x00 |
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#define | TDC2_HIT_ENABLE_STOP2 0x02 |
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#define | TDC2_HIT_DISABLE_STOP2 0x00 |
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#define | TDC2_HIT_ENABLE_STOP3 0x04 |
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#define | TDC2_HIT_DISABLE_STOP3 0x00 |
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#define | TDC2_HIT_ENABLE_STOP4 0x08 |
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#define | TDC2_HIT_DISABLE_STOP4 0x00 |
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#define | TDC2_CHANNEL_COMBINE_NORMAL 0x00 |
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#define | TDC2_CHANNEL_COMBINE_PULSE_DISTANCE 0x10 |
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#define | TDC2_CHANNEL_COMBINE_PULSE_WIDTH 0x20 |
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#define | TDC2_HIGH_RESOLUTION_OFF 0x00 |
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#define | TDC2_HIGH_RESOLUTION_X2 0x40 |
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#define | TDC2_HIGH_RESOLUTION_X4 0x80 |
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#define | TDC2_FIFO_COMMON_READ_OFF 0x00 |
| TDC 2 CFG2 register description setting.
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#define | TDC2_FIFO_COMMON_READ_ON 0x40 |
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#define | TDC2_FIFO_BLOCKWISE_READ_OFF 0x00 |
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#define | TDC2_FIFO_BLOCKWISE_READ_ON 0x80 |
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#define | TDC2_CFG6_FIXED_VALUE 0xC0 |
| TDC 2 fixed value registers description setting.
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#define | TDC2_CFG8_FIXED_VALUE 0xA1 |
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#define | TDC2_CFG9_FIXED_VALUE 0x13 |
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#define | TDC2_CFG10_FIXED_VALUE 0x00 |
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#define | TDC2_CFG11_FIXED_VALUE 0x0A |
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#define | TDC2_CFG12_FIXED_VALUE 0xCC |
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#define | TDC2_CFG13_FIXED_VALUE 0x05 |
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#define | TDC2_CFG14_FIXED_VALUE 0xF1 |
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#define | TDC2_CFG15_FIXED_VALUE 0x7D |
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#define | TDC2_CFG16_FIXED_VALUE 0x04 |
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#define | TDC2_CFG7_FIXED_VALUE 0x23 |
| TDC 2 CFG7 register description setting.
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#define | TDC2_REFERENCE_CLOCK_INTERNAL 0x80 |
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#define | TDC2_REFERENCE_CLOCK_EXTERNAL 0x00 |
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#define | TDC2_1pS_RESOLUTION 125000 |
| TDC 2 resolution setting.
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#define | TDC2_5pS_RESOLUTION 62500 |
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#define | TDC2_10pS_RESOLUTION 12500 |
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#define | TDC2_uS_TO_mS 1000000 |
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#define | TDC2_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
| Data sample selection.
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#define | TDC2_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
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