List of registers of Temp&Hum 16 Click driver. More...

Macros
#define	TEMPHUM16_REG_DEVICE_ID 0x0F
	Temp&Hum 16 description register.

#define	TEMPHUM16_REG_AVERAGE 0x10

#define	TEMPHUM16_REG_CTRL_1 0x20

#define	TEMPHUM16_REG_CTRL_2 0x21

#define	TEMPHUM16_REG_CTRL_3 0x22

#define	TEMPHUM16_REG_STATUS 0x27

#define	TEMPHUM16_REG_H_OUT_L 0x28

#define	TEMPHUM16_REG_H_OUT_H 0x29

#define	TEMPHUM16_REG_T_OUT_L 0x2A

#define	TEMPHUM16_REG_T_OUT_H 0x2B

#define	TEMPHUM16_REG_H0_RH_X2 0x30

#define	TEMPHUM16_REG_H1_RH_X2 0x31

#define	TEMPHUM16_REG_T0_DEGC_X8 0x32

#define	TEMPHUM16_REG_T1_DEGC_X8 0x33

#define	TEMPHUM16_REG_T0_T1_DEGC_H2 0x35

#define	TEMPHUM16_REG_H0_T0_OUT_L 0x36

#define	TEMPHUM16_REG_H0_T0_OUT_H 0x37

#define	TEMPHUM16_REG_H1_T0_OUT_L 0x3A

#define	TEMPHUM16_REG_H1_T0_OUT_H 0x3B

#define	TEMPHUM16_REG_T0_OUT_L 0x3C

#define	TEMPHUM16_REG_T0_OUT_H 0x3D

#define	TEMPHUM16_REG_T1_OUT_L 0x3E

#define	TEMPHUM16_REG_T1_OUT_H 0x3F

Detailed Description

List of registers of Temp&Hum 16 Click driver.

Macro Definition Documentation

◆ TEMPHUM16_REG_AVERAGE

#define TEMPHUM16_REG_AVERAGE 0x10

◆ TEMPHUM16_REG_CTRL_1

#define TEMPHUM16_REG_CTRL_1 0x20

◆ TEMPHUM16_REG_CTRL_2

#define TEMPHUM16_REG_CTRL_2 0x21

◆ TEMPHUM16_REG_CTRL_3

#define TEMPHUM16_REG_CTRL_3 0x22

◆ TEMPHUM16_REG_DEVICE_ID

#define TEMPHUM16_REG_DEVICE_ID 0x0F

Temp&Hum 16 description register.

Specified register for description of Temp&Hum 16 Click driver.

◆ TEMPHUM16_REG_H0_RH_X2

#define TEMPHUM16_REG_H0_RH_X2 0x30

◆ TEMPHUM16_REG_H0_T0_OUT_H

#define TEMPHUM16_REG_H0_T0_OUT_H 0x37

◆ TEMPHUM16_REG_H0_T0_OUT_L

#define TEMPHUM16_REG_H0_T0_OUT_L 0x36

◆ TEMPHUM16_REG_H1_RH_X2

#define TEMPHUM16_REG_H1_RH_X2 0x31

◆ TEMPHUM16_REG_H1_T0_OUT_H

#define TEMPHUM16_REG_H1_T0_OUT_H 0x3B

◆ TEMPHUM16_REG_H1_T0_OUT_L

#define TEMPHUM16_REG_H1_T0_OUT_L 0x3A

◆ TEMPHUM16_REG_H_OUT_H

#define TEMPHUM16_REG_H_OUT_H 0x29

◆ TEMPHUM16_REG_H_OUT_L

#define TEMPHUM16_REG_H_OUT_L 0x28

◆ TEMPHUM16_REG_STATUS

#define TEMPHUM16_REG_STATUS 0x27

◆ TEMPHUM16_REG_T0_DEGC_X8

#define TEMPHUM16_REG_T0_DEGC_X8 0x32

◆ TEMPHUM16_REG_T0_OUT_H

#define TEMPHUM16_REG_T0_OUT_H 0x3D

◆ TEMPHUM16_REG_T0_OUT_L

#define TEMPHUM16_REG_T0_OUT_L 0x3C

◆ TEMPHUM16_REG_T0_T1_DEGC_H2

#define TEMPHUM16_REG_T0_T1_DEGC_H2 0x35

◆ TEMPHUM16_REG_T1_DEGC_X8

#define TEMPHUM16_REG_T1_DEGC_X8 0x33

◆ TEMPHUM16_REG_T1_OUT_H

#define TEMPHUM16_REG_T1_OUT_H 0x3F

◆ TEMPHUM16_REG_T1_OUT_L

#define TEMPHUM16_REG_T1_OUT_L 0x3E

◆ TEMPHUM16_REG_T_OUT_H

#define TEMPHUM16_REG_T_OUT_H 0x2B

◆ TEMPHUM16_REG_T_OUT_L

#define TEMPHUM16_REG_T_OUT_L 0x2A

Macros