uwb2 2.1.0.0
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List of registers of UWB 2 Click driver. More...
List of registers of UWB 2 Click driver.
#define UWB2_CMD_CCA_TX 0x0B |
#define UWB2_CMD_CCA_TX_W4R 0x11 |
#define UWB2_CMD_CLR_IRQS 0x12 |
#define UWB2_CMD_DB_TOGGLE 0x13 |
#define UWB2_CMD_DRX 0x04 |
#define UWB2_CMD_DRX_REF 0x0A |
#define UWB2_CMD_DRX_RS 0x08 |
#define UWB2_CMD_DRX_TS 0x06 |
#define UWB2_CMD_DTX 0x03 |
#define UWB2_CMD_DTX_REF 0x09 |
#define UWB2_CMD_DTX_REF_W4R 0x10 |
#define UWB2_CMD_DTX_RS 0x07 |
#define UWB2_CMD_DTX_RS_W4R 0x0F |
#define UWB2_CMD_DTX_TS 0x05 |
#define UWB2_CMD_DTX_TS_W4R 0x0E |
#define UWB2_CMD_DTX_W4R 0x0D |
#define UWB2_CMD_RX 0x02 |
#define UWB2_CMD_TX 0x01 |
#define UWB2_CMD_TX_W4R 0x0C |
#define UWB2_CMD_TXRXOFF 0x00 |
UWB 2 fast commands list.
Specified fast commands list of UWB 2 Click driver.
#define UWB2_OTP_ADR_AES_KEY_END 0x007Fu |
#define UWB2_OTP_ADR_AES_KEY_START 0x0078u |
#define UWB2_OTP_ADR_AEUID_HI 0x0003u |
#define UWB2_OTP_ADR_AEUID_LO 0x0002u |
#define UWB2_OTP_ADR_ANTENNA_DELAY 0x000Bu |
#define UWB2_OTP_ADR_AOA_ISO 0x000Cu |
#define UWB2_OTP_ADR_BIASTUNE 0x000Au |
#define UWB2_OTP_ADR_DGC_TUNE 0x0020u |
#define UWB2_OTP_ADR_EUID_HI 0x0001u |
#define UWB2_OTP_ADR_EUID_LO 0x0000u |
UWB 2 OTP memory address list.
Specified OTP memory address list of UWB 2 Click driver.
#define UWB2_OTP_ADR_LDOTUNE_HI 0x0005u |
#define UWB2_OTP_ADR_LDOTUNE_LO 0x0004u |
#define UWB2_OTP_ADR_LOT_ID 0x0007u |
#define UWB2_OTP_ADR_OTP_REVISION 0x001Fu |
#define UWB2_OTP_ADR_PART_ID 0x0006u |
#define UWB2_OTP_ADR_PLL_LOCK_CODE 0x0035u |
#define UWB2_OTP_ADR_TEMP 0x0009u |
#define UWB2_OTP_ADR_VBAT 0x0008u |
#define UWB2_OTP_ADR_WS_LOC 0x000Fu |
#define UWB2_OTP_ADR_WS_LOT_ID_HI 0x000Eu |
#define UWB2_OTP_ADR_WS_LOT_ID_LO 0x000Du |
#define UWB2_OTP_ADR_XTAL_TRIM 0x001Eu |
#define UWB2_REG_ACC_MEM 0x1500u |
#define UWB2_REG_ACK_RESP_T 0x0108u |
#define UWB2_REG_AES_CFG 0x0130u |
#define UWB2_REG_AES_IV0 0x0134u |
#define UWB2_REG_AES_IV1 0x0138u |
#define UWB2_REG_AES_IV2 0x013Cu |
#define UWB2_REG_AES_IV3 0x0140u |
#define UWB2_REG_AES_KEY 0x0154u |
#define UWB2_REG_AES_KEY_1 0x1700u |
#define UWB2_REG_AES_KEY_2 0x1710u |
#define UWB2_REG_AES_KEY_3 0x1720u |
#define UWB2_REG_AES_KEY_4 0x1730u |
#define UWB2_REG_AES_KEY_5 0x1740u |
#define UWB2_REG_AES_KEY_6 0x1750u |
#define UWB2_REG_AES_KEY_7 0x1760u |
#define UWB2_REG_AES_KEY_8 0x1770u |
#define UWB2_REG_AES_START 0x014Cu |
#define UWB2_REG_AES_STS 0x0150u |
#define UWB2_REG_AON_ADDR 0x0A0Cu |
#define UWB2_REG_AON_CFG 0x0A14u |
#define UWB2_REG_AON_CTRL 0x0A04u |
#define UWB2_REG_AON_DIG_CFG 0x0A00u |
#define UWB2_REG_AON_RDATA 0x0A08u |
#define UWB2_REG_AON_WDATA 0x0A10u |
#define UWB2_REG_BIAS_CTRL 0x111Fu |
#define UWB2_REG_CHAN_CTRL 0x0114u |
#define UWB2_REG_CIA_ADJUST 0x0E1Au |
#define UWB2_REG_CIA_CONF 0x0E00u |
#define UWB2_REG_CIA_DIAG_0 0x0C20u |
#define UWB2_REG_CLK_CTRL 0x1104u |
#define UWB2_REG_CTR_DBG 0x0F48u |
#define UWB2_REG_DEV_ID 0x0000u |
UWB 2 registers list.
Specified registers list of UWB 2 Click driver.
#define UWB2_REG_DGC_CFG 0x0318u |
#define UWB2_REG_DGC_CFG_0 0x031Cu |
#define UWB2_REG_DGC_CFG_1 0x0320u |
#define UWB2_REG_DGC_DBG 0x0360u |
#define UWB2_REG_DGC_LUT_0 0x0338u |
#define UWB2_REG_DGC_LUT_1 0x033Cu |
#define UWB2_REG_DGC_LUT_2 0x0340u |
#define UWB2_REG_DGC_LUT_3 0x0344u |
#define UWB2_REG_DGC_LUT_4 0x0348u |
#define UWB2_REG_DGC_LUT_5 0x034Cu |
#define UWB2_REG_DGC_LUT_6 0x0350u |
#define UWB2_REG_DIAG_TMC 0x0F24u |
#define UWB2_REG_DMA_CFG 0x0144u |
#define UWB2_REG_DREF_TIME 0x0030u |
#define UWB2_REG_DRX_CAR_INT 0x0629u |
#define UWB2_REG_DTUNE_0 0x0600u |
#define UWB2_REG_DTUNE_3 0x060Cu |
#define UWB2_REG_DTUNE_4 0x0610u |
#define UWB2_REG_DTUNE_5 0x0614u |
#define UWB2_REG_DX_TIME 0x002Cu |
#define UWB2_REG_EC_CTRL 0x0400u |
#define UWB2_REG_EUI_64 0x0004u |
#define UWB2_REG_EVC_CPQE 0x0F28u |
#define UWB2_REG_EVC_CTRL 0x0F00u |
#define UWB2_REG_EVC_FCE 0x0F0Au |
#define UWB2_REG_EVC_FCG 0x0F08u |
#define UWB2_REG_EVC_FFR 0x0F0Cu |
#define UWB2_REG_EVC_FWTO 0x0F14u |
#define UWB2_REG_EVC_HPW 0x0F18u |
#define UWB2_REG_EVC_OVR 0x0F0Eu |
#define UWB2_REG_EVC_PHE 0x0F04u |
#define UWB2_REG_EVC_PTO 0x0F12u |
#define UWB2_REG_EVC_RES1 0x0F1Cu |
#define UWB2_REG_EVC_RSE 0x0F06u |
#define UWB2_REG_EVC_STO 0x0F10u |
#define UWB2_REG_EVC_SWCE 0x0F1Au |
#define UWB2_REG_EVC_TXFS 0x0F16u |
#define UWB2_REG_EVC_VWARN 0x0F2Au |
#define UWB2_REG_FCMD_STAT 0x0F3Cu |
#define UWB2_REG_FF_CFG 0x0014u |
#define UWB2_REG_FINT_STAT 0x1F00u |
#define UWB2_REG_FP_CONF 0x0E04u |
#define UWB2_REG_GPIO_DIR 0x0508u |
#define UWB2_REG_GPIO_IBES 0x0520u |
#define UWB2_REG_GPIO_ICLR 0x0524u |
#define UWB2_REG_GPIO_IDBE 0x0528u |
#define UWB2_REG_GPIO_IMODE 0x051Cu |
#define UWB2_REG_GPIO_IRQE 0x0510u |
#define UWB2_REG_GPIO_ISEN 0x0518u |
#define UWB2_REG_GPIO_ISTS 0x0514u |
#define UWB2_REG_GPIO_MODE 0x0500u |
#define UWB2_REG_GPIO_OUT 0x050Cu |
#define UWB2_REG_GPIO_PULL_EN 0x0504u |
#define UWB2_REG_GPIO_RAW 0x052Cu |
#define UWB2_REG_INDIRECT_PTR_A 0x1D00u |
#define UWB2_REG_INDIRECT_PTR_B 0x1E00u |
#define UWB2_REG_IP_CONF 0x0E0Cu |
#define UWB2_REG_IP_DIAG_0 0x0C28u |
#define UWB2_REG_IP_DIAG_1 0x0C2Cu |
#define UWB2_REG_IP_DIAG_12 0x0C58u |
#define UWB2_REG_IP_DIAG_2 0x0C30u |
#define UWB2_REG_IP_DIAG_3 0x0C34u |
#define UWB2_REG_IP_DIAG_4 0x0C38u |
#define UWB2_REG_IP_DIAG_8 0x0C48u |
#define UWB2_REG_IP_TS 0x0C00u |
#define UWB2_REG_LDO_CTRL 0x0748u |
#define UWB2_REG_LDO_RLOAD 0x0751u |
#define UWB2_REG_LDO_TUNE_HI 0x0744u |
#define UWB2_REG_LDO_TUNE_LO 0x0740u |
#define UWB2_REG_LE_PEND_01 0x0118u |
#define UWB2_REG_LE_PEND_23 0x011Cu |
#define UWB2_REG_LED_CTRL 0x1116u |
#define UWB2_REG_OTP_ADDR 0x0B04u |
#define UWB2_REG_OTP_CFG 0x0B08u |
#define UWB2_REG_OTP_RDATA 0x0B10u |
#define UWB2_REG_OTP_SRDATA 0x0B14u |
#define UWB2_REG_OTP_STAT 0x0B0Cu |
#define UWB2_REG_OTP_WDATA 0x0B00u |
#define UWB2_REG_PANADR 0x000Cu |
#define UWB2_REG_PDOA 0x0C1Eu |
#define UWB2_REG_PG_CAL_TARGET 0x081Cu |
#define UWB2_REG_PG_TEST 0x0818u |
#define UWB2_REG_PGC_CTRL 0x0810u |
#define UWB2_REG_PGC_STATUS 0x0814u |
#define UWB2_REG_PLL_CAL 0x0908u |
#define UWB2_REG_PLL_CC 0x0904u |
#define UWB2_REG_PLL_CFG 0x0900u |
#define UWB2_REG_PRE_TOC 0x0604u |
#define UWB2_REG_PTR_ADDR_A 0x1F04u |
#define UWB2_REG_PTR_ADDR_B 0x1F0Cu |
#define UWB2_REG_PTR_OFFSET_A 0x1F08u |
#define UWB2_REG_PTR_OFFSET_B 0x1F10u |
#define UWB2_REG_RDB_DIAG 0x0128u |
#define UWB2_REG_RDB_STATUS 0x0124u |
#define UWB2_REG_RF_CTRL_MASK 0x0704u |
#define UWB2_REG_RF_ENABLE 0x0700u |
#define UWB2_REG_RF_SWITCH 0x0714u |
#define UWB2_REG_RF_TX_CTRL_1 0x071Au |
#define UWB2_REG_RF_TX_CTRL_2 0x071Cu |
#define UWB2_REG_RX_BUFFER_0 0x1200u |
#define UWB2_REG_RX_BUFFER_1 0x1300u |
#define UWB2_REG_RX_CAL 0x040Cu |
#define UWB2_REG_RX_CAL_RESI 0x0414u |
#define UWB2_REG_RX_CAL_RESQ 0x041Cu |
#define UWB2_REG_RX_CAL_STS 0x0420u |
#define UWB2_REG_RX_FINFO 0x004Cu |
#define UWB2_REG_RX_FWTO 0x0034u |
#define UWB2_REG_RX_SFD_TOC 0x0602u |
#define UWB2_REG_RX_SNIFF 0x111Au |
#define UWB2_REG_RX_TIME 0x0064u |
#define UWB2_REG_SAR_CTRL 0x0800u |
#define UWB2_REG_SAR_READING 0x0808u |
#define UWB2_REG_SAR_STATUS 0x0804u |
#define UWB2_REG_SAR_TEST 0x0734u |
#define UWB2_REG_SAR_WAKE_RD 0x080Cu |
#define UWB2_REG_SCRATCH_RAM 0x1600u |
#define UWB2_REG_SEQ_CTRL 0x1108u |
#define UWB2_REG_SET1_SET2 0x1800u |
#define UWB2_REG_SOFT_RST 0x1100u |
#define UWB2_REG_SPI_COLLISION 0x0120u |
#define UWB2_REG_SPI_MODE 0x0F2Cu |
#define UWB2_REG_SPI_RD_CRC 0x0018u |
#define UWB2_REG_SPICRCINIT 0x0F4Cu |
#define UWB2_REG_STS1_DIAG_0 0x0D38u |
#define UWB2_REG_STS1_DIAG_1 0x0D3Cu |
#define UWB2_REG_STS1_DIAG_12 0x0D68u |
#define UWB2_REG_STS1_DIAG_2 0x0D40u |
#define UWB2_REG_STS1_DIAG_3 0x0D44u |
#define UWB2_REG_STS1_DIAG_4 0x0D48u |
#define UWB2_REG_STS1_DIAG_8 0x0D58u |
#define UWB2_REG_STS1_TS 0x0C10u |
#define UWB2_REG_STS_CFG 0x0200u |
#define UWB2_REG_STS_CONF_0 0x0E12u |
#define UWB2_REG_STS_CONF_1 0x0E16u |
#define UWB2_REG_STS_CTRL 0x0204u |
#define UWB2_REG_STS_DIAG_0 0x0C5Cu |
#define UWB2_REG_STS_DIAG_1 0x0C60u |
#define UWB2_REG_STS_DIAG_12 0x0D20u |
#define UWB2_REG_STS_DIAG_2 0x0C64u |
#define UWB2_REG_STS_DIAG_3 0x0C68u |
#define UWB2_REG_STS_DIAG_4 0x0D00u |
#define UWB2_REG_STS_DIAG_8 0x0D10u |
#define UWB2_REG_STS_IV 0x021Cu |
#define UWB2_REG_STS_KEY 0x020Cu |
#define UWB2_REG_STS_STS 0x0208u |
#define UWB2_REG_STS_TS 0x0C08u |
#define UWB2_REG_SYS_CFG 0x0010u |
#define UWB2_REG_SYS_CTRL 0x0038u |
#define UWB2_REG_SYS_ENABLE_HI 0x0040u |
#define UWB2_REG_SYS_ENABLE_LO 0x003Cu |
#define UWB2_REG_SYS_STATE 0x0F30u |
#define UWB2_REG_SYS_STATUS_HI 0x0048u |
#define UWB2_REG_SYS_STATUS_LO 0x0044u |
#define UWB2_REG_SYS_TIME 0x001Cu |
#define UWB2_REG_TDOA 0x0C18u |
#define UWB2_REG_TX_ANTD 0x0104u |
#define UWB2_REG_TX_BUFFER 0x1400u |
#define UWB2_REG_TX_FCTRL_HI 0x0028u |
#define UWB2_REG_TX_FCTRL_LO 0x0024u |
#define UWB2_REG_TX_POWER 0x010Cu |
#define UWB2_REG_TX_RAWST 0x0100u |
#define UWB2_REG_TX_TEST 0x0728u |
#define UWB2_REG_TX_TIME 0x0074u |
#define UWB2_REG_TXFSEQ 0x1112u |
#define UWB2_REG_XTAL 0x0914u |