Settings for registers of Accel 24 Click driver. More...

Macros
#define	ACCEL24_INT_SRC0_CHORZ 0x80
	Accel 24 INT_SRC0 register settings.

#define	ACCEL24_INT_SRC0_CHORXY 0x40

#define	ACCEL24_INT_SRC0_SHYM 0x08

#define	ACCEL24_INT_SRC0_SHYP 0x04

#define	ACCEL24_INT_SRC0_SHXM 0x02

#define	ACCEL24_INT_SRC0_SHXP 0x01

#define	ACCEL24_INT_CLR0_ORZC 0x80
	Accel 24 INT_CLR0 register settings.

#define	ACCEL24_INT_CLR0_ORXYC 0x40

#define	ACCEL24_INT_CLR0_SHYMC 0x08

#define	ACCEL24_INT_CLR0_SHYPC 0x04

#define	ACCEL24_INT_CLR0_SHXMC 0x02

#define	ACCEL24_INT_CLR0_SHXPC 0x01

#define	ACCEL24_INT_CLR0_ALL 0xCF

#define	ACCEL24_INT_SRC1_TILT 0x80
	Accel 24 INT_SRC1 register settings.

#define	ACCEL24_INT_SRC1_ORZ 0x40

#define	ACCEL24_INT_SRC1_ORXY_X_PLUS 0x00

#define	ACCEL24_INT_SRC1_ORXY_Y_PLUS 0x10

#define	ACCEL24_INT_SRC1_ORXY_X_MINUS 0x20

#define	ACCEL24_INT_SRC1_ORXY_Y_MINUS 0x30

#define	ACCEL24_INT_SRC1_ORXY_MASK 0x30

#define	ACCEL24_INT_SRC1_DRDY 0x01

#define	ACCEL24_INT_CLR1_SW_RST 0x10
	Accel 24 INT_CLR1 register settings.

#define	ACCEL24_INT_CLR1_DRDYC 0x01

#define	ACCEL24_STATUS_ORD 0x10
	Accel 24 STATUS register settings.

#define	ACCEL24_STATUS_ORIZ_MSB 0x08

#define	ACCEL24_STATUS_ORIZ_LSB 0x04

#define	ACCEL24_STATUS_ORIXY_MSB 0x02

#define	ACCEL24_STATUS_ORIXY_LSB 0x01

#define	ACCEL24_INT_MASK0_ORZE 0x80
	Accel 24 INT_MASK0 register settings.

#define	ACCEL24_INT_MASK0_ORXYE 0x40

#define	ACCEL24_INT_MASK0_SHYME 0x08

#define	ACCEL24_INT_MASK0_SHYPE 0x04

#define	ACCEL24_INT_MASK0_SHXME 0x02

#define	ACCEL24_INT_MASK0_SHXPE 0x01

#define	ACCEL24_INT_MASK0_NONE 0x00

#define	ACCEL24_INT_MASK0_ALL 0xCF

#define	ACCEL24_INT_MASK1_TC 0x80
	Accel 24 INT_MASK1 register settings.

#define	ACCEL24_INT_MASK1_DRDYE 0x01

#define	ACCEL24_DETECTION_SHM 0x80
	Accel 24 DETECTION register settings.

#define	ACCEL24_DETECTION_SHTH_0p25G 0x00

#define	ACCEL24_DETECTION_SHTH_0p5G 0x10

#define	ACCEL24_DETECTION_SHTH_0p75G 0x20

#define	ACCEL24_DETECTION_SHTH_1G 0x30

#define	ACCEL24_DETECTION_SHTH_1p25G 0x40

#define	ACCEL24_DETECTION_SHTH_1p5G 0x50

#define	ACCEL24_DETECTION_SHTH_1p75G 0x60

#define	ACCEL24_DETECTION_SHTH_2G 0x70

#define	ACCEL24_DETECTION_SHTH_MASK 0x70

#define	ACCEL24_DETECTION_SHC_8 0x00

#define	ACCEL24_DETECTION_SHC_16 0x04

#define	ACCEL24_DETECTION_SHC_32 0x08

#define	ACCEL24_DETECTION_SHC_64 0x0C

#define	ACCEL24_DETECTION_SHC_MASK 0x0C

#define	ACCEL24_DETECTION_ORC_16 0x00

#define	ACCEL24_DETECTION_ORC_32 0x01

#define	ACCEL24_DETECTION_ORC_64 0x02

#define	ACCEL24_DETECTION_ORC_128 0x03

#define	ACCEL24_DETECTION_ORC_MASK 0x03

#define	ACCEL24_DETECTION_NONE 0x00

#define	ACCEL24_CONTROL_ST 0x80
	Accel 24 CONTROL register settings.

#define	ACCEL24_CONTROL_FSR_2G 0x00

#define	ACCEL24_CONTROL_FSR_4G 0x20

#define	ACCEL24_CONTROL_FSR_8G 0x40

#define	ACCEL24_CONTROL_FSR_UNDEFINED 0x60

#define	ACCEL24_CONTROL_FSR_MASK 0x60

#define	ACCEL24_CONTROL_PD 0x01

#define	ACCEL24_ACCEL_RESOLUTION 2048.0f
	Accel 24 measurement calculation settings.

#define	ACCEL24_TEMP_SENSITIVITY 0.586f

#define	ACCEL24_TEMP_NOMINAL 25.0f

#define	ACCEL24_FSR_2G 0
	Accel 24 FSR settings.

#define	ACCEL24_FSR_4G 1

#define	ACCEL24_FSR_8G 2

#define	ACCEL24_WHO_AM_I 0x05
	Accel 24 Who_Am_I register value.

#define	ACCEL24_WHO_AM_I_MASK 0x0F

#define	ACCEL24_DEVICE_ADDRESS 0x15
	Accel 24 device address setting.

Detailed Description

Settings for registers of Accel 24 Click driver.

Macro Definition Documentation

◆ ACCEL24_ACCEL_RESOLUTION

#define ACCEL24_ACCEL_RESOLUTION 2048.0f

Accel 24 measurement calculation settings.

Specified settings for measurement calculation of Accel 24 Click driver.

◆ ACCEL24_CONTROL_FSR_2G

#define ACCEL24_CONTROL_FSR_2G 0x00

◆ ACCEL24_CONTROL_FSR_4G

#define ACCEL24_CONTROL_FSR_4G 0x20

◆ ACCEL24_CONTROL_FSR_8G

#define ACCEL24_CONTROL_FSR_8G 0x40

◆ ACCEL24_CONTROL_FSR_MASK

#define ACCEL24_CONTROL_FSR_MASK 0x60

◆ ACCEL24_CONTROL_FSR_UNDEFINED

#define ACCEL24_CONTROL_FSR_UNDEFINED 0x60

◆ ACCEL24_CONTROL_PD

#define ACCEL24_CONTROL_PD 0x01

◆ ACCEL24_CONTROL_ST

#define ACCEL24_CONTROL_ST 0x80

Accel 24 CONTROL register settings.

Specified settings for CONTROL register of Accel 24 Click driver.

◆ ACCEL24_DETECTION_NONE

#define ACCEL24_DETECTION_NONE 0x00

◆ ACCEL24_DETECTION_ORC_128

#define ACCEL24_DETECTION_ORC_128 0x03

◆ ACCEL24_DETECTION_ORC_16

#define ACCEL24_DETECTION_ORC_16 0x00

◆ ACCEL24_DETECTION_ORC_32

#define ACCEL24_DETECTION_ORC_32 0x01

◆ ACCEL24_DETECTION_ORC_64

#define ACCEL24_DETECTION_ORC_64 0x02

◆ ACCEL24_DETECTION_ORC_MASK

#define ACCEL24_DETECTION_ORC_MASK 0x03

◆ ACCEL24_DETECTION_SHC_16

#define ACCEL24_DETECTION_SHC_16 0x04

◆ ACCEL24_DETECTION_SHC_32

#define ACCEL24_DETECTION_SHC_32 0x08

◆ ACCEL24_DETECTION_SHC_64

#define ACCEL24_DETECTION_SHC_64 0x0C

◆ ACCEL24_DETECTION_SHC_8

#define ACCEL24_DETECTION_SHC_8 0x00

◆ ACCEL24_DETECTION_SHC_MASK

#define ACCEL24_DETECTION_SHC_MASK 0x0C

◆ ACCEL24_DETECTION_SHM

#define ACCEL24_DETECTION_SHM 0x80

Accel 24 DETECTION register settings.

Specified settings for DETECTION register of Accel 24 Click driver.

◆ ACCEL24_DETECTION_SHTH_0p25G

#define ACCEL24_DETECTION_SHTH_0p25G 0x00

◆ ACCEL24_DETECTION_SHTH_0p5G

#define ACCEL24_DETECTION_SHTH_0p5G 0x10

◆ ACCEL24_DETECTION_SHTH_0p75G

#define ACCEL24_DETECTION_SHTH_0p75G 0x20

◆ ACCEL24_DETECTION_SHTH_1G

#define ACCEL24_DETECTION_SHTH_1G 0x30

◆ ACCEL24_DETECTION_SHTH_1p25G

#define ACCEL24_DETECTION_SHTH_1p25G 0x40

◆ ACCEL24_DETECTION_SHTH_1p5G

#define ACCEL24_DETECTION_SHTH_1p5G 0x50

◆ ACCEL24_DETECTION_SHTH_1p75G

#define ACCEL24_DETECTION_SHTH_1p75G 0x60

◆ ACCEL24_DETECTION_SHTH_2G

#define ACCEL24_DETECTION_SHTH_2G 0x70

◆ ACCEL24_DETECTION_SHTH_MASK

#define ACCEL24_DETECTION_SHTH_MASK 0x70

◆ ACCEL24_DEVICE_ADDRESS

#define ACCEL24_DEVICE_ADDRESS 0x15

Accel 24 device address setting.

Specified setting for device slave address selection of Accel 24 Click driver.

◆ ACCEL24_FSR_2G

#define ACCEL24_FSR_2G 0

Accel 24 FSR settings.

Specified settings for FSR of Accel 24 Click driver.

◆ ACCEL24_FSR_4G

#define ACCEL24_FSR_4G 1

◆ ACCEL24_FSR_8G

#define ACCEL24_FSR_8G 2

◆ ACCEL24_INT_CLR0_ALL

#define ACCEL24_INT_CLR0_ALL 0xCF

◆ ACCEL24_INT_CLR0_ORXYC

#define ACCEL24_INT_CLR0_ORXYC 0x40

◆ ACCEL24_INT_CLR0_ORZC

#define ACCEL24_INT_CLR0_ORZC 0x80

Accel 24 INT_CLR0 register settings.

Specified settings for INT_CLR0 register of Accel 24 Click driver.

◆ ACCEL24_INT_CLR0_SHXMC

#define ACCEL24_INT_CLR0_SHXMC 0x02

◆ ACCEL24_INT_CLR0_SHXPC

#define ACCEL24_INT_CLR0_SHXPC 0x01

◆ ACCEL24_INT_CLR0_SHYMC

#define ACCEL24_INT_CLR0_SHYMC 0x08

◆ ACCEL24_INT_CLR0_SHYPC

#define ACCEL24_INT_CLR0_SHYPC 0x04

◆ ACCEL24_INT_CLR1_DRDYC

#define ACCEL24_INT_CLR1_DRDYC 0x01

◆ ACCEL24_INT_CLR1_SW_RST

#define ACCEL24_INT_CLR1_SW_RST 0x10

Accel 24 INT_CLR1 register settings.

Specified settings for INT_CLR1 register of Accel 24 Click driver.

◆ ACCEL24_INT_MASK0_ALL

#define ACCEL24_INT_MASK0_ALL 0xCF

◆ ACCEL24_INT_MASK0_NONE

#define ACCEL24_INT_MASK0_NONE 0x00

◆ ACCEL24_INT_MASK0_ORXYE

#define ACCEL24_INT_MASK0_ORXYE 0x40

◆ ACCEL24_INT_MASK0_ORZE

#define ACCEL24_INT_MASK0_ORZE 0x80

Accel 24 INT_MASK0 register settings.

Specified settings for INT_MASK0 register of Accel 24 Click driver.

◆ ACCEL24_INT_MASK0_SHXME

#define ACCEL24_INT_MASK0_SHXME 0x02

◆ ACCEL24_INT_MASK0_SHXPE

#define ACCEL24_INT_MASK0_SHXPE 0x01

◆ ACCEL24_INT_MASK0_SHYME

#define ACCEL24_INT_MASK0_SHYME 0x08

◆ ACCEL24_INT_MASK0_SHYPE

#define ACCEL24_INT_MASK0_SHYPE 0x04

◆ ACCEL24_INT_MASK1_DRDYE

#define ACCEL24_INT_MASK1_DRDYE 0x01

◆ ACCEL24_INT_MASK1_TC

#define ACCEL24_INT_MASK1_TC 0x80

Accel 24 INT_MASK1 register settings.

Specified settings for INT_MASK1 register of Accel 24 Click driver.

◆ ACCEL24_INT_SRC0_CHORXY

#define ACCEL24_INT_SRC0_CHORXY 0x40

◆ ACCEL24_INT_SRC0_CHORZ

#define ACCEL24_INT_SRC0_CHORZ 0x80

Accel 24 INT_SRC0 register settings.

Specified settings for INT_SRC0 register of Accel 24 Click driver.

◆ ACCEL24_INT_SRC0_SHXM

#define ACCEL24_INT_SRC0_SHXM 0x02

◆ ACCEL24_INT_SRC0_SHXP

#define ACCEL24_INT_SRC0_SHXP 0x01

◆ ACCEL24_INT_SRC0_SHYM

#define ACCEL24_INT_SRC0_SHYM 0x08

◆ ACCEL24_INT_SRC0_SHYP

#define ACCEL24_INT_SRC0_SHYP 0x04

◆ ACCEL24_INT_SRC1_DRDY

#define ACCEL24_INT_SRC1_DRDY 0x01

◆ ACCEL24_INT_SRC1_ORXY_MASK

#define ACCEL24_INT_SRC1_ORXY_MASK 0x30

◆ ACCEL24_INT_SRC1_ORXY_X_MINUS

#define ACCEL24_INT_SRC1_ORXY_X_MINUS 0x20

◆ ACCEL24_INT_SRC1_ORXY_X_PLUS

#define ACCEL24_INT_SRC1_ORXY_X_PLUS 0x00

◆ ACCEL24_INT_SRC1_ORXY_Y_MINUS

#define ACCEL24_INT_SRC1_ORXY_Y_MINUS 0x30

◆ ACCEL24_INT_SRC1_ORXY_Y_PLUS

#define ACCEL24_INT_SRC1_ORXY_Y_PLUS 0x10

◆ ACCEL24_INT_SRC1_ORZ

#define ACCEL24_INT_SRC1_ORZ 0x40

◆ ACCEL24_INT_SRC1_TILT

#define ACCEL24_INT_SRC1_TILT 0x80

Accel 24 INT_SRC1 register settings.

Specified settings for INT_SRC1 register of Accel 24 Click driver.

◆ ACCEL24_STATUS_ORD

#define ACCEL24_STATUS_ORD 0x10

Accel 24 STATUS register settings.

Specified settings for STATUS register of Accel 24 Click driver.

◆ ACCEL24_STATUS_ORIXY_LSB

#define ACCEL24_STATUS_ORIXY_LSB 0x01

◆ ACCEL24_STATUS_ORIXY_MSB

#define ACCEL24_STATUS_ORIXY_MSB 0x02

◆ ACCEL24_STATUS_ORIZ_LSB

#define ACCEL24_STATUS_ORIZ_LSB 0x04

◆ ACCEL24_STATUS_ORIZ_MSB

#define ACCEL24_STATUS_ORIZ_MSB 0x08

◆ ACCEL24_TEMP_NOMINAL

#define ACCEL24_TEMP_NOMINAL 25.0f

◆ ACCEL24_TEMP_SENSITIVITY

#define ACCEL24_TEMP_SENSITIVITY 0.586f

◆ ACCEL24_WHO_AM_I

#define ACCEL24_WHO_AM_I 0x05

Accel 24 Who_Am_I register value.

Specified Who_Am_I register value of Accel 24 Click driver.

◆ ACCEL24_WHO_AM_I_MASK

#define ACCEL24_WHO_AM_I_MASK 0x0F

Macros