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#define | ACCEL8_MAP_MIKROBUS(cfg, mikrobus) |
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#define | ACCEL8_RETVAL uint8_t |
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#define | ACCEL8_OK 0x00 |
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#define | ACCEL8_INIT_ERROR 0xFF |
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#define | ACCEL8_REG_SELF_TEST_X 0x0D |
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#define | ACCEL8_REG_SELF_TEST_Y 0x0E |
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#define | ACCEL8_REG_SELF_TEST_Z 0x0F |
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#define | ACCEL8_REG_SELF_TEST_A 0x10 |
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#define | ACCEL8_REG_SMPLRT_DIV 0x19 |
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#define | ACCEL8_REG_CONFIG 0x1A |
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#define | ACCEL8_REG_GYRO_CONFIG 0x1B |
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#define | ACCEL8_REG_ACCEL_CONFIG 0x1C |
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#define | ACCEL8_REG_FIFO_EN 0x23 |
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#define | ACCEL8_REG_I2C_MST_CTRL 0x24 |
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#define | ACCEL8_REG_I2C_SLV0_ADDR 0x25 |
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#define | ACCEL8_REG_I2C_SLV0_REG 0x26 |
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#define | ACCEL8_REG_I2C_SLV0_CTRL 0x27 |
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#define | ACCEL8_REG_I2C_SLV1_ADDR 0x28 |
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#define | ACCEL8_REG_I2C_SLV1_REG 0x29 |
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#define | ACCEL8_REG_I2C_SLV1_CTRL 0x2A |
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#define | ACCEL8_REG_I2C_SLV2_ADDR 0x2B |
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#define | ACCEL8_REG_I2C_SLV2_REG 0x2C |
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#define | ACCEL8_REG_I2C_SLV2_CTRL 0x2D |
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#define | ACCEL8_REG_I2C_SLV3_ADDR 0x2E |
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#define | ACCEL8_REG_I2C_SLV3_REG 0x2F |
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#define | ACCEL8_REG_I2C_SLV3_CTRL 0x30 |
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#define | ACCEL8_REG_I2C_SLV4_ADDR 0x31 |
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#define | ACCEL8_REG_I2C_SLV4_REG 0x32 |
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#define | ACCEL8_REG_I2C_SLV4_DO 0x33 |
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#define | ACCEL8_REG_I2C_SLV4_CTRL 0x34 |
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#define | ACCEL8_REG_I2C_SLV4_DI 0x35 |
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#define | ACCEL8_REG_I2C_MST_STATUS 0x36 |
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#define | ACCEL8_REG_INT_PIN_CFG 0x37 |
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#define | ACCEL8_REG_INT_ENABLE 0x38 |
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#define | ACCEL8_REG_INT_STATUS 0x3A |
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#define | ACCEL8_REG_ACCEL_XOUT_H 0x3B |
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#define | ACCEL8_REG_ACCEL_XOUT_L 0x3C |
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#define | ACCEL8_REG_ACCEL_YOUT_H 0x3D |
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#define | ACCEL8_REG_ACCEL_YOUT_L 0x3E |
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#define | ACCEL8_REG_ACCEL_ZOUT_H 0x3F |
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#define | ACCEL8_REG_ACCEL_ZOUT_L 0x40 |
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#define | ACCEL8_REG_TEMP_OUT_H 0x41 |
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#define | ACCEL8_REG_TEMP_OUT_L 0x42 |
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#define | ACCEL8_REG_GYRO_XOUT_H 0x43 |
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#define | ACCEL8_REG_GYRO_XOUT_L 0x44 |
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#define | ACCEL8_REG_GYRO_YOUT_H 0x45 |
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#define | ACCEL8_REG_GYRO_YOUT_L 0x46 |
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#define | ACCEL8_REG_GYRO_ZOUT_H 0x47 |
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#define | ACCEL8_REG_GYRO_ZOUT_L 0x48 |
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#define | ACCEL8_REG_EXT_SENS_DATA_00 0x49 |
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#define | ACCEL8_REG_EXT_SENS_DATA_01 0x4A |
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#define | ACCEL8_REG_EXT_SENS_DATA_02 0x4B |
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#define | ACCEL8_REG_EXT_SENS_DATA_03 0x4C |
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#define | ACCEL8_REG_EXT_SENS_DATA_04 0x4D |
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#define | ACCEL8_REG_EXT_SENS_DATA_05 0x4E |
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#define | ACCEL8_REG_EXT_SENS_DATA_06 0x4F |
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#define | ACCEL8_REG_EXT_SENS_DATA_07 0x50 |
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#define | ACCEL8_REG_EXT_SENS_DATA_08 0x51 |
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#define | ACCEL8_REG_EXT_SENS_DATA_09 0x52 |
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#define | ACCEL8_REG_EXT_SENS_DATA_10 0x53 |
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#define | ACCEL8_REG_EXT_SENS_DATA_11 0x54 |
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#define | ACCEL8_REG_EXT_SENS_DATA_12 0x55 |
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#define | ACCEL8_REG_EXT_SENS_DATA_13 0x56 |
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#define | ACCEL8_REG_EXT_SENS_DATA_14 0x57 |
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#define | ACCEL8_REG_EXT_SENS_DATA_15 0x58 |
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#define | ACCEL8_REG_EXT_SENS_DATA_16 0x59 |
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#define | ACCEL8_REG_EXT_SENS_DATA_17 0x5A |
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#define | ACCEL8_REG_EXT_SENS_DATA_18 0x5B |
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#define | ACCEL8_REG_EXT_SENS_DATA_19 0x5C |
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#define | ACCEL8_REG_EXT_SENS_DATA_20 0x5D |
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#define | ACCEL8_REG_EXT_SENS_DATA_21 0x5E |
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#define | ACCEL8_REG_EXT_SENS_DATA_22 0x5F |
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#define | ACCEL8_REG_EXT_SENS_DATA_23 0x60 |
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#define | ACCEL8_REG_I2C_SLV0_DO 0x63 |
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#define | ACCEL8_REG_I2C_SLV1_DO 0x64 |
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#define | ACCEL8_REG_I2C_SLV2_DO 0x65 |
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#define | ACCEL8_REG_I2C_SLV3_DO 0x66 |
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#define | ACCEL8_REG_I2C_MST_DELAY_CTRL 0x67 |
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#define | ACCEL8_REG_SIGNAL_PATH_RESET 0x68 |
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#define | ACCEL8_REG_USER_CTRL 0x6A |
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#define | ACCEL8_REG_PWR_MGMT_1 0x6B |
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#define | ACCEL8_REG_PWR_MGMT_2 0x6C |
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#define | ACCEL8_REG_FIFO_COUNTH 0x72 |
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#define | ACCEL8_REG_FIFO_COUNTL 0x73 |
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#define | ACCEL8_REG_FIFO_R_W 0x74 |
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#define | ACCEL8_REG_WHO_AM_I 0x75 |
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#define | ACCEL8_CFG_EXT_SYNC_INPUT_DISABLED 0x00 << 3 |
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#define | ACCEL8_CFG_EXT_SYNC_TEMP_OUTPUT 0x01 << 3 |
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#define | ACCEL8_CFG_EXT_SYNC_GYRO_X_OUTPUT 0x02 << 3 |
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#define | ACCEL8_CFG_EXT_SYNC_GYRO_Y_OUTPUT 0x03 << 3 |
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#define | ACCEL8_CFG_EXT_SYNC_GYRO_Z_OUTPUT 0x04 << 3 |
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#define | ACCEL8_CFG_EXT_SYNC_ACCEL_X_OUTPUT 0x05 << 3 |
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#define | ACCEL8_CFG_EXT_SYNC_ACCEL_Y_OUTPUT 0x06 << 3 |
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#define | ACCEL8_CFG_EXT_SYNC_ACCEL_Z_OUTPUT 0x07 << 3 |
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#define | ACCEL8_CFG_DLPF_CFG_BW_A260_G256 0x00 |
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#define | ACCEL8_CFG_DLPF_CFG_BW_A184_G188 0x01 |
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#define | ACCEL8_CFG_DLPF_CFG_BW_A94_G98 0x02 |
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#define | ACCEL8_CFG_DLPF_CFG_BW_A44_G42 0x03 |
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#define | ACCEL8_CFG_DLPF_CFG_BW_A21_G20 0x04 |
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#define | ACCEL8_CFG_DLPF_CFG_BW_A10_G10 0x05 |
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#define | ACCEL8_CFG_DLPF_CFG_BW_A5_G5 0x06 |
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#define | ACCEL8_GYRO_CFG_X_SELF_TEST 0x80 |
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#define | ACCEL8_GYRO_CFG_Y_SELF_TEST 0x40 |
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#define | ACCEL8_GYRO_CFG_Z_SELF_TEST 0x20 |
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#define | ACCEL8_GYRO_CFG_FULL_SCALE_RANGE_250dbs 0x00 |
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#define | ACCEL8_GYRO_CFG_FULL_SCALE_RANGE_500dbs 0x08 |
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#define | ACCEL8_GYRO_CFG_FULL_SCALE_RANGE_1000dbs 0x10 |
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#define | ACCEL8_GYRO_CFG_FULL_SCALE_RANGE_2000dbs 0x18 |
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#define | ACCEL8_ACCEL_CFG_X_SELF_TEST 0x80 |
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#define | ACCEL8_ACCEL_CFG_Y_SELF_TEST 0x40 |
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#define | ACCEL8_ACCEL_CFG_Z_SELF_TEST 0x20 |
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#define | ACCEL8_ACCEL_CFG_FULL_SCALE_RANGE_2g 0x00 |
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#define | ACCEL8_ACCEL_CFG_FULL_SCALE_RANGE_4g 0x08 |
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#define | ACCEL8_ACCEL_CFG_FULL_SCALE_RANGE_8g 0x10 |
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#define | ACCEL8_ACCEL_CFG_FULL_SCALE_RANGE_16g 0x18 |
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#define | ACCEL8_FIFO_ENABLE_TEMP 0x80 |
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#define | ACCEL8_FIFO_ENABLE_X_AXIS_GYRO 0x40 |
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#define | ACCEL8_FIFO_ENABLE_Y_AXIS_GYRO 0x20 |
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#define | ACCEL8_FIFO_ENABLE_Z_AXIS_GYRO 0x10 |
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#define | ACCEL8_FIFO_ENABLE_ACCEL 0x08 |
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#define | ACCEL8_FIFO_ENABLE_EXT_SENS_DATA_SLV2 0x04 |
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#define | ACCEL8_FIFO_ENABLE_EXT_SENS_DATA_SLV1 0x02 |
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#define | ACCEL8_FIFO_ENABLE_EXT_SENS_DATA_SLV0 0x01 |
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#define | ACCEL8_I2C_MST_CTRL_MUL_MST_ENABLE 0x80 |
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#define | ACCEL8_I2C_MST_CTRL_WAIT_FOR_ES 0x40 |
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#define | ACCEL8_I2C_MST_CTRL_EXT_SENS_DATA_SLV3 0x20 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_RESTART_BETWEEN_READS 0x00 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_STOP_AND_START 0x10 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_348kHz 0x00 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_333kHz 0x01 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_320kHz 0x02 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_308kHz 0x03 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_296kHz 0x04 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_286kHz 0x05 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_276kHz 0x06 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_367kHz 0x07 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_358kHz 0x08 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_500kHz 0x09 |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_471kHz 0x0A |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_444kHz 0x0B |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_421kHz 0x0C |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_400kHz 0x0D |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_381kHz 0x0E |
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#define | ACCEL8_I2C_MST_CTRL_I2C_CLOCK_364kHz 0x0F |
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#define | ACCEL8_INTC_INT_PIN_IS_ACTIVE_HIGH 0x00 |
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#define | ACCEL8_INTC_INT_PIN_IS_ACTIVE_LOW 0x80 |
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#define | ACCEL8_INTC_INT_PIN_IS_CONFIGURED_AS_PUSH_PULL 0x00 |
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#define | ACCEL8_INTC_INT_PIN_IS_CONFIGURED_AS_OPEN_DRAIN 0x40 |
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#define | ACCEL8_INTC_LATCH_INT_ENABLE 0x20 |
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#define | ACCEL8_INTC_INT_READ_CLEAR 0x10 |
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#define | ACCEL8_INTC_FSYNC_INT_LEVEL_ACTIVE_HIGH 0x00 |
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#define | ACCEL8_INTC_FSYNC_INT_LEVEL_ACTIVE_LOW 0x08 |
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#define | ACCEL8_INTC_FSYNC_INT_ENABLE 0x04 |
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#define | ACCEL8_INTC_I2C_BYPASS_ENABLE 0x02 |
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#define | ACCEL8_INTC_I2C_BYPASS_DISABLE 0x00 |
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#define | ACCEL8_INTE_FIFO_OFLOW_ENABLE 0x10 |
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#define | ACCEL8_INTE_I2C_MST_INT_ENABLE 0x08 |
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#define | ACCEL8_INTE_DATA_RDY_ENABLE 0x01 |
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#define | ACCEL8_INTS_FIFO_OFLOW 0x10 |
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#define | ACCEL8_INTS_I2C_MST_INT 0x08 |
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#define | ACCEL8_INTS_DATA_RDY 0x01 |
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#define | ACCEL8_ACCEL_X_AXIS_DATA 0x3B |
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#define | ACCEL8_ACCEL_Y_AXIS_DATA 0x3D |
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#define | ACCEL8_ACCEL_Z_AXIS_DATA 0x3F |
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#define | ACCEL8_TEMP_DATA 0x41 |
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#define | ACCEL8_GYRO_X_AXIS_DATA 0x43 |
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#define | ACCEL8_GYRO_Y_AXIS_DATA 0x45 |
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#define | ACCEL8_GYRO_Z_AXIS_DATA 0x47 |
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#define | ACCEL8_GYRO_RESET 0x04 |
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#define | ACCEL8_ACCEL_RESET 0x02 |
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#define | ACCEL8_TEMP_RESET 0x01 |
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#define | ACCEL8_UC_FIFO_ENABLE 0x40 |
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#define | ACCEL8_UC_I2C_MASTER_MODE 0x20 |
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#define | ACCEL8_UC_FIFO_RESET 0x04 |
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#define | ACCEL8_UC_I2C_MASTER_RESET 0x02 |
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#define | ACCEL8_UC_SIG_COND_RESET 0x01 |
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#define | ACCEL8_PM1_DEVICE_RESET 0x80 |
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#define | ACCEL8_PM1_GO_TO_SLEEP 0x40 |
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#define | ACCEL8_PM1_CYCLE 0x20 |
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#define | ACCEL8_PM1_TEMP_DISABLE 0x08 |
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#define | ACCEL8_PM1_CLKSEL_INTERNAL_8MHZ_OSCILLATOR 0x00 |
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#define | ACCEL8_PM1_CLKSEL_PLL_WITH_X_AXIS_GYROSCOPE 0x01 |
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#define | ACCEL8_PM1_CLKSEL_PLL_WITH_Y_AXIS_GYROSCOPE 0x02 |
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#define | ACCEL8_PM1_CLKSEL_PLL_WITH_Z_AXIS_GYROSCOPE 0x03 |
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#define | ACCEL8_PM1_CLKSEL_PLL_WITH_EXTERNAL_32_768kHz 0x04 |
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#define | ACCEL8_PM1_CLKSEL_PLL_WITH_EXTERNAL_19_2kHz 0x05 |
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#define | ACCEL8_PM1_CLKSEL_STOPS_THE_CLOCK 0x07 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_WAKE_UP_FREQ_1_25Hz 0x00 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_WAKE_UP_FREQ_5Hz 0x40 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_WAKE_UP_FREQ_20Hz 0x80 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_WAKE_UP_FREQ_40Hz 0xC0 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_X_AXIS_ACCEL_STANDBY_MODE 0x20 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_Y_AXIS_ACCEL_STANDBY_MODE 0x10 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_Z_AXIS_ACCEL_STANDBY_MODE 0x08 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_X_AXIS_GYRO_STANDBY_MODE 0x04 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_Y_AXIS_GYRO_STANDBY_MODE 0x02 |
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#define | ACCEL8_PM2_LP_WAKE_CTRL_Z_AXIS_GYRO_STANDBY_MODE 0x01 |
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#define | ACCEL8_DEVICE_SLAVE_ADDRESS_ADD 0x69 |
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#define | ACCEL8_DEVICE_SLAVE_ADDRESS_SEL 0x68 |
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