adc18.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef ADC18_H
#define ADC18_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define ADC18_REG_GEN_PROD                  0x00
#define ADC18_REG_GEN_REV                   0x01
#define ADC18_REG_GEN_CNFG                  0x02
#define ADC18_REG_GEN_CHNL_CTRL             0x03
#define ADC18_REG_GEN_GPIO_CTRL             0x04
#define ADC18_REG_GEN_GPI_INT               0x05
#define ADC18_REG_GEN_GPI_DATA              0x06
#define ADC18_REG_GEN_INT                   0x07
#define ADC18_REG_GEN_INTEN                 0x08
#define ADC18_REG_GEN_PWR_CTRL              0x09
#define ADC18_REG_DCHNL_CMD                 0x20
#define ADC18_REG_DCHNL_STA                 0x21
#define ADC18_REG_DCHNL_CTRL1               0x22
#define ADC18_REG_DCHNL_CTRL2               0x23
#define ADC18_REG_DCHNL_DATA                0x24
#define ADC18_REG_DCHNL_N_SEL               0x25
#define ADC18_REG_DCHNL_N_SOC               0x26
#define ADC18_REG_DCHNL_N_SGC               0x27
 
 // adc18_reg
 
#define ADC18_PRODUCT_ID                    0x18
 
#define ADC18_GEN_CNFG_CRC_EN               0x800000ul
 
#define ADC18_DATA_RESOLUTION               0x7FFFFFul
#define ADC18_FULL_SCALE_VOLTAGE            12.5
 
#define ADC18_START_CONVERSION              0x30
#define ADC18_STOP_CONVERSION               0x10
#define ADC18_DATA_RATE_5_SPS               0x00
#define ADC18_DATA_RATE_10_SPS              0x01
#define ADC18_DATA_RATE_15_SPS              0x02
#define ADC18_DATA_RATE_30_SPS              0x03
#define ADC18_DATA_RATE_50_SPS              0x04
#define ADC18_DATA_RATE_60_SPS              0x05
#define ADC18_DATA_RATE_225_SPS             0x06
#define ADC18_DATA_RATE_450_SPS             0x07
#define ADC18_DATA_RATE_900_SPS             0x08
#define ADC18_DATA_RATE_1800_SPS            0x09
#define ADC18_DATA_RATE_3600_SPS            0x0A
#define ADC18_DATA_RATE_7200_SPS            0x0B
#define ADC18_DATA_RATE_14400_SPS           0x0C
#define ADC18_DATA_RATE_28800_SPS           0x0D
#define ADC18_DATA_RATE_57600_SPS           0x0E
#define ADC18_DATA_RATE_115200_SPS          0x0F
 
#define ADC18_PD_STATE_STANDBY              0x00
#define ADC18_PD_STATE_RESET                0x10
#define ADC18_CONV_MODE_CONTINUOUS          0x00
#define ADC18_CONV_MODE_SINGLE_CYCLE        0x02
#define ADC18_CONV_MODE_CONT_SINGLE_CYCLE   0x03
 
#define ADC18_CH_AI1_SINGLE_ENDED           0x00
#define ADC18_CH_AI2_SINGLE_ENDED           0x01
#define ADC18_CH_AI3_SINGLE_ENDED           0x02
#define ADC18_CH_AI4_SINGLE_ENDED           0x03
#define ADC18_CH_AI5_SINGLE_ENDED           0x04
#define ADC18_CH_AI6_SINGLE_ENDED           0x05
#define ADC18_CH_AI7_SINGLE_ENDED           0x06
#define ADC18_CH_AI8_SINGLE_ENDED           0x07
#define ADC18_CH_AI9_SINGLE_ENDED           0x08
#define ADC18_CH_AI10_SINGLE_ENDED          0x09
#define ADC18_CH_AI11_SINGLE_ENDED          0x0A
#define ADC18_CH_AI12_SINGLE_ENDED          0x0B
#define ADC18_CH_AI1_AI2_DIFFERENTIAL       0x0C
#define ADC18_CH_AI3_AI4_DIFFERENTIAL       0x0D
#define ADC18_CH_AI5_AI6_DIFFERENTIAL       0x0E
#define ADC18_CH_AI7_AI8_DIFFERENTIAL       0x0F
#define ADC18_CH_AI9_AI10_DIFFERENTIAL      0x10
#define ADC18_CH_AI11_AI12_DIFFERENTIAL     0x11
#define ADC18_CH_AI1_COM_AI2_MULTI_DIFF     0x12
#define ADC18_CH_AI1_COM_AI3_MULTI_DIFF     0x13
#define ADC18_CH_AI4_COM_AI5_MULTI_DIFF     0x14
#define ADC18_CH_AI4_COM_AI6_MULTI_DIFF     0x15
#define ADC18_CH_AI7_COM_AI8_MULTI_DIFF     0x16
#define ADC18_CH_AI7_COM_AI9_MULTI_DIFF     0x17
#define ADC18_CH_AI10_COM_AI11_MULTI_DIFF   0x18
#define ADC18_CH_AI10_COM_AI12_MULTI_DIFF   0x19
#define ADC18_AIP_TEST_DISABLED             0x00
#define ADC18_AIP_TEST_2MOHM_TO_AGND        0x40
#define ADC18_AIP_TEST_2MOHM_TO_HVDD        0x80
#define ADC18_AIP_TEST_2MOHM_TO_HVDD_AGND   0xC0
#define ADC18_AIN_TEST_DISABLED             0x00
#define ADC18_AIN_TEST_2MOHM_TO_AGND        0x10
#define ADC18_AIN_TEST_2MOHM_TO_HVDD        0x20
#define ADC18_AIN_TEST_2MOHM_TO_HVDD_AGND   0x30
 
#define ADC18_SET_DATA_SAMPLE_EDGE          SET_SPI_DATA_SAMPLE_EDGE
#define ADC18_SET_DATA_SAMPLE_MIDDLE        SET_SPI_DATA_SAMPLE_MIDDLE
 
 // adc18_set
 
#define ADC18_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.rdy = MIKROBUS( mikrobus, MIKROBUS_AN ); \
    cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
    cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
 
 // adc18_map
 // adc18
 
typedef struct
{
    // Output pins
    digital_out_t rst;          
    // Input pins
    digital_in_t  rdy;          
    digital_in_t  int_pin;      
    // Modules
    spi_master_t  spi;          
    pin_name_t  chip_select;    
    bool spi_crc_enable;        
} adc18_t;
 
typedef struct
{
    // Communication gpio pins
    pin_name_t  miso;           
    pin_name_t  mosi;           
    pin_name_t  sck;            
    pin_name_t  cs;             
    // Additional gpio pins
    pin_name_t  rst;            
    pin_name_t  rdy;            
    pin_name_t  int_pin;        
    // static variable
    uint32_t                           spi_speed;   
    spi_master_mode_t                  spi_mode;    
    spi_master_chip_select_polarity_t  cs_polarity; 
} adc18_cfg_t;
 
typedef enum
{
    ADC18_OK = 0,
    ADC18_ERROR = -1
 
} adc18_return_value_t;
 
void adc18_cfg_setup ( adc18_cfg_t *cfg );
 
err_t adc18_init ( adc18_t *ctx, adc18_cfg_t *cfg );
 
err_t adc18_default_cfg ( adc18_t *ctx );
 
err_t adc18_write_register ( adc18_t *ctx, uint8_t reg, uint32_t data_in );
 
err_t adc18_read_register ( adc18_t *ctx, uint8_t reg, uint32_t *data_out );
 
err_t adc18_enable_spi_crc ( adc18_t *ctx );
 
err_t adc18_disable_spi_crc ( adc18_t *ctx );
 
err_t adc18_check_communication ( adc18_t *ctx );
 
void adc18_reset_device ( adc18_t *ctx );
 
uint8_t adc18_get_rdy_pin ( adc18_t *ctx );
 
uint8_t adc18_get_int_pin ( adc18_t *ctx );
 
err_t adc18_start_conversion ( adc18_t *ctx, uint8_t data_rate );
 
err_t adc18_stop_conversion ( adc18_t *ctx );
 
err_t adc18_set_conversion_mode ( adc18_t *ctx, uint8_t mode );
 
err_t adc18_set_active_channel ( adc18_t *ctx, uint8_t channel );
 
err_t adc18_read_raw_adc ( adc18_t *ctx, int32_t *raw_adc );
 
err_t adc18_read_voltage ( adc18_t *ctx, float *voltage );
 
#ifdef __cplusplus
}
#endif
#endif // ADC18_H
 
 // adc18
 
// ------------------------------------------------------------------------ END