adswio3.h

Go to the documentation of this file.

/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef ADSWIO3_H
#define ADSWIO3_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define ADSWIO3_REG_NOP                               0x00
#define ADSWIO3_REG_CH_FUNC_SETUP                     0x01
#define ADSWIO3_REG_ADC_CONFIG                        0x02
#define ADSWIO3_REG_PWR_OPTIM_CONFIG                  0x03
#define ADSWIO3_REG_DIN_CONFIG1                       0x04
#define ADSWIO3_REG_DIN_CONFIG2                       0x05
#define ADSWIO3_REG_OUTPUT_CONFIG                     0x06
#define ADSWIO3_REG_RTD3W4W_CONFIG                    0x07
#define ADSWIO3_REG_DO_INT_CONFIG                     0x08
#define ADSWIO3_REG_DO_EXT_CONFIG                     0x09
#define ADSWIO3_REG_I_BURNOUT_CONFIG                  0x0A
#define ADSWIO3_REG_DAC_CODE                          0x0B
#define ADSWIO3_REG_DAC_ACTIVE                        0x0D
#define ADSWIO3_REG_GPIO_CONFIG0                      0x35
#define ADSWIO3_REG_GPIO_CONFIG1                      0x36
#define ADSWIO3_REG_GPIO_CONFIG2                      0x37
#define ADSWIO3_REG_GPIO_CONFIG3                      0x38
#define ADSWIO3_REG_FET_LKG_COMP                      0x39
#define ADSWIO3_REG_CHARGE_PUMP                       0x3A
#define ADSWIO3_REG_ADC_CONV_CTRL                     0x3B
#define ADSWIO3_REG_DIAG_ASSIGN                       0x3C
#define ADSWIO3_REG_DIN_COMP_OUT                      0x40
#define ADSWIO3_REG_ALERT_STATUS                      0x41
#define ADSWIO3_REG_LIVE_STATUS                       0x42
#define ADSWIO3_REG_ADC_RESULT1                       0x44
#define ADSWIO3_REG_ADC_RESULT2                       0x46
#define ADSWIO3_REG_ADC_DIAG_RESULT0                  0x53
#define ADSWIO3_REG_ADC_DIAG_RESULT1                  0x54
#define ADSWIO3_REG_ADC_DIAG_RESULT2                  0x55
#define ADSWIO3_REG_ADC_DIAG_RESULT3                  0x56
#define ADSWIO3_REG_DIN_COUNTER                       0x57
#define ADSWIO3_REG_SUPPLY_ALERT_STATUS               0x5B
#define ADSWIO3_REG_ALERT_MASK                        0x5F
#define ADSWIO3_REG_SUPPLY_ALERT_MASK                 0x60
#define ADSWIO3_REG_READ_SELECT                       0x64
#define ADSWIO3_REG_BURST_READ_SEL                    0x65
#define ADSWIO3_REG_PPC_TX                            0x66
#define ADSWIO3_REG_PPC_ACTIVE                        0x6E
#define ADSWIO3_REG_THERM_RST                         0x77
#define ADSWIO3_REG_CMD_KEY                           0x78
#define ADSWIO3_REG_SCRATCH_0                         0x79
#define ADSWIO3_REG_SCRATCH_1                         0x7A
#define ADSWIO3_REG_SILICON_REV                       0x7B
#define ADSWIO3_REG_SILICON_ID0                       0x7C
#define ADSWIO3_REG_SILICON_ID1                       0x7D
#define ADSWIO3_REG_SILICON_ID2                       0x7E
#define ADSWIO3_REG_SILICON_ID3                       0x7F
#define ADSWIO3_REG_HART_ALERT_STATUS                 0x80
#define ADSWIO3_REG_HART_RX                           0x81
#define ADSWIO3_REG_HART_TX                           0x82
#define ADSWIO3_REG_HART_FCR                          0x83
#define ADSWIO3_REG_HART_MCR                          0x84
#define ADSWIO3_REG_HART_RFC                          0x85
#define ADSWIO3_REG_HART_TFC                          0x86
#define ADSWIO3_REG_HART_ALERT_MASK                   0x87
#define ADSWIO3_REG_HART_CONFIG                       0x88
#define ADSWIO3_REG_HART_EVDET_COUNT                  0x89
 
 // adswio3_reg
 
#define ADSWIO3_CH_FUNC_SETUP_ADC                     0x00
#define ADSWIO3_CH_FUNC_SETUP_VTG_OUT                 0x01
#define ADSWIO3_CH_FUNC_SETUP_CURR_OUT                0x02
#define ADSWIO3_CH_FUNC_SETUP_VTG_IN                  0x03
#define ADSWIO3_CH_FUNC_SETUP_CURR_IN_EXT             0x04
#define ADSWIO3_CH_FUNC_SETUP_CURR_IN_LOOP            0x05
#define ADSWIO3_CH_FUNC_SETUP_2WIRE_RES_MEASURE       0x06
#define ADSWIO3_CH_FUNC_SETUP_3WIRE_RES_MEASURE       0x07
#define ADSWIO3_CH_FUNC_SETUP_DIGI_IN_LOG             0x08
#define ADSWIO3_CH_FUNC_SETUP_DIGI_IN_LOOP            0x09
#define ADSWIO3_CH_FUNC_SETUP_CURR_OUT_HART           0x0A
#define ADSWIO3_CH_FUNC_SETUP_CURR_IN_HART_EXT        0x0B
#define ADSWIO3_CH_FUNC_SETUP_CURR_IN_HART_LOOP       0x0C
 
#define ADSWIO3_DIAG_ASSIGN_AGND                      0x00
#define ADSWIO3_DIAG_ASSIGN_TEMP_SENS                 0x01
#define ADSWIO3_DIAG_ASSIGN_DVCC                      0x02
#define ADSWIO3_DIAG_ASSIGN_AVCC                      0x03
#define ADSWIO3_DIAG_ASSIGN_ALDO1V8                   0x04
#define ADSWIO3_DIAG_ASSIGN_DLDO1V8                   0x05
#define ADSWIO3_DIAG_ASSIGN_REFOUT                    0x06
#define ADSWIO3_DIAG_ASSIGN_AVDD                      0x07
#define ADSWIO3_DIAG_ASSIGN_AVSS                      0x08
#define ADSWIO3_DIAG_ASSIGN_LVIN                      0x09
#define ADSWIO3_DIAG_ASSIGN_SENSEL                    0x0A
#define ADSWIO3_DIAG_ASSIGN_SENSE_EXT1                0x0B
#define ADSWIO3_DIAG_ASSIGN_SENSE_EXT2                0x0C
#define ADSWIO3_DIAG_ASSIGN_DO_VDD                    0x0D
#define ADSWIO3_DIAG_ASSIGN_AGND0                     0x0E
#define ADSWIO3_DIAG_ASSIGN_CURRENT_EXT               0x0F
#define ADSWIO3_DIAG_RESULT_SEL_0                     0x00
#define ADSWIO3_DIAG_RESULT_SEL_1                     0x01
#define ADSWIO3_DIAG_RESULT_SEL_2                     0x02
#define ADSWIO3_DIAG_RESULT_SEL_3                     0x03
 
#define ADSWIO3_READ_SELECT_SPI_RD_RET_INFO           0x01
#define ADSWIO3_READ_SELECT_AUTO_RD_EN                0x02
#define ADSWIO3_READ_REG_STATUS_BIT                   0x7F
 
#define ADSWIO3_PWR_OPTIM_CONFIG_SEL_SEN_EXT1         0x00
#define ADSWIO3_PWR_OPTIM_CONFIG_SEL_SEN_EXT2         0x01
#define ADSWIO3_PWR_OPTIM_CONFIG_SEL_SEN_HF           0x02
#define ADSWIO3_PWR_OPTIM_CONFIG_SEL_SEN_LF           0x03
#define ADSWIO3_PWR_OPTIM_CONFIG_SEL_SEN_AGND         0x04
#define ADSWIO3_PWR_OPTIM_CONFIG_LOW_PWR              0x00
#define ADSWIO3_PWR_OPTIM_CONFIG_FULL_PWR             0x01
 
#define ADSWIO3_RTD3W4W_CONFIG_RTD_CURR_250UA         0x00
#define ADSWIO3_RTD3W4W_CONFIG_RTD_CURR_500UA         0x01
#define ADSWIO3_RTD3W4W_CONFIG_RTD_CURR_750UA         0x02
#define ADSWIO3_RTD3W4W_CONFIG_RTD_CURR_1MA           0x03
#define ADSWIO3_RTD3W4W_CONFIG_RTD_EXC                0x00
#define ADSWIO3_RTD3W4W_CONFIG_RTD_EXC_SWAP           0x01
#define ADSWIO3_RTD3W4W_CONFIG_RTD_3_WIRE             0x00
#define ADSWIO3_RTD3W4W_CONFIG_RTD_4_WIRE             0x01
#define ADSWIO3_RTD3W4W_CONFIG_BIT_MASK               0xFFF0u
 
#define ADSWIO3_ADC_CONV_CTRL_CONV_DIS                0x00
#define ADSWIO3_ADC_CONV_CTRL_CONV_EN                 0x01
#define ADSWIO3_ADC_CONV_CTRL_CONV_DIS                0x00
#define ADSWIO3_ADC_CONV_DIAG_DIS                     0x00
#define ADSWIO3_ADC_CONV_DIAG_EN                      0x01
#define ADSWIO3_ADC_CONV_SEQ_MODE_STBY                0x00
#define ADSWIO3_ADC_CONV_SEQ_START_SGL_CNV            0x01
#define ADSWIO3_ADC_CONV_SEQ_START_CONT_CNV           0x02
#define ADSWIO3_ADC_CONV_SEQ_STOP_CONT_CNV            0x03
#define ADSWIO3_ADC_CONV_RATE_DIAG_20_SPS             0x00
#define ADSWIO3_ADC_CONV_RATE_DIAG_4_8K_SPS           0x01
#define ADSWIO3_ADC_CONV_RATE_DIAG_9_6K_SPS           0x02
 
#define ADSWIO3_ADC_CONFIG_CNV_RATE_10_SPS            0x00
#define ADSWIO3_ADC_CONFIG_CNV_RATE_20_SPS            0x01
#define ADSWIO3_ADC_CONFIG_CNV_RATE_1_2K_SPS          0x02
#define ADSWIO3_ADC_CONFIG_CNV_RATE_4_8K_SPS          0x03
#define ADSWIO3_ADC_CONFIG_CNV_RATE_9_6K_SPS          0x04
#define ADSWIO3_ADC_CONFIG_CNV_RANGE_P_12V            0x00
#define ADSWIO3_ADC_CONFIG_CNV_RANGE_PM_12V           0x01
#define ADSWIO3_ADC_CONFIG_CNV_RANGE_PM_2_5V          0x02
#define ADSWIO3_ADC_CONFIG_CNV_RANGE_M_2_5V           0x03
#define ADSWIO3_ADC_CONFIG_CNV_RANGE_P_2_5V           0x04
#define ADSWIO3_ADC_CONFIG_CNV_RANGE_P_0_625V         0x05
#define ADSWIO3_ADC_CONFIG_CNV_RANGE_PM_0_104V        0x06
#define ADSWIO3_ADC_CONFIG_CNV1_SENSELF_AGND_SEN      0x00
#define ADSWIO3_ADC_CONFIG_CNV1_SENSELF_SENSELF       0x01
#define ADSWIO3_ADC_CONFIG_CNV1_SENSE_EXT2_EXT1       0x02
#define ADSWIO3_ADC_CONFIG_CNV1_SENSELF_SENSE_EXT1    0x03
#define ADSWIO3_ADC_CONFIG_CNV2_EXT1_AGND_SEN         0x00
#define ADSWIO3_ADC_CONFIG_CNV2_EXT2_AGND_SEN         0x01
#define ADSWIO3_ADC_CONFIG_CNV2_SENSE_EXT2_EXT1       0x02
#define ADSWIO3_ADC_CONFIG_CNV2_AGND_AGND             0x03
 
#define ADSWIO3_DAC_CODE_RESOLUTION                   0x3FFFu
 
#define ADSWIO3_GPIO_CONFIG_SEL_A                     0x00
#define ADSWIO3_GPIO_CONFIG_SEL_B                     0x01
#define ADSWIO3_GPIO_CONFIG_SEL_C                     0x02
#define ADSWIO3_GPIO_CONFIG_SEL_D                     0x03
#define ADSWIO3_GPIO_CONFIG_GPO_DATA_LOW              0x00
#define ADSWIO3_GPIO_CONFIG_GPO_DATA_HIGH             0x01
#define ADSWIO3_GPIO_CONFIG_GP_WK_PD_DIS              0x00
#define ADSWIO3_GPIO_CONFIG_GP_WK_PD_EN               0x01
#define ADSWIO3_GPIO_CONFIG_DATA_LOGIC_LOW            0x00
#define ADSWIO3_GPIO_CONFIG_DATA_LOGIC_HIGH           0x01
#define ADSWIO3_GPIO_CONFIG_MODE_HI                   0x00
#define ADSWIO3_GPIO_CONFIG_MODE_OUT                  0x01
#define ADSWIO3_GPIO_CONFIG_MODE_OUT_IN               0x02
#define ADSWIO3_GPIO_CONFIG_MODE_IN                   0x03
#define ADSWIO3_GPIO_CONFIG_MODE_FET                  0x04
#define ADSWIO3_GPIO_CONFIG_MODE_C_TXD_IN             0x05
#define ADSWIO3_GPIO_CONFIG_MODE_C_TXD_OUT            0x06
#define ADSWIO3_GPIO_CONFIG_MODE_TX_COM               0x07
 
#define ADSWIO3_ADC_RESULT_SEL_1                      0x00
#define ADSWIO3_ADC_RESULT_SEL_2                      0x01
#define ADSWIO3_ADC_RESULT_RESOLUTION                 65536.0f
#define ADSWIO3_ADC_RESULT_RANGE                      12.0f
 
#define ADSWIO3_NTC_VTG_AT_25_C                       1.0f
#define ADSWIO3_NTC_TABLE_POS_CALC_N                  0.2f
#define ADSWIO3_NTC_TABLE_POS_CALC_P                  0.5f
#define ADSWIO3_NTC_TABLE_POS_MAX                     9
#define ADSWIO3_NTC_TABLE_NEG_MAX                     13
#define ADSWIO3_NTC_TEMP_AT_1_V                       25.0f
 
#define ADSWIO3_ALERT_SPI_ERR_MASK                    0x0004u
#define ADSWIO3_ALERT_PPC_ERR_MASK                    0x0008u
#define ADSWIO3_ALERT_TEMP_ALERT_MASK                 0x0010u
#define ADSWIO3_ALERT_ADC_ERR_MASK                    0x0020u
#define ADSWIO3_ALERT_DI_SC_ERR_MASK                  0x0040u
#define ADSWIO3_ALERT_DI_OC_ERR_MASK                  0x0080u
#define ADSWIO3_ALERT_DO_THERM_RESET_MASK             0x0100u
#define ADSWIO3_ALERT_DO_EXT_SC_MASK                  0x0200u
#define ADSWIO3_ALERT_DO_INT_SC_MASK                  0x0400u
#define ADSWIO3_ALERT_DO_EXT_TIMEOUT_MASK             0x0800u
#define ADSWIO3_ALERT_DO_INT_TIMEOUT_MASK             0x1000u
#define ADSWIO3_ALERT_ANALOG_IO_SC_MASK               0x2000u
#define ADSWIO3_ALERT_ANALOG_IO_OC_MASK               0x4000u
 
#define ADSWIO3_PPC_TX_DATA_BIT_MASK                  0x00FFu
#define ADSWIO3_PPC_TX_AVDD_VTG_MIN                   6.0f
#define ADSWIO3_PPC_TX_AVDD_VTG_DEFAULT               24.00f
#define ADSWIO3_PPC_TX_AVDD_VTG_MAX                   24.20f
#define ADSWIO3_PPC_TX_AVDD_DATA_MAX                  255.0f
#define ADSWIO3_PPC_TX_AVDD_DATA_CALC                 1.0f
#define ADSWIO3_PPC_ACTIVE_TX_BUSY                    0x0100u
#define ADSWIO3_PPC_ACTIVE_PPC_TX_BUSY_ERR            0x0200u
#define ADSWIO3_PPC_ACTIVE_PPC_TX_ACK_ERR             0x0400u
 
#define ADSWIO3_DIN_CONFIG2_DIN_THRESH_MODE           0x0080u
#define ADSWIO3_SENS_SEL_TRSH_MULTI                   50.0f
#define ADSWIO3_SENS_SEL_SCALE_MULTI                  60.0f
#define ADSWIO3_SENS_SEL_TRSH_CORR_VAL                20.0f
 
#define ADSWIO3_DIGI_OUT_MODE_SRC                      0.3125f
#define ADSWIO3_DIGI_OUT_MODE_SNK                      2.5f
 
#define ADSWIO3_CALC_DIAG_AGND( DIAG_ADC )         ( DIAG_ADC / 65536.0f ) * 2.5f
#define ADSWIO3_CALC_DIAG_SENS_TEMP( DIAG_ADC )    ( DIAG_ADC / 8.95f ) - 40.0f
#define ADSWIO3_CALC_DIAG_DVCC( DIAG_ADC )         ( DIAG_ADC / 65536.0f ) * 8.25f
#define ADSWIO3_CALC_DIAG_ALDO1V8( DIAG_ADC )      ( DIAG_ADC / 65536.0f ) * 5.825f
#define ADSWIO3_CALC_DIAG_DLDO1V8( DIAG_ADC )      ( DIAG_ADC / 65536.0f ) * 7.5f
#define ADSWIO3_CALC_DIAG_REFOUT( DIAG_ADC )       ( DIAG_ADC / 65536.0f ) * 3.125f
#define ADSWIO3_CALC_DIAG_LVIN( DIAG_ADC )         ( DIAG_ADC / 65536.0f ) * 2.5f
#define ADSWIO3_CALC_DIAG_SENSE_EXT( DIAG_ADC )    ( ( DIAG_ADC / 65536.0f ) * 50.0f ) - 20.0f
#define ADSWIO3_CALC_DIAG_DO_VDD( DIAG_ADC )       ( DIAG_ADC / 65536.0f ) * 49.2f
#define ADSWIO3_CALC_DIAG_CURRENT( DIAG_ADC )      ( DIAG_ADC / 65536.0f ) / 1.38f
#define ADSWIO3_CALC_DIAG_VTG_AVDD( DIAG_ADC )     ( DIAG_ADC / 65536.0f ) * 50.0f
#define ADSWIO3_CALC_DIAG_VTG_AVSS( DIAG_ADC )     ( ( DIAG_ADC / 65536.0f ) * 31.017f ) - 20.0f
#define ADSWIO3_CALC_DIAG_VTG_AVCC( DIAG_ADC )     ( DIAG_ADC / 65536.0f ) * 17.5f
 
#define ADSWIO3_SET_DATA_SAMPLE_EDGE      SET_SPI_DATA_SAMPLE_EDGE
#define ADSWIO3_SET_DATA_SAMPLE_MIDDLE    SET_SPI_DATA_SAMPLE_MIDDLE
 
 // adswio3_set
 
#define ADSWIO3_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK );  \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS );   \
    cfg.rst  = MIKROBUS( mikrobus, MIKROBUS_RST );  \
    cfg.rdy  = MIKROBUS( mikrobus, MIKROBUS_PWM );  \
    cfg.alr  = MIKROBUS( mikrobus, MIKROBUS_INT )
 
 // adswio3_map
 // adswio3
 
typedef struct
{
    // Output pins
    digital_out_t rst;  
    // Input pins
    digital_in_t rdy;    
    digital_in_t alr;    
    // Modules
    spi_master_t spi;          
    pin_name_t   chip_select;  
    float dig_out_mode;    
} adswio3_t;
 
typedef struct
{
    // Communication gpio pins
    pin_name_t miso;            
    pin_name_t mosi;            
    pin_name_t sck;             
    pin_name_t cs;              
    // Additional gpio pins
    pin_name_t rst;    
    pin_name_t rdy;    
    pin_name_t alr;    
    // static variable
    uint32_t                          spi_speed;    
    spi_master_mode_t                 spi_mode;     
    spi_master_chip_select_polarity_t cs_polarity;  
} adswio3_cfg_t;
 
typedef struct
{
    uint8_t  conv2_rate;     
    uint8_t  conv1_rate;     
    uint8_t  conv2_range;    
    uint8_t  conv1_range;    
    uint8_t  conv2_mux;      
    uint8_t  conv1_mux;      
} adswio3_adc_cfg_t;
 
typedef struct
{
    uint8_t  vout_range;       
    uint8_t  slew_en;          
    uint8_t  slew_lin_step;    
    uint8_t  slew_lin_rate;    
    uint8_t  i_limit;          
} adswio3_output_cfg_t;
 
typedef struct
{
    uint8_t  conv_rate_diag;    
    uint8_t  conv_seq;          
    uint8_t  diag_3_en;         
    uint8_t  diag_2_en;         
    uint8_t  diag_1_en;         
    uint8_t  diag_0_en;         
    uint8_t  conv2_en;          
    uint8_t  conv1_en;          
} adswio3_adc_cnv_ctrl_t;
 
typedef struct
{
    uint8_t  hart_alert;        
    uint8_t  analog_io_oc;      
    uint8_t  analog_io_sc;      
    uint8_t  do_int_timeout;    
    uint8_t  do_ext_timeout;    
    uint8_t  do_int_sc;         
    uint8_t  do_ext_sc;         
    uint8_t  do_therm_reset;    
    uint8_t  di_oc_err;         
    uint8_t  di_sc_err;         
    uint8_t  adc_err;           
    uint8_t  temp_alert;        
    uint8_t  ppc_err;           
    uint8_t  spi_err;           
    uint8_t  supply_err;        
    uint8_t  reset_occurred;    
} adswio3_alert_status_t;
 
typedef struct
{
    uint8_t  analog_io_oc_status;      
    uint8_t  analog_io_sc_status;      
    uint8_t  do_int_sc_status;         
    uint8_t  do_ext_sc_status;         
    uint8_t  do_therm_reset_status;    
    uint8_t  di_oc_status;             
    uint8_t  di_sc_status;             
    uint8_t  temp_alert_status;        
    uint8_t  adc_data_rdy;             
    uint8_t  adc_busy;                 
    uint8_t  supply_status;            
} adswio3_live_status_t;
 
 
typedef enum
{
    ADSWIO3_OK = 0,
    ADSWIO3_ERROR = -1
 
} adswio3_return_value_t;
 
void adswio3_cfg_setup ( adswio3_cfg_t *cfg );
 
err_t adswio3_init ( adswio3_t *ctx, adswio3_cfg_t *cfg );
 
err_t adswio3_default_cfg ( adswio3_t *ctx );
 
void adswio3_hw_reset ( adswio3_t *ctx );
 
err_t adswio3_register_write ( adswio3_t *ctx, uint8_t reg, uint16_t data_in );
 
err_t adswio3_register_read ( adswio3_t *ctx, uint8_t reg, uint16_t *data_out );
 
err_t adswio3_function_setup ( adswio3_t *ctx, uint8_t ch_fun );
 
err_t adswio3_adc_config ( adswio3_t *ctx, adswio3_adc_cfg_t adc_config );
 
err_t adswio3_pwr_optim_config ( adswio3_t *ctx, uint8_t buff_sel, uint8_t buff_mode );
 
err_t adswio3_output_config ( adswio3_t *ctx, adswio3_output_cfg_t out_cfg );
 
err_t adswio3_rtd_config ( adswio3_t *ctx, uint8_t rtd_mode_sel, uint8_t rtd_exc_swap, uint8_t rtd_current );
 
err_t adswio3_set_dac_code ( adswio3_t *ctx, uint16_t dac_code );
 
err_t adswio3_set_gpio_config ( adswio3_t *ctx, uint8_t gpio_sel, uint8_t gpo_data, 
                                                uint8_t gp_wk_pd_en, uint8_t out_mode );
 
err_t adswio3_set_adc_cnv ( adswio3_t *ctx, adswio3_adc_cnv_ctrl_t adc_cnv_ctrl );
 
err_t adswio3_set_diag_assign ( adswio3_t *ctx, uint8_t diag_0, uint8_t diag_1, 
                                                uint8_t diag_2, uint8_t diag_3 );
 
err_t adswio3_get_status ( adswio3_t *ctx, adswio3_alert_status_t *alert_status, 
                                           adswio3_live_status_t *live_status );
 
err_t adswio3_get_adc_res ( adswio3_t *ctx, uint8_t adc_sel, uint16_t *adc_data );
 
err_t adswio3_get_voltage_input ( adswio3_t *ctx, uint8_t adc_sel, float *voltage );
 
err_t adswio3_get_diag_res ( adswio3_t *ctx, uint8_t diag_sel, uint16_t *adc_diag_data );
 
err_t adswio3_get_diag_vtg ( adswio3_t *ctx, uint8_t diag_sel, float *diag_vtg );
 
err_t adswio3_get_ntc_temp ( adswio3_t *ctx, uint8_t diag_sel, float *ntc_temp );
 
err_t adswio3_set_alert_mask ( adswio3_t *ctx, uint16_t alert_mask );
 
err_t adswio3_set_ppc_vtg ( adswio3_t *ctx, float ppc_vtg );
 
uint8_t adswio3_get_ready ( adswio3_t *ctx );
 
uint8_t adswio3_get_alarm ( adswio3_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif // ADSWIO3_H
 
 // adswio3
 
// ------------------------------------------------------------------------ END