balancer5 2.0.0.0
balancer5.h
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1/*
2 * MikroSDK - MikroE Software Development Kit
3 * Copyright© 2020 MikroElektronika d.o.o.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22 * OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
33// ----------------------------------------------------------------------------
34
35#ifndef BALANCER5_H
36#define BALANCER5_H
37
42#ifdef PREINIT_SUPPORTED
43#include "preinit.h"
44#endif
45
46#ifdef MikroCCoreVersion
47 #if MikroCCoreVersion >= 1
48 #include "delays.h"
49 #endif
50#endif
51
52#include "drv_digital_out.h"
53#include "drv_digital_in.h"
54#include "drv_i2c_master.h"
55
56
57// -------------------------------------------------------------- PUBLIC MACROS
67#define BALANCER5_MAP_MIKROBUS( cfg, mikrobus ) \
68 cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
69 cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
70 cfg.pg = MIKROBUS( mikrobus, MIKROBUS_AN ); \
71 cfg.pss = MIKROBUS( mikrobus, MIKROBUS_RST ); \
72 cfg.cd = MIKROBUS( mikrobus, MIKROBUS_CS ); \
73 cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
80#define BALANCER5_RETVAL uint8_t
81
82#define BALANCER5_OK 0x00
83#define BALANCER5_INIT_ERROR 0xFF
90#define BALANCER5_REG_CELL_V_LIMIT 0x00
91#define BALANCER5_REG_CHARGE_CURR_LIMIT 0x01
92#define BALANCER5_REG_INPUT_V_LIMIT 0x02
93#define BALANCER5_REG_INPUT_CURR_LIMIT 0x03
94#define BALANCER5_REG_PRECHARGE_N_TERMINATION_CTRL 0x04
95#define BALANCER5_REG_CHARGER_CTRL_1 0x05
96#define BALANCER5_REG_CHARGER_CTRL_2 0x06
97#define BALANCER5_REG_CHARGER_CTRL_3 0x07
98#define BALANCER5_REG_CHARGER_CTRL_4 0x08
99#define BALANCER5_REG_ICO_CURR_LIMIT 0x0A
100#define BALANCER5_REG_CHARGER_STATUS_1 0x0B
101#define BALANCER5_REG_CHARGER_STATUS_2 0x0C
102#define BALANCER5_REG_NTC_STATUS 0x0D
103#define BALANCER5_REG_FAULT_STATUS 0x0E
104#define BALANCER5_REG_CHARGER_FLAG_1 0x0F
105#define BALANCER5_REG_CHARGER_FLAG_2 0x10
106#define BALANCER5_REG_FAULT_FLAG 0x11
107#define BALANCER5_REG_CHARGER_MASK_1 0x12
108#define BALANCER5_REG_CHARGER_MASK_2 0x13
109#define BALANCER5_REG_FAULT_MASK 0x14
110#define BALANCER5_REG_ADC_CTRL 0x15
111#define BALANCER5_REG_ADC_FUNCTION_DISABLE 0x16
112#define BALANCER5_REG_IBUS_ADC1 0x17
113#define BALANCER5_REG_IBUS_ADC0 0x18
114#define BALANCER5_REG_ICHG_ADC1 0x19
115#define BALANCER5_REG_ICHG_ADC0 0x1A
116#define BALANCER5_REG_VBUS_ADC1 0x1B
117#define BALANCER5_REG_VBUS_ADC0 0x1C
118#define BALANCER5_REG_VBAT_ADC1 0x1D
119#define BALANCER5_REG_VBAT_ADC0 0x1E
120#define BALANCER5_REG_VCELLTOP_ADC1 0x1F
121#define BALANCER5_REG_VCELLTOP_ADC0 0x20
122#define BALANCER5_REG_TS_ADC1 0x21
123#define BALANCER5_REG_TS_ADC0 0x22
124#define BALANCER5_REG_TDIE_ADC1 0x23
125#define BALANCER5_REG_TDIE_ADC0 0x24
126#define BALANCER5_REG_PART_INFO 0x25
127#define BALANCER5_REG_VCELLBOT_ADC1 0x26
128#define BALANCER5_REG_VCELLBOT_ADC0 0x27
129#define BALANCER5_REG_CELL_BALANCING_CTRL1 0x28
130#define BALANCER5_REG_CELL_BALANCING_CTRL2 0x29
131#define BALANCER5_REG_CELL_BALANCING_STATUS_N_CNTRL 0x2A
132#define BALANCER5_REG_CELL_BALANCING_FLAG 0x2B
133#define BALANCER5_REG_CELL_BALANCING_MASK 0x2C
140#define BALANCER5_ERROR_ID 0xAA
141#define BALANCER5_SUCCESSFUL 0xFF
148#define BALANCER5_DEVICE_ID 0x29
154#define BALANCER5_PIN_STATUS_HIGH 1
155#define BALANCER5_PIN_STATUS_LOW 0
161#define BALANCER5_CHARGE_OFF 1
162#define BALANCER5_CHARGE_ON 0
168#define BALANCER5_ADC_CTRL_ENABLE 0x80
169#define BALANCER5_ADC_CTRL_DISABLE 0x00
170#define BALANCER5_ADC_CTRL_CONT_CONV 0x00
171#define BALANCER5_ADC_CTRL_ONE_SHOT_CONV 0x40
172#define BALANCER5_ADC_CTRL_15BIT_RES 0x00
173#define BALANCER5_ADC_CTRL_14BIT_RES 0x10
174#define BALANCER5_ADC_CTRL_13BIT_RES 0x20
175#define BALANCER5_ADC_CTRL_12BIT_RES 0x30
181#define BALANCER5_CS1_IINDPM_NORMAL 0x00
182#define BALANCER5_CS1_IINDPM_IN_REGULATION 0x40
183#define BALANCER5_CS1_VINDPM_NORMAL 0x00
184#define BALANCER5_CS1_VINDPM_IN_REGULATION 0x20
185#define BALANCER5_CS1_IC_NORMAL 0x00
186#define BALANCER5_CS1_IC_IN_THERMAL_REGULATION 0x10
187#define BALANCER5_CS1_WD_NORMAL 0x00
188#define BALANCER5_CS1_WD_TIMER_EXPIRED 0x08
189#define BALANCER5_CS1_NOT_CHARGING 0x00
190#define BALANCER5_CS1_TRICKLE_CHARGE 0x01
191#define BALANCER5_CS1_PRE_CHARGE 0x02
192#define BALANCER5_CS1_FAST_CHARGE 0x03
193#define BALANCER5_CS1_TAPER_CHARGE 0x04
194#define BALANCER5_CS1_TOP_OFF_TIMER_CHARGE 0x05
195#define BALANCER5_CS1_CHARGE_TERMINATION 0x06
201#define BALANCER5_CS2_POWER_GOOD 0x80
202#define BALANCER5_CS2_POWER_NOT_GOOD 0x00
203#define BALANCER5_CS2_NO_INPUT 0x00
204#define BALANCER5_CS2_USB_HOST_SDP 0x10
205#define BALANCER5_CS2_USB_CDP 0x20
206#define BALANCER5_CS2_ADAPTER 0x30
207#define BALANCER5_CS2_POORSRC 0x40
208#define BALANCER5_CS2_UNKNOWN_ADAPTER 0x50
209#define BALANCER5_CS2_NON_STANDARD_ADAPTER 0x60
210#define BALANCER5_CS2_ICO_DISABLED 0x00
211#define BALANCER5_CS2_ICO_OPTIMIZATION_IN_PROGRESS 0x02
212#define BALANCER5_CS2_MAX_INPUT 0x04
218#define BALANCER5_SLAVE_ADDRESS 0x6A
222 // End group macro
223// --------------------------------------------------------------- PUBLIC TYPES
232typedef struct
233{
234 // Output pins
235
236 digital_out_t cd;
237
238
239 // Input pins
240
241 digital_in_t pg;
242 digital_in_t pss;
243 digital_in_t int_pin;
244
245 // Modules
246
247 i2c_master_t i2c;
248
249 // ctx variable
250
252
254
258typedef struct
259{
260 // Communication gpio pins
261
262 pin_name_t scl;
263 pin_name_t sda;
264
265 // Additional gpio pins
266
267 pin_name_t pg;
268 pin_name_t pss;
269 pin_name_t cd;
270 pin_name_t int_pin;
271
272 // static variable
273
274 uint32_t i2c_speed;
275 uint8_t i2c_address;
276
278
279 // End types group
280
281// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
282
288#ifdef __cplusplus
289extern "C"{
290#endif
291
301
310
324
335void balancer5_generic_write ( balancer5_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
336
348void balancer5_generic_read ( balancer5_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
349
360uint8_t balancer5_read_data( balancer5_t *ctx, uint8_t reg_addr );
361
362
372void balancer5_write_data ( balancer5_t *ctx, uint8_t reg_addr, uint8_t write_data );
373
382void balancer5_charge ( balancer5_t *ctx, uint8_t state );
383
394
405
416
427
428
429#ifdef __cplusplus
430}
431#endif
432#endif // _BALANCER5_H_
433
434 // End public_function group
436
437// ------------------------------------------------------------------------- END
#define BALANCER5_RETVAL
Definition balancer5.h:80
BALANCER5_RETVAL balancer5_init(balancer5_t *ctx, balancer5_cfg_t *cfg)
Initialization function.
void balancer5_write_data(balancer5_t *ctx, uint8_t reg_addr, uint8_t write_data)
Generic function for writing one Byte data to registar.
void balancer5_cfg_setup(balancer5_cfg_t *cfg)
Config Object Initialization function.
void balancer5_default_cfg(balancer5_t *ctx)
Click Default Configuration function.
void balancer5_charge(balancer5_t *ctx, uint8_t state)
Function for setting charging status.
uint8_t balancer5_get_power_source_status(balancer5_t *ctx)
Gets state of the psel pin on rst.
void balancer5_generic_read(balancer5_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
uint8_t balancer5_read_data(balancer5_t *ctx, uint8_t reg_addr)
Generic function for reading one Byte data from registar.
uint8_t balancer5_get_int_status(balancer5_t *ctx)
Gets state of the int pin.
uint8_t balancer5_get_power_good_status(balancer5_t *ctx)
Gets state of the pg pin on an.
void balancer5_generic_write(balancer5_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
uint8_t balancer5_check_id(balancer5_t *ctx)
Checks if device ID is good.
Click configuration structure definition.
Definition balancer5.h:259
pin_name_t pss
Definition balancer5.h:268
uint32_t i2c_speed
Definition balancer5.h:274
pin_name_t cd
Definition balancer5.h:269
pin_name_t scl
Definition balancer5.h:262
pin_name_t int_pin
Definition balancer5.h:270
pin_name_t sda
Definition balancer5.h:263
pin_name_t pg
Definition balancer5.h:267
uint8_t i2c_address
Definition balancer5.h:275
Click ctx object definition.
Definition balancer5.h:233
digital_in_t pss
Definition balancer5.h:242
digital_out_t cd
Definition balancer5.h:236
digital_in_t int_pin
Definition balancer5.h:243
i2c_master_t i2c
Definition balancer5.h:247
uint8_t slave_address
Definition balancer5.h:251
digital_in_t pg
Definition balancer5.h:241