List of registers of 3D Hall 10 Click driver. More...

Macros
#define	C3DHALL10_REG_DEVICE_CONFIG 0x00
	3D Hall 10 register list.

#define	C3DHALL10_REG_SENSOR_CONFIG 0x01

#define	C3DHALL10_REG_SYSTEM_CONFIG 0x02

#define	C3DHALL10_REG_ALERT_CONFIG 0x03

#define	C3DHALL10_REG_X_THRX_CONFIG 0x04

#define	C3DHALL10_REG_Y_THRX_CONFIG 0x05

#define	C3DHALL10_REG_Z_THRX_CONFIG 0x06

#define	C3DHALL10_REG_T_THRX_CONFIG 0x07

#define	C3DHALL10_REG_CONV_STATUS 0x08

#define	C3DHALL10_REG_X_CH_RESULT 0x09

#define	C3DHALL10_REG_Y_CH_RESULT 0x0A

#define	C3DHALL10_REG_Z_CH_RESULT 0x0B

#define	C3DHALL10_REG_TEMP_RESULT 0x0C

#define	C3DHALL10_REG_AFE_STATUS 0x0D

#define	C3DHALL10_REG_SYS_STATUS 0x0E

#define	C3DHALL10_REG_TEST_CONFIG 0x0F

#define	C3DHALL10_REG_OSC_MONITOR 0x10

#define	C3DHALL10_REG_MAG_GAIN_CONFIG 0x11

#define	C3DHALL10_REG_MAG_OFFSET_CONFIG 0x12

#define	C3DHALL10_REG_ANGLE_RESULT 0x13

#define	C3DHALL10_REG_MAGNITUDE_RESULT 0x14

Detailed Description

List of registers of 3D Hall 10 Click driver.

Macro Definition Documentation

◆ C3DHALL10_REG_AFE_STATUS

#define C3DHALL10_REG_AFE_STATUS 0x0D

◆ C3DHALL10_REG_ALERT_CONFIG

#define C3DHALL10_REG_ALERT_CONFIG 0x03

◆ C3DHALL10_REG_ANGLE_RESULT

#define C3DHALL10_REG_ANGLE_RESULT 0x13

◆ C3DHALL10_REG_CONV_STATUS

#define C3DHALL10_REG_CONV_STATUS 0x08

◆ C3DHALL10_REG_DEVICE_CONFIG

#define C3DHALL10_REG_DEVICE_CONFIG 0x00

3D Hall 10 register list.

Specified register list of 3D Hall 10 Click driver.

◆ C3DHALL10_REG_MAG_GAIN_CONFIG

#define C3DHALL10_REG_MAG_GAIN_CONFIG 0x11

◆ C3DHALL10_REG_MAG_OFFSET_CONFIG

#define C3DHALL10_REG_MAG_OFFSET_CONFIG 0x12

◆ C3DHALL10_REG_MAGNITUDE_RESULT

#define C3DHALL10_REG_MAGNITUDE_RESULT 0x14

◆ C3DHALL10_REG_OSC_MONITOR

#define C3DHALL10_REG_OSC_MONITOR 0x10

◆ C3DHALL10_REG_SENSOR_CONFIG

#define C3DHALL10_REG_SENSOR_CONFIG 0x01

◆ C3DHALL10_REG_SYS_STATUS

#define C3DHALL10_REG_SYS_STATUS 0x0E

◆ C3DHALL10_REG_SYSTEM_CONFIG

#define C3DHALL10_REG_SYSTEM_CONFIG 0x02

◆ C3DHALL10_REG_T_THRX_CONFIG

#define C3DHALL10_REG_T_THRX_CONFIG 0x07

◆ C3DHALL10_REG_TEMP_RESULT

#define C3DHALL10_REG_TEMP_RESULT 0x0C

◆ C3DHALL10_REG_TEST_CONFIG

#define C3DHALL10_REG_TEST_CONFIG 0x0F

◆ C3DHALL10_REG_X_CH_RESULT

#define C3DHALL10_REG_X_CH_RESULT 0x09

◆ C3DHALL10_REG_X_THRX_CONFIG

#define C3DHALL10_REG_X_THRX_CONFIG 0x04

◆ C3DHALL10_REG_Y_CH_RESULT

#define C3DHALL10_REG_Y_CH_RESULT 0x0A

◆ C3DHALL10_REG_Y_THRX_CONFIG

#define C3DHALL10_REG_Y_THRX_CONFIG 0x05

◆ C3DHALL10_REG_Z_CH_RESULT

#define C3DHALL10_REG_Z_CH_RESULT 0x0B

◆ C3DHALL10_REG_Z_THRX_CONFIG

#define C3DHALL10_REG_Z_THRX_CONFIG 0x06

Macros