c420mat2.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef C420MAT2_H
#define C420MAT2_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define C420MAT2_REG_XFER                            0x01
#define C420MAT2_REG_NOP                             0x02
#define C420MAT2_REG_WR_MODE                         0x03
#define C420MAT2_REG_DACCODE                         0x04
#define C420MAT2_REG_ERR_CONFIG                      0x05
#define C420MAT2_REG_ERR_LOW                         0x06
#define C420MAT2_REG_ERR_HIGH                        0x07
#define C420MAT2_REG_RESET                           0x08
#define C420MAT2_REG_STATUS                          0x09
 
 // c420mat2_reg
 
#define C420MAT2_CMD_XFER                            0x00FF
#define C420MAT2_CMD_NOP                             0x0000
#define C420MAT2_CMD_WR_MODE_DISABLE                 0x0000
#define C420MAT2_CMD_WR_MODE_ENABLE                  0x0001
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_50ms     0x0000
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_100ms    0x0100
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_150ms    0x0200
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_200ms    0x0300
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_250ms    0x0400
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_300ms    0x0500
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_350ms    0x0600
#define C420MAT2_CMD_RETRY_TIMEL_RETRY_TIME_400ms    0x0700
#define C420MAT2_CMD_DIS_RETRY_LOOP_DISABLE          0x0000
#define C420MAT2_CMD_DIS_RETRY_LOOP_ENABLE           0x0080
#define C420MAT2_CMD_MASK_LOOP_ERR_DISABLE           0x0000
#define C420MAT2_CMD_MASK_LOOP_ERR_ENABLE            0x0040
#define C420MAT2_CMD_DIS_LOOP_ERR_ERRB_DISABLE       0x0000
#define C420MAT2_CMD_DIS_LOOP_ERR_ERRB_ENABLE        0x0020  
#define C420MAT2_CMD_MASK_SPI_ERR_DISABLE            0x0000
#define C420MAT2_CMD_MASK_SPI_ERR_ENABLE             0x0010
#define C420MAT2_CMD_SPI_TIMEOUT_50ms                0x0000
#define C420MAT2_CMD_SPI_TIMEOUT_100ms               0x0002
#define C420MAT2_CMD_SPI_TIMEOUT_150ms               0x0004
#define C420MAT2_CMD_SPI_TIMEOUT_200ms               0x0006
#define C420MAT2_CMD_SPI_TIMEOUT_250ms               0x0008
#define C420MAT2_CMD_SPI_TIMEOUT_300ms               0x000A
#define C420MAT2_CMD_SPI_TIMEOUT_350ms               0x000C
#define C420MAT2_CMD_SPI_TIMEOUT_400ms               0x000E
#define C420MAT2_CMD_MASK_SPI_TOUT_DISABLE           0x0000
#define C420MAT2_CMD_MASK_SPI_TOUT_ENABLE            0x0001
#define C420MAT2_CMD_RESET                           0xC33C
 
#define C420MAT2_STATUS_DAC_RES_BIT_MASK             0x00E0
#define C420MAT2_STATUS_ERRLVL_PIN_BIT_MASK          0x0010
#define C420MAT2_STATUS_FERR_STS_BIT_MASK            0x0008
#define C420MAT2_STATUSSPI_TIMEOUT_ERR_BIT_MASK      0x0004
#define C420MAT2_STATUS_LOOP_STS_BIT_MASK            0x0002
#define C420MAT2_STATUS_CURR_LOOP_STS_BIT_MASK       0x0001
 
 
#define C420MAT2_SET_DATA_SAMPLE_EDGE      SET_SPI_DATA_SAMPLE_EDGE
#define C420MAT2_SET_DATA_SAMPLE_MIDDLE    SET_SPI_DATA_SAMPLE_MIDDLE
 
 // c420mat2_set
 
#define C420MAT2_MAP_MIKROBUS( cfg, mikrobus )      \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK );  \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS );   \
    cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST );   \
    cfg.err = MIKROBUS( mikrobus, MIKROBUS_INT )
 
 // c420mat2_map
 // c420mat2
 
typedef struct
{
    // Output pins
    digital_out_t rst;           
    // Input pins
    digital_in_t err;            
    // Modules
    spi_master_t spi;            
    pin_name_t   chip_select;    
} c420mat2_t;
 
typedef struct
{
    // Communication gpio pins
    pin_name_t miso;    
    pin_name_t mosi;    
    pin_name_t sck;     
    pin_name_t cs;      
    // Additional gpio pins
    pin_name_t rst;    
    pin_name_t err;    
    // static variable
    uint32_t                          spi_speed;      
    spi_master_mode_t                 spi_mode;       
    spi_master_chip_select_polarity_t cs_polarity;    
} c420mat2_cfg_t;
 
typedef enum
{
    C420MAT2_OK = 0,
    C420MAT2_ERROR = -1
 
} c420mat2_return_value_t;
 
typedef struct
{
    uint8_t    errlvl_pin;
    uint8_t    ferr_sts;
    uint8_t    spi_timeout_err;
    uint8_t    loop_sts;
    uint8_t    curr_loop_sts;
 
} c420mat2_status_t;
 
typedef enum
{
    C420MAT2_STATUS_OK = 0,
    C420MAT2_STATUS_ERROR = 1
 
} c420mat2_status_value_t;
 
void c420mat2_cfg_setup ( c420mat2_cfg_t *cfg );
 
err_t c420mat2_init ( c420mat2_t *ctx, c420mat2_cfg_t *cfg );
 
err_t c420mat2_default_cfg ( c420mat2_t *ctx );
 
err_t c420mat2_write_data ( c420mat2_t *ctx, uint8_t reg, uint16_t data_in );
 
err_t c420mat2_read_data ( c420mat2_t *ctx, uint8_t cmd, uint16_t *data_out );
 
err_t c420mat2_protected_write ( c420mat2_t *ctx, uint8_t reg, uint16_t data_in );
 
err_t c420mat2_sw_reset ( c420mat2_t *ctx );
 
err_t c420mat2_set_dac_data ( c420mat2_t *ctx, uint16_t dac_output_code );
 
err_t  c420mat2_set_lower_limit ( c420mat2_t *ctx, float lower_limit_ma );
 
err_t c420mat2_set_upper_limit ( c420mat2_t *ctx, float upper_limit_ma );
 
err_t c420mat2_set_output_current ( c420mat2_t *ctx, float current_ma );
 
err_t c420mat2_get_status ( c420mat2_t *ctx, c420mat2_status_t *status );
 
uint8_t c420mat2_get_err_pin ( c420mat2_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif // C420MAT2_H
 
 // c420mat2
 
// ------------------------------------------------------------------------ END