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c6dofimu12 2.0.0.0
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Any initialization code needed for MCU to function properly. Do not remove this line or clock might not be set correctly.
| #define C6DOFIMU12_ACC_DRDY_INT_MASK 0x8000 |
| #define C6DOFIMU12_ACC_FIFO_DOWNS_MASK 0x70 |
| #define C6DOFIMU12_ACC_FIFO_DOWNS_POS 0x04 |
| #define C6DOFIMU12_ACC_FIFO_FILT_DATA_MASK 0x80 |
| #define C6DOFIMU12_ACC_FIFO_FILT_DATA_POS 0x07 |
| #define C6DOFIMU12_AUX_DRDY_INT_MASK 0x2000 |
| #define C6DOFIMU12_AUX_FCU_WR_EN_MASK 0x40 |
| #define C6DOFIMU12_AUX_FCU_WR_EN_POS 0x06 |
| #define C6DOFIMU12_AUX_IF_EN_MASK 0x20 |
| #define C6DOFIMU12_AUX_IF_EN_POS 0x05 |
| #define C6DOFIMU12_AUX_MAN_MODE_EN_MASK 0x80 |
| #define C6DOFIMU12_AUX_MAN_MODE_EN_POS 0x07 |
| #define C6DOFIMU12_AUX_MAN_READ_BURST_MASK 0x0C |
| #define C6DOFIMU12_AUX_MAN_READ_BURST_POS 0x02 |
| #define C6DOFIMU12_AUX_ODR_0_78HZ 0x01 |
| #define C6DOFIMU12_AUX_ODR_100HZ 0x08 |
| #define C6DOFIMU12_AUX_ODR_12_5HZ 0x05 |
| #define C6DOFIMU12_AUX_ODR_1_56HZ 0x02 |
| #define C6DOFIMU12_AUX_ODR_200HZ 0x09 |
| #define C6DOFIMU12_AUX_ODR_25HZ 0x06 |
| #define C6DOFIMU12_AUX_ODR_3_12HZ 0x03 |
| #define C6DOFIMU12_AUX_ODR_400HZ 0x0A |
| #define C6DOFIMU12_AUX_ODR_50HZ 0x07 |
| #define C6DOFIMU12_AUX_ODR_6_25HZ 0x04 |
| #define C6DOFIMU12_AUX_ODR_800HZ 0x0B |
| #define C6DOFIMU12_AUX_ODR_EN_MASK 0x0F |
| #define C6DOFIMU12_AUX_ODR_RESERVED 0x00 |
| #define C6DOFIMU12_AUX_OFFSET_READ_OUT_MASK 0xF0 |
| #define C6DOFIMU12_AUX_OFFSET_READ_OUT_POS 0x04 |
| #define C6DOFIMU12_AUX_READ_BURST_MASK 0x03 |
| #define C6DOFIMU12_AUX_READ_LEN_0 0x00 |
| #define C6DOFIMU12_AUX_READ_LEN_1 0x01 |
| #define C6DOFIMU12_AUX_READ_LEN_2 0x02 |
| #define C6DOFIMU12_AUX_READ_LEN_3 0x03 |
| #define C6DOFIMU12_AUX_SET_I2C_ADDR_MASK 0xFE |
| #define C6DOFIMU12_AUX_SET_I2C_ADDR_POS 0x01 |
| #define C6DOFIMU12_AXES_MAP_ERROR 0x20 |
| #define C6DOFIMU12_AXIS_MASK 0x07 |
| #define C6DOFIMU12_AXIS_SIGN 0x08 |
| #define C6DOFIMU12_CMD_INITIALIZATION_START 0x00 |
| #define C6DOFIMU12_CMD_INITIALIZATION_STOP 0x01 |
| #define C6DOFIMU12_COMPAT_ERROR 0x07 |
| #define C6DOFIMU12_CRT_IN_FIFO_NOT_REQ 0x10 |
| #define C6DOFIMU12_CRT_RTOSK_ENABLE 0x01 |
| #define C6DOFIMU12_DRDY_INT 0x04 |
| #define C6DOFIMU12_DRV_ERR 0x03 |
| #define C6DOFIMU12_ERR_INT 0x08 |
| #define C6DOFIMU12_ERR_INT_STATUS_MASK 0x0400 |
| #define C6DOFIMU12_ERROR 0x00 |
| #define C6DOFIMU12_FAST_PWR_UP_DISABLED 0x00 |
| #define C6DOFIMU12_FAST_PWR_UP_ENABLED 0x04 |
| #define C6DOFIMU12_FEAT_BIT0 1 |
| #define C6DOFIMU12_FEAT_BIT1 2 |
| #define C6DOFIMU12_FEAT_BIT2 3 |
| #define C6DOFIMU12_FEAT_BIT3 4 |
| #define C6DOFIMU12_FEAT_BIT4 5 |
| #define C6DOFIMU12_FEAT_BIT5 6 |
| #define C6DOFIMU12_FEAT_BIT6 7 |
| #define C6DOFIMU12_FEAT_BIT7 8 |
| #define C6DOFIMU12_FEAT_BIT_DISABLE 0 |
| #define C6DOFIMU12_FEAT_BIT_MAX 9 |
| #define C6DOFIMU12_FFULL_INT 0x01 |
| #define C6DOFIMU12_FFULL_INT_STATUS_MASK 0x0100 |
| #define C6DOFIMU12_FIFO_ACC_AUX_LENGTH 14 |
| #define C6DOFIMU12_FIFO_ACC_EN 0x4000 |
| #define C6DOFIMU12_FIFO_ACC_GYR_LENGTH 12 |
| #define C6DOFIMU12_FIFO_ACC_LENGTH 6 |
| #define C6DOFIMU12_FIFO_ALL_EN 0xE000 |
| #define C6DOFIMU12_FIFO_ALL_LENGTH 20 |
| #define C6DOFIMU12_FIFO_AUX_EN 0x2000 |
| #define C6DOFIMU12_FIFO_AUX_LENGTH 8 |
| #define C6DOFIMU12_FIFO_BYTE_COUNTER_MSB_MASK 0x3F |
| #define C6DOFIMU12_FIFO_CONFIG_0_MASK 0x0003 |
| #define C6DOFIMU12_FIFO_CONFIG_1_MASK 0xFF00 |
| #define C6DOFIMU12_FIFO_CONFIG_LENGTH 2 |
| #define C6DOFIMU12_FIFO_DATA_LENGTH 2 |
| #define C6DOFIMU12_FIFO_FILTERED_DATA 1 |
| #define C6DOFIMU12_FIFO_GYR_AUX_LENGTH 14 |
| #define C6DOFIMU12_FIFO_GYR_EN 0x8000 |
| #define C6DOFIMU12_FIFO_GYR_LENGTH 6 |
| #define C6DOFIMU12_FIFO_HEAD_LESS_ACC_FRM 0x40 |
| #define C6DOFIMU12_FIFO_HEAD_LESS_ALL_FRM 0xE0 |
| #define C6DOFIMU12_FIFO_HEAD_LESS_AUX_ACC_FRM 0x60 |
| #define C6DOFIMU12_FIFO_HEAD_LESS_AUX_FRM 0x20 |
| #define C6DOFIMU12_FIFO_HEAD_LESS_GYR_ACC_FRM 0xC0 |
| #define C6DOFIMU12_FIFO_HEAD_LESS_GYR_AUX_FRM 0xA0 |
| #define C6DOFIMU12_FIFO_HEAD_LESS_GYR_FRM 0x80 |
| #define C6DOFIMU12_FIFO_HEAD_OVER_READ_MSB 0x80 |
| #define C6DOFIMU12_FIFO_HEADER_ACC_FRM 0x84 |
| #define C6DOFIMU12_FIFO_HEADER_ALL_FRM 0x9C |
| #define C6DOFIMU12_FIFO_HEADER_AUX_ACC_FRM 0x94 |
| #define C6DOFIMU12_FIFO_HEADER_AUX_FRM 0x90 |
| #define C6DOFIMU12_FIFO_HEADER_AUX_GYR_FRM 0x98 |
| #define C6DOFIMU12_FIFO_HEADER_EN 0x1000 |
| #define C6DOFIMU12_FIFO_HEADER_GYR_ACC_FRM 0x8C |
| #define C6DOFIMU12_FIFO_HEADER_GYR_FRM 0x88 |
| #define C6DOFIMU12_FIFO_HEADER_INPUT_CFG_FRM 0x48 |
| #define C6DOFIMU12_FIFO_HEADER_SENS_TIME_FRM 0x44 |
| #define C6DOFIMU12_FIFO_HEADER_SKIP_FRM 0x40 |
| #define C6DOFIMU12_FIFO_INPUT_CFG_LENGTH 4 |
| #define C6DOFIMU12_FIFO_LENGTH_MSB_BYTE 1 |
| #define C6DOFIMU12_FIFO_LSB_CONFIG_CHECK 0x00 |
| #define C6DOFIMU12_FIFO_MSB_CONFIG_CHECK 0x80 |
| #define C6DOFIMU12_FIFO_READ_DISABLED 0x00 |
| #define C6DOFIMU12_FIFO_READ_ENABLED 0x02 |
| #define C6DOFIMU12_FIFO_SELF_WAKE_UP_MASK 0x02 |
| #define C6DOFIMU12_FIFO_SELF_WAKE_UP_POS 0x02 |
| #define C6DOFIMU12_FIFO_SKIP_FRM_LENGTH 1 |
| #define C6DOFIMU12_FIFO_STOP_ON_FULL 0x0001 |
| #define C6DOFIMU12_FIFO_TAG_INT1 0x0300 |
| #define C6DOFIMU12_FIFO_TAG_INT2 0x0C00 |
| #define C6DOFIMU12_FIFO_TAG_INTR_MASK 0xFF |
| #define C6DOFIMU12_FIFO_TIME_EN 0x0002 |
| #define C6DOFIMU12_FIFO_UNFILTERED_DATA 0 |
| #define C6DOFIMU12_FIFO_VIRT_ACC_AUX_LENGTH 17 |
| #define C6DOFIMU12_FIFO_VIRT_ACC_GYR_LENGTH 15 |
| #define C6DOFIMU12_FIFO_VIRT_ACC_LENGTH 9 |
| #define C6DOFIMU12_FIFO_VIRT_ACT_DATA_LENGTH 6 |
| #define C6DOFIMU12_FIFO_VIRT_ACT_RECOG_FRM 0xC8 |
| #define C6DOFIMU12_FIFO_VIRT_ACT_STAT_LENGTH 1 |
| #define C6DOFIMU12_FIFO_VIRT_ACT_TIME_LENGTH 4 |
| #define C6DOFIMU12_FIFO_VIRT_ACT_TYPE_LENGTH 1 |
| #define C6DOFIMU12_FIFO_VIRT_ALL_LENGTH 23 |
| #define C6DOFIMU12_FIFO_VIRT_AUX_LENGTH 11 |
| #define C6DOFIMU12_FIFO_VIRT_FRM_MODE 0x03 |
| #define C6DOFIMU12_FIFO_VIRT_FRM_MODE_MASK 0xC0 |
| #define C6DOFIMU12_FIFO_VIRT_FRM_MODE_POS 0x06 |
| #define C6DOFIMU12_FIFO_VIRT_GYR_AUX_LENGTH 17 |
| #define C6DOFIMU12_FIFO_VIRT_GYR_LENGTH 9 |
| #define C6DOFIMU12_FIFO_VIRT_PAYLOAD_MASK 0x3C |
| #define C6DOFIMU12_FIFO_VIRT_PAYLOAD_POS 0x02 |
| #define C6DOFIMU12_FIFO_WM_LENGTH 2 |
| #define C6DOFIMU12_FWM_INT 0x02 |
| #define C6DOFIMU12_FWM_INT_STATUS_MASK 0x0200 |
| #define C6DOFIMU12_G_TRIGGER_ABORT_ERROR 0x03 |
| #define C6DOFIMU12_G_TRIGGER_DL_ERROR 0x02 |
| #define C6DOFIMU12_G_TRIGGER_NO_ERROR 0x00 |
| #define C6DOFIMU12_G_TRIGGER_PRECON_ERROR 0x01 |
| #define C6DOFIMU12_GYR_AXIS_X_OK_MASK 0x02 |
| #define C6DOFIMU12_GYR_AXIS_X_OK_POS 0x01 |
| #define C6DOFIMU12_GYR_AXIS_Y_OK_MASK 0x04 |
| #define C6DOFIMU12_GYR_AXIS_Y_OK_POS 0x02 |
| #define C6DOFIMU12_GYR_AXIS_Z_OK_MASK 0x08 |
| #define C6DOFIMU12_GYR_AXIS_Z_OK_POS 0x03 |
| #define C6DOFIMU12_GYR_BW_PARAM_MASK 0x30 |
| #define C6DOFIMU12_GYR_BW_PARAM_POS 0x04 |
| #define C6DOFIMU12_GYR_CIC_MODE 0x30 |
| #define C6DOFIMU12_GYR_DRDY_INT_MASK 0x4000 |
| #define C6DOFIMU12_GYR_FIFO_DOWNS_MASK 0x07 |
| #define C6DOFIMU12_GYR_FIFO_FILT_DATA_MASK 0x08 |
| #define C6DOFIMU12_GYR_FIFO_FILT_DATA_POS 0x03 |
| #define C6DOFIMU12_GYR_FILTER_PERF_MODE_MASK 0x80 |
| #define C6DOFIMU12_GYR_FILTER_PERF_MODE_POS 0x07 |
| #define C6DOFIMU12_GYR_GAIN_EN_MASK 0x80 |
| #define C6DOFIMU12_GYR_GAIN_EN_POS 0x07 |
| #define C6DOFIMU12_GYR_NOISE_OPTIMIZED 0x00 |
| #define C6DOFIMU12_GYR_NOISE_PERF_MODE_MASK 0x40 |
| #define C6DOFIMU12_GYR_NOISE_PERF_MODE_POS 0x06 |
| #define C6DOFIMU12_GYR_NOISE_PERFORMANCE 0x40 |
| #define C6DOFIMU12_GYR_NORMAL_MODE 0x20 |
| #define C6DOFIMU12_GYR_ODR_100HZ 0x08 |
| #define C6DOFIMU12_GYR_ODR_1600HZ 0x0C |
| #define C6DOFIMU12_GYR_ODR_200HZ 0x09 |
| #define C6DOFIMU12_GYR_ODR_25HZ 0x06 |
| #define C6DOFIMU12_GYR_ODR_3200HZ 0x0D |
| #define C6DOFIMU12_GYR_ODR_400HZ 0x0A |
| #define C6DOFIMU12_GYR_ODR_50HZ 0x07 |
| #define C6DOFIMU12_GYR_ODR_800HZ 0x0B |
| #define C6DOFIMU12_GYR_ODR_MASK 0x0F |
| #define C6DOFIMU12_GYR_OFF_COMP_EN_MASK 0x40 |
| #define C6DOFIMU12_GYR_OFF_COMP_EN_POS 0x06 |
| #define C6DOFIMU12_GYR_OIS_2000 0x01 |
| #define C6DOFIMU12_GYR_OIS_250 0x00 |
| #define C6DOFIMU12_GYR_OIS_RANGE_MASK 0x08 |
| #define C6DOFIMU12_GYR_OIS_RANGE_POS 0x03 |
| #define C6DOFIMU12_GYR_OSR2_MODE 0x10 |
| #define C6DOFIMU12_GYR_OSR4_MODE 0x00 |
| #define C6DOFIMU12_GYR_PWR_OPTIMIZED 0x00 |
| #define C6DOFIMU12_GYR_PWR_PERFORMANCE 0x80 |
| #define C6DOFIMU12_GYR_RANGE_1000 0x01 |
| #define C6DOFIMU12_GYR_RANGE_125 0x04 |
| #define C6DOFIMU12_GYR_RANGE_2000 0x00 |
| #define C6DOFIMU12_GYR_RANGE_250 0x03 |
| #define C6DOFIMU12_GYR_RANGE_500 0x02 |
| #define C6DOFIMU12_GYR_RANGE_MASK 0x07 |
| #define C6DOFIMU12_GYR_ST_AXES_DONE_MASK 0X01 |
| #define C6DOFIMU12_GYR_USR_GAIN_X_MASK 0x7F |
| #define C6DOFIMU12_GYR_USR_GAIN_Y_MASK 0x7F |
| #define C6DOFIMU12_GYR_USR_GAIN_Z_MASK 0x7F |
| #define C6DOFIMU12_GYRO_CROSS_SENS_ENABLE 0x02 |
| #define C6DOFIMU12_GYRO_USER_GAIN_ENABLE 0x08 |
| #define C6DOFIMU12_INIT_ERR 0x02 |
| #define C6DOFIMU12_INIT_OK 0x01 |
| #define C6DOFIMU12_INT_ACTIVE_HIGH 1 |
| #define C6DOFIMU12_INT_ACTIVE_LOW 0 |
| #define C6DOFIMU12_INT_INPUT_DISABLE 0 |
| #define C6DOFIMU12_INT_INPUT_EN_MASK 0x10 |
| #define C6DOFIMU12_INT_INPUT_EN_POS 0x04 |
| #define C6DOFIMU12_INT_INPUT_ENABLE 1 |
| #define C6DOFIMU12_INT_LATCH 1 |
| #define C6DOFIMU12_INT_LATCH_MASK 0x01 |
| #define C6DOFIMU12_INT_LEVEL_MASK 0x02 |
| #define C6DOFIMU12_INT_LEVEL_POS 0x01 |
| #define C6DOFIMU12_INT_NON_LATCH 0 |
| #define C6DOFIMU12_INT_OPEN_DRAIN 1 |
| #define C6DOFIMU12_INT_OPEN_DRAIN_MASK 0x04 |
| #define C6DOFIMU12_INT_OPEN_DRAIN_POS 0x02 |
| #define C6DOFIMU12_INT_OUTPUT_DISABLE 0 |
| #define C6DOFIMU12_INT_OUTPUT_EN_MASK 0x08 |
| #define C6DOFIMU12_INT_OUTPUT_EN_POS 0x03 |
| #define C6DOFIMU12_INT_OUTPUT_ENABLE 1 |
| #define C6DOFIMU12_INT_PIN_MAX_NUM 2 |
| #define C6DOFIMU12_INT_PUSH_PULL 0 |
| #define C6DOFIMU12_MAX_VALUE_FIFO_FILTER 1 |
| #define C6DOFIMU12_MINIMAL_VARIANT 0x20 |
| #define C6DOFIMU12_NEG_X 0x09 |
| #define C6DOFIMU12_NEG_Y 0x0A |
| #define C6DOFIMU12_NEG_Z 0x0C |
| #define C6DOFIMU12_NO_FEATURE_ENABLE 0x00 |
| #define C6DOFIMU12_NOT_INIT 0x00 |
| #define C6DOFIMU12_NVM_ERROR 0x05 |
| #define C6DOFIMU12_ODR_50_HZ_ERROR 0x40 |
| #define C6DOFIMU12_ODR_HIGH_ERROR 0x80 |
| #define C6DOFIMU12_OIS_IF_EN_MASK 0x10 |
| #define C6DOFIMU12_OIS_IF_EN_POS 0x04 |
| #define C6DOFIMU12_PWR_CONF_ADV_PWR_SAVE_DISABLED 0x00 |
| #define C6DOFIMU12_PWR_CONF_ADV_PWR_SAVE_ENABLED 0x01 |
| #define C6DOFIMU12_SENSOR_TIME_LENGTH 3 |
| #define C6DOFIMU12_SNS_STOP 0x04 |
| #define C6DOFIMU12_START_UP_ERROR 0x06 |
| #define C6DOFIMU12_SUCCESS 0x01 |
| #define C6DOFIMU12_VFM_SKIPPED 0x10 |
| #define C6DOFIMU12_X 0x01 |
| #define C6DOFIMU12_Y 0x02 |
| #define C6DOFIMU12_Z 0x04 |