Macros
#define	C6DOFIMU15_ODR_G_POW_DWN 0x00

#define	C6DOFIMU15_ODR_G_12_5_HZ 0x10

#define	C6DOFIMU15_ODR_G_26_HZ 0x20

#define	C6DOFIMU15_ODR_G_52_HZ 0x30

#define	C6DOFIMU15_ODR_G_104_HZ 0x40

#define	C6DOFIMU15_ODR_G_208_HZ 0x50

#define	C6DOFIMU15_ODR_G_417_HZ 0x60

#define	C6DOFIMU15_ODR_G_833_HZ 0x70

#define	C6DOFIMU15_ODR_G_1667_HZ 0x80

#define	C6DOFIMU15_ODR_G_3333_HZ 0x90

#define	C6DOFIMU15_ODR_G_6667_HZ 0xA0

#define	C6DOFIMU15_FS_G_250_DPS 0x00

#define	C6DOFIMU15_FS_G_500_DPS 0x04

#define	C6DOFIMU15_FS_G_1000_DPS 0x08

#define	C6DOFIMU15_FS_G_2000_DPS 0x0C

#define	C6DOFIMU15_FS_125 0x02

#define	C6DOFIMU15_FS_4000 0x01

Detailed Description

Macro Definition Documentation

◆ C6DOFIMU15_FS_125

#define C6DOFIMU15_FS_125 0x02

◆ C6DOFIMU15_FS_4000

#define C6DOFIMU15_FS_4000 0x01

◆ C6DOFIMU15_FS_G_1000_DPS

#define C6DOFIMU15_FS_G_1000_DPS 0x08

◆ C6DOFIMU15_FS_G_2000_DPS

#define C6DOFIMU15_FS_G_2000_DPS 0x0C

◆ C6DOFIMU15_FS_G_250_DPS

#define C6DOFIMU15_FS_G_250_DPS 0x00

◆ C6DOFIMU15_FS_G_500_DPS

#define C6DOFIMU15_FS_G_500_DPS 0x04

◆ C6DOFIMU15_ODR_G_104_HZ

#define C6DOFIMU15_ODR_G_104_HZ 0x40

◆ C6DOFIMU15_ODR_G_12_5_HZ

#define C6DOFIMU15_ODR_G_12_5_HZ 0x10

◆ C6DOFIMU15_ODR_G_1667_HZ

#define C6DOFIMU15_ODR_G_1667_HZ 0x80

◆ C6DOFIMU15_ODR_G_208_HZ

#define C6DOFIMU15_ODR_G_208_HZ 0x50

◆ C6DOFIMU15_ODR_G_26_HZ

#define C6DOFIMU15_ODR_G_26_HZ 0x20

◆ C6DOFIMU15_ODR_G_3333_HZ

#define C6DOFIMU15_ODR_G_3333_HZ 0x90

◆ C6DOFIMU15_ODR_G_417_HZ

#define C6DOFIMU15_ODR_G_417_HZ 0x60

◆ C6DOFIMU15_ODR_G_52_HZ

#define C6DOFIMU15_ODR_G_52_HZ 0x30

◆ C6DOFIMU15_ODR_G_6667_HZ

#define C6DOFIMU15_ODR_G_6667_HZ 0xA0

◆ C6DOFIMU15_ODR_G_833_HZ

#define C6DOFIMU15_ODR_G_833_HZ 0x70

◆ C6DOFIMU15_ODR_G_POW_DWN

#define C6DOFIMU15_ODR_G_POW_DWN 0x00

Macros