canfd6 2.0.0.0
canfd6_dev_config_t Struct Reference

CAN FD 6 Click device config struct. More...

#include <canfd6.h>

Data Fields

union { 
 
   uint32_t   word 
 
   struct { 
 
      uint8_t   RESERVED0: 1 
 
      uint8_t   SWE_DIS: 1 
 
      uint8_t   DEVICE_RESET: 1 
 
      uint8_t   WD_EN: 1 
 
      uint8_t   RESERVED1: 4 
 
      uint8_t   nWKRQ_CONFIG: 1 
 
      uint8_t   INH_DIS: 1 
 
      canfd6_dev_config_gpo1_t   GPIO1_GPO_CONFIG: 2 
 
      uint8_t   RESERVED2: 1 
 
      uint8_t   FAIL_SAFE_EN: 1 
 
      canfd6_dev_config_gpio1_t   GPIO1_CONFIG: 2 
 
      canfd6_dev_config_wdt_action_t   WD_ACTION: 2 
 
      uint8_t   WD_BIT_RESET: 1 
 
      uint8_t   nWKRQ_VOLTAGE: 1 
 
      uint8_t   RESERVED3: 2 
 
      canfd6_dev_config_gpo2_t   GPO2_CONFIG: 2 
 
      uint8_t   RESERVED4: 3 
 
      uint8_t   CLK_REF: 1 
 
      uint8_t   RESERVED5: 2 
 
      canfd6_dev_config_wake_t   WAKE_CONFIG: 2 
 
   }  
 
};  
 

Detailed Description

CAN FD 6 Click device config struct.

Struct containing the device global configuration.

Field Documentation

◆ [union]

union { ... }

◆ CLK_REF

uint8_t CLK_REF

DEV_MODE_PINS[27] : CLK_REF, used to tell the device what the input clock/crystal frequency is [0]: 20 MHz / [1]: 40 MHz.

◆ DEVICE_RESET

uint8_t DEVICE_RESET

DEV_MODE_PINS[2] : Device reset. Write a 1 to perform a reset on the part.

◆ FAIL_SAFE_EN

uint8_t FAIL_SAFE_EN

DEV_MODE_PINS[13] : Fail safe mode enable. Excludes power up fail safe.

◆ GPIO1_CONFIG

DEV_MODE_PINS[15:14] : GPIO1 configuration.

◆ GPIO1_GPO_CONFIG

canfd6_dev_config_gpo1_t GPIO1_GPO_CONFIG

DEV_MODE_PINS[11:10] : GPIO1 pin as a GPO function configuration.

◆ GPO2_CONFIG

DEV_MODE_PINS[23:22] : nWKRQ_VOLTAGE, set the voltage rail used by the nWKRQ pin.

◆ INH_DIS

uint8_t INH_DIS

DEV_MODE_PINS[9] : Inhibit pin disable.

◆ nWKRQ_CONFIG

uint8_t nWKRQ_CONFIG

DEV_MODE_PINS[8] : nWKRQ Configuration [0]: Mirrors INH function / [1]: Wake request interrupt.

◆ nWKRQ_VOLTAGE

uint8_t nWKRQ_VOLTAGE

DEV_MODE_PINS[19] : nWKRQ_VOLTAGE, set the voltage rail used by the nWKRQ pin [0]: Internal / [1]: VIO.

◆ RESERVED0

uint8_t RESERVED0

DEV_MODE_PINS[0] : Test mode configuration. Reserved in this struct.

◆ RESERVED1

uint8_t RESERVED1

DEV_MODE_PINS[7:6] : Mode Selection. Use the mode functions to change the mode.

◆ RESERVED2

uint8_t RESERVED2

DEV_MODE_PINS[12] : RESERVED.

◆ RESERVED3

uint8_t RESERVED3

DEV_MODE_PINS[21:20] : RESERVED. Use test mode functions to enable test modes.

◆ RESERVED4

uint8_t RESERVED4

DEV_MODE_PINS[26:24] : RESERVED.

◆ RESERVED5

uint8_t RESERVED5

DEV_MODE_PINS[29:28] : RESERVED. Use watchdog functions to set watchdog parameters.

◆ SWE_DIS

uint8_t SWE_DIS

DEV_MODE_PINS[1] : Sleep wake error disable, setting this to '1' will disable the 4 minute timer.

◆ WAKE_CONFIG

DEV_MODE_PINS[31:30] : WAKE_CONFIG, used to configure the direction required to wake a part up.

◆ WD_ACTION

DEV_MODE_PINS[17:16] : Watchdog action. Defines the behavior of the watchdog timer when it times out.

◆ WD_BIT_RESET

uint8_t WD_BIT_RESET

DEV_MODE_PINS[18] : Watchdog reset bit, write '1' to reset the watchdog timer.

◆ WD_EN

uint8_t WD_EN

DEV_MODE_PINS[3] : Watchdog Enable. Use the watchdog functions to control enabling the watchdog.

◆ word

uint32_t word

Full register represented as a 32-bit word.


The documentation for this struct was generated from the following file: