canfd6.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef CANFD6_H
#define CANFD6_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
 
#define CANFD6_MCAN_CACHE_CONFIGURATION
 
#ifdef CANFD6_MCAN_CACHE_CONFIGURATION
#define CANFD6_MCAN_CACHE_SIDFC                                 0
#define CANFD6_MCAN_CACHE_XIDFC                                 1
#define CANFD6_MCAN_CACHE_RXF0C                                 2
#define CANFD6_MCAN_CACHE_RXF1C                                 3
#define CANFD6_MCAN_CACHE_RXBC                                  4
#define CANFD6_MCAN_CACHE_TXEFC                                 5
#define CANFD6_MCAN_CACHE_TXBC                                  6
#define CANFD6_MCAN_CACHE_RXESC                                 7
#define CANFD6_MCAN_CACHE_TXESC                                 8
#endif
 
#define CANFD6_MRAM_SIZE                                        2048
 
#define CANFD6_REG_SPI_CONFIG                                   0x0000
#define CANFD6_REG_DEV_CONFIG                                   0x0800
#define CANFD6_REG_MCAN                                         0x1000
#define CANFD6_REG_MRAM                                         0x8000
 
 // canfd6_reg1
 
#define CANFD6_REG_SPI_DEVICE_ID0                               0x0000
#define CANFD6_REG_SPI_DEVICE_ID1                               0x0004
#define CANFD6_REG_SPI_REVISION                                 0x0008
#define CANFD6_REG_SPI_STATUS                                   0x000C
#define CANFD6_REG_SPI_ERROR_STATUS_MASK                        0x0010
 
 // canfd6_reg2
 
#define CANFD6_REG_DEV_MODES_AND_PINS                           0x0800
#define CANFD6_REG_DEV_TIMESTAMP_PRESCALER                      0x0804
#define CANFD6_REG_DEV_TEST_REGISTERS                           0x0808
#define CANFD6_REG_DEV_IR                                       0x0820
#define CANFD6_REG_DEV_IE                                       0x0830
 
 // canfd6_reg3
 
#define CANFD6_REG_MCAN_CREL                                    0x1000
#define CANFD6_REG_MCAN_ENDN                                    0x1004
#define CANFD6_REG_MCAN_CUST                                    0x1008
#define CANFD6_REG_MCAN_DBTP                                    0x100C
#define CANFD6_REG_MCAN_TEST                                    0x1010
#define CANFD6_REG_MCAN_RWD                                     0x1014
#define CANFD6_REG_MCAN_CCCR                                    0x1018
#define CANFD6_REG_MCAN_NBTP                                    0x101C
#define CANFD6_REG_MCAN_TSCC                                    0x1020
#define CANFD6_REG_MCAN_TSCV                                    0x1024
#define CANFD6_REG_MCAN_TOCC                                    0x1028
#define CANFD6_REG_MCAN_TOCV                                    0x102C
#define CANFD6_REG_MCAN_ECR                                     0x1040
#define CANFD6_REG_MCAN_PSR                                     0x1044
#define CANFD6_REG_MCAN_TDCR                                    0x1048
#define CANFD6_REG_MCAN_IR                                      0x1050
#define CANFD6_REG_MCAN_IE                                      0x1054
#define CANFD6_REG_MCAN_ILS                                     0x1058
#define CANFD6_REG_MCAN_ILE                                     0x105C
#define CANFD6_REG_MCAN_GFC                                     0x1080
#define CANFD6_REG_MCAN_SIDFC                                   0x1084
#define CANFD6_REG_MCAN_XIDFC                                   0x1088
#define CANFD6_REG_MCAN_XIDAM                                   0x1090
#define CANFD6_REG_MCAN_HPMS                                    0x1094
#define CANFD6_REG_MCAN_NDAT1                                   0x1098
#define CANFD6_REG_MCAN_NDAT2                                   0x109C
#define CANFD6_REG_MCAN_RXF0C                                   0x10A0
#define CANFD6_REG_MCAN_RXF0S                                   0x10A4
#define CANFD6_REG_MCAN_RXF0A                                   0x10A8
#define CANFD6_REG_MCAN_RXBC                                    0x10AC
#define CANFD6_REG_MCAN_RXF1C                                   0x10B0
#define CANFD6_REG_MCAN_RXF1S                                   0x10B4
#define CANFD6_REG_MCAN_RXF1A                                   0x10B8
#define CANFD6_REG_MCAN_RXESC                                   0x10BC
#define CANFD6_REG_MCAN_TXBC                                    0x10C0
#define CANFD6_REG_MCAN_TXFQS                                   0x10C4
#define CANFD6_REG_MCAN_TXESC                                   0x10C8
#define CANFD6_REG_MCAN_TXBRP                                   0x10CC
#define CANFD6_REG_MCAN_TXBAR                                   0x10D0
#define CANFD6_REG_MCAN_TXBCR                                   0x10D4
#define CANFD6_REG_MCAN_TXBTO                                   0x10D8
#define CANFD6_REG_MCAN_TXBCF                                   0x10DC
#define CANFD6_REG_MCAN_TXBTIE                                  0x10E0
#define CANFD6_REG_MCAN_TXBCIE                                  0x10E4
#define CANFD6_REG_MCAN_TXEFC                                   0x10F0
#define CANFD6_REG_MCAN_TXEFS                                   0x10F4
#define CANFD6_REG_MCAN_TXEFA                                   0x10F8
 
 // canfd6_reg4
 
#define CANFD6_MCAN_DLC_0B                                      0x00000000
#define CANFD6_MCAN_DLC_1B                                      0x00000001
#define CANFD6_MCAN_DLC_2B                                      0x00000002
#define CANFD6_MCAN_DLC_3B                                      0x00000003
#define CANFD6_MCAN_DLC_4B                                      0x00000004
#define CANFD6_MCAN_DLC_5B                                      0x00000005
#define CANFD6_MCAN_DLC_6B                                      0x00000006
#define CANFD6_MCAN_DLC_7B                                      0x00000007
#define CANFD6_MCAN_DLC_8B                                      0x00000008
#define CANFD6_MCAN_DLC_12B                                     0x00000009
#define CANFD6_MCAN_DLC_16B                                     0x0000000A
#define CANFD6_MCAN_DLC_20B                                     0x0000000B
#define CANFD6_MCAN_DLC_24B                                     0x0000000C
#define CANFD6_MCAN_DLC_32B                                     0x0000000D
#define CANFD6_MCAN_DLC_48B                                     0x0000000E
#define CANFD6_MCAN_DLC_64B                                     0x0000000F
 
 // canfd6_reg5
 
#define CANFD6_REG_BITS_MCAN_DBTP_TDC_EN                        0x00800000
 
#define CANFD6_REG_BITS_MCAN_TEST_RX_DOM                        0x00000000
#define CANFD6_REG_BITS_MCAN_TEST_RX_REC                        0x00000080
#define CANFD6_REG_BITS_MCAN_TEST_TX_SP                         0x00000020
#define CANFD6_REG_BITS_MCAN_TEST_TX_DOM                        0x00000040
#define CANFD6_REG_BITS_MCAN_TEST_TX_REC                        0x00000060
#define CANFD6_REG_BITS_MCAN_TEST_LOOP_BACK                     0x00000010
 
 // canfd6_reg6
 
#define CANFD6_REG_BITS_MCAN_CCCR_RESERVED_MASK                 0xFFFF0C00
#define CANFD6_REG_BITS_MCAN_CCCR_NISO_ISO                      0x00000000
#define CANFD6_REG_BITS_MCAN_CCCR_NISO_BOSCH                    0x00008000
#define CANFD6_REG_BITS_MCAN_CCCR_TXP                           0x00004000
#define CANFD6_REG_BITS_MCAN_CCCR_EFBI                          0x00002000
#define CANFD6_REG_BITS_MCAN_CCCR_PXHD_DIS                      0x00001000
#define CANFD6_REG_BITS_MCAN_CCCR_BRSE                          0x00000200
#define CANFD6_REG_BITS_MCAN_CCCR_FDOE                          0x00000100
#define CANFD6_REG_BITS_MCAN_CCCR_TEST                          0x00000080
#define CANFD6_REG_BITS_MCAN_CCCR_DAR_DIS                       0x00000040
#define CANFD6_REG_BITS_MCAN_CCCR_MON                           0x00000020
#define CANFD6_REG_BITS_MCAN_CCCR_CSR                           0x00000010
#define CANFD6_REG_BITS_MCAN_CCCR_CSA                           0x00000008
#define CANFD6_REG_BITS_MCAN_CCCR_ASM                           0x00000004
#define CANFD6_REG_BITS_MCAN_CCCR_CCE                           0x00000002
#define CANFD6_REG_BITS_MCAN_CCCR_INIT                          0x00000001
 
 // canfd6_reg7
 
#define CANFD6_REG_BITS_MCAN_IE_ARAE                            0x20000000
#define CANFD6_REG_BITS_MCAN_IE_PEDE                            0x10000000
#define CANFD6_REG_BITS_MCAN_IE_PEAE                            0x08000000
#define CANFD6_REG_BITS_MCAN_IE_WDIE                            0x04000000
#define CANFD6_REG_BITS_MCAN_IE_BOE                             0x02000000
#define CANFD6_REG_BITS_MCAN_IE_EWE                             0x01000000
#define CANFD6_REG_BITS_MCAN_IE_EPE                             0x00800000
#define CANFD6_REG_BITS_MCAN_IE_ELOE                            0x00400000
#define CANFD6_REG_BITS_MCAN_IE_BEUE                            0x00200000
#define CANFD6_REG_BITS_MCAN_IE_BECE                            0x00100000
#define CANFD6_REG_BITS_MCAN_IE_DRXE                            0x00080000
#define CANFD6_REG_BITS_MCAN_IE_TOOE                            0x00040000
#define CANFD6_REG_BITS_MCAN_IE_MRAFE                           0x00020000
#define CANFD6_REG_BITS_MCAN_IE_TSWE                            0x00010000
#define CANFD6_REG_BITS_MCAN_IE_TEFLE                           0x00008000
#define CANFD6_REG_BITS_MCAN_IE_TEFFE                           0x00004000
#define CANFD6_REG_BITS_MCAN_IE_TEFWE                           0x00002000
#define CANFD6_REG_BITS_MCAN_IE_TEFNE                           0x00001000
#define CANFD6_REG_BITS_MCAN_IE_TFEE                            0x00000800
#define CANFD6_REG_BITS_MCAN_IE_TCFE                            0x00000400
#define CANFD6_REG_BITS_MCAN_IE_TCE                             0x00000200
#define CANFD6_REG_BITS_MCAN_IE_HPME                            0x00000100
#define CANFD6_REG_BITS_MCAN_IE_RF1LE                           0x00000080
#define CANFD6_REG_BITS_MCAN_IE_RF1FE                           0x00000040
#define CANFD6_REG_BITS_MCAN_IE_RF1WE                           0x00000020
#define CANFD6_REG_BITS_MCAN_IE_RF1NE                           0x00000010
#define CANFD6_REG_BITS_MCAN_IE_RF0LE                           0x00000008
#define CANFD6_REG_BITS_MCAN_IE_RF0FE                           0x00000004
#define CANFD6_REG_BITS_MCAN_IE_RF0WE                           0x00000002
#define CANFD6_REG_BITS_MCAN_IE_RF0NE                           0x00000001
 
 // canfd6_reg8
 
#define CANFD6_REG_BITS_MCAN_IR_ARA                             0x20000000
#define CANFD6_REG_BITS_MCAN_IR_PED                             0x10000000
#define CANFD6_REG_BITS_MCAN_IR_PEA                             0x08000000
#define CANFD6_REG_BITS_MCAN_IR_WDI                             0x04000000
#define CANFD6_REG_BITS_MCAN_IR_BO                              0x02000000
#define CANFD6_REG_BITS_MCAN_IR_EW                              0x01000000
#define CANFD6_REG_BITS_MCAN_IR_EP                              0x00800000
#define CANFD6_REG_BITS_MCAN_IR_ELO                             0x00400000
#define CANFD6_REG_BITS_MCAN_IR_BEU                             0x00200000
#define CANFD6_REG_BITS_MCAN_IR_BEC                             0x00100000
#define CANFD6_REG_BITS_MCAN_IR_DRX                             0x00080000
#define CANFD6_REG_BITS_MCAN_IR_TOO                             0x00040000
#define CANFD6_REG_BITS_MCAN_IR_MRAF                            0x00020000
#define CANFD6_REG_BITS_MCAN_IR_TSW                             0x00010000
#define CANFD6_REG_BITS_MCAN_IR_TEFL                            0x00008000
#define CANFD6_REG_BITS_MCAN_IR_TEFF                            0x00004000
#define CANFD6_REG_BITS_MCAN_IR_TEFW                            0x00002000
#define CANFD6_REG_BITS_MCAN_IR_TEFN                            0x00001000
#define CANFD6_REG_BITS_MCAN_IR_TFE                             0x00000800
#define CANFD6_REG_BITS_MCAN_IR_TCF                             0x00000400
#define CANFD6_REG_BITS_MCAN_IR_TC                              0x00000200
#define CANFD6_REG_BITS_MCAN_IR_HPM                             0x00000100
#define CANFD6_REG_BITS_MCAN_IR_RF1L                            0x00000080
#define CANFD6_REG_BITS_MCAN_IR_RF1F                            0x00000040
#define CANFD6_REG_BITS_MCAN_IR_RF1W                            0x00000020
#define CANFD6_REG_BITS_MCAN_IR_RF1N                            0x00000010
#define CANFD6_REG_BITS_MCAN_IR_RF0L                            0x00000008
#define CANFD6_REG_BITS_MCAN_IR_RF0F                            0x00000004
#define CANFD6_REG_BITS_MCAN_IR_RF0W                            0x00000002
#define CANFD6_REG_BITS_MCAN_IR_RF0N                            0x00000001
 
 // canfd6_reg9
 
#define CANFD6_REG_BITS_MCAN_IE_ARAL                            0x20000000
#define CANFD6_REG_BITS_MCAN_IE_PEDL                            0x10000000
#define CANFD6_REG_BITS_MCAN_IE_PEAL                            0x08000000
#define CANFD6_REG_BITS_MCAN_IE_WDIL                            0x04000000
#define CANFD6_REG_BITS_MCAN_IE_BOL                             0x02000000
#define CANFD6_REG_BITS_MCAN_IE_EWL                             0x01000000
#define CANFD6_REG_BITS_MCAN_IE_EPL                             0x00800000
#define CANFD6_REG_BITS_MCAN_IE_ELOL                            0x00400000
#define CANFD6_REG_BITS_MCAN_IE_BEUL                            0x00200000
#define CANFD6_REG_BITS_MCAN_IE_BECL                            0x00100000
#define CANFD6_REG_BITS_MCAN_IE_DRXL                            0x00080000
#define CANFD6_REG_BITS_MCAN_IE_TOOL                            0x00040000
#define CANFD6_REG_BITS_MCAN_IE_MRAFL                           0x00020000
#define CANFD6_REG_BITS_MCAN_IE_TSWL                            0x00010000
#define CANFD6_REG_BITS_MCAN_IE_TEFLL                           0x00008000
#define CANFD6_REG_BITS_MCAN_IE_TEFFL                           0x00004000
#define CANFD6_REG_BITS_MCAN_IE_TEFWL                           0x00002000
#define CANFD6_REG_BITS_MCAN_IE_TEFNL                           0x00001000
#define CANFD6_REG_BITS_MCAN_IE_TFEL                            0x00000800
#define CANFD6_REG_BITS_MCAN_IE_TCFL                            0x00000400
#define CANFD6_REG_BITS_MCAN_IE_TCL                             0x00000200
#define CANFD6_REG_BITS_MCAN_IE_HPML                            0x00000100
#define CANFD6_REG_BITS_MCAN_IE_RF1LL                           0x00000080
#define CANFD6_REG_BITS_MCAN_IE_RF1FL                           0x00000040
#define CANFD6_REG_BITS_MCAN_IE_RF1WL                           0x00000020
#define CANFD6_REG_BITS_MCAN_IE_RF1NL                           0x00000010
#define CANFD6_REG_BITS_MCAN_IE_RF0LL                           0x00000008
#define CANFD6_REG_BITS_MCAN_IE_RF0FL                           0x00000004
#define CANFD6_REG_BITS_MCAN_IE_RF0WL                           0x00000002
#define CANFD6_REG_BITS_MCAN_IE_RF0NL                           0x00000001
 
 // canfd6_reg10
 
#define CANFD6_REG_BITS_MCAN_ILE_EINT1                          0x00000002
#define CANFD6_REG_BITS_MCAN_ILE_EINT0                          0x00000001
 
 // canfd6_reg11
 
#define CANFD6_REG_BITS_MCAN_GFC_ANFS_FIFO0                     0x00000000
#define CANFD6_REG_BITS_MCAN_GFC_ANFS_FIFO1                     0x00000010
#define CANFD6_REG_BITS_MCAN_GFC_ANFE_FIFO0                     0x00000000
#define CANFD6_REG_BITS_MCAN_GFC_ANFE_FIFO1                     0x00000004
#define CANFD6_REG_BITS_MCAN_GFC_RRFS                           0x00000002
#define CANFD6_REG_BITS_MCAN_GFC_RRFE                           0x00000001
#define CANFD6_REG_BITS_MCAN_GFC_MASK                           0x0000003F
 
 // canfd6_reg12
 
#define CANFD6_REG_BITS_MCAN_RXF0C_F0OM_OVERWRITE               0x80000000
 
#define CANFD6_REG_BITS_MCAN_RXESC_RBDS_8B                      0x00000000
#define CANFD6_REG_BITS_MCAN_RXESC_RBDS_12B                     0x00000100
#define CANFD6_REG_BITS_MCAN_RXESC_RBDS_16B                     0x00000200
#define CANFD6_REG_BITS_MCAN_RXESC_RBDS_20B                     0x00000300
#define CANFD6_REG_BITS_MCAN_RXESC_RBDS_24B                     0x00000400
#define CANFD6_REG_BITS_MCAN_RXESC_RBDS_32B                     0x00000500
#define CANFD6_REG_BITS_MCAN_RXESC_RBDS_48B                     0x00000600
#define CANFD6_REG_BITS_MCAN_RXESC_RBDS_64B                     0x00000700
#define CANFD6_REG_BITS_MCAN_RXESC_F1DS_8B                      0x00000000
#define CANFD6_REG_BITS_MCAN_RXESC_F1DS_12B                     0x00000010
#define CANFD6_REG_BITS_MCAN_RXESC_F1DS_16B                     0x00000020
#define CANFD6_REG_BITS_MCAN_RXESC_F1DS_20B                     0x00000030
#define CANFD6_REG_BITS_MCAN_RXESC_F1DS_24B                     0x00000040
#define CANFD6_REG_BITS_MCAN_RXESC_F1DS_32B                     0x00000050
#define CANFD6_REG_BITS_MCAN_RXESC_F1DS_48B                     0x00000060
#define CANFD6_REG_BITS_MCAN_RXESC_F1DS_64B                     0x00000070
#define CANFD6_REG_BITS_MCAN_RXESC_F0DS_8B                      0x00000000
#define CANFD6_REG_BITS_MCAN_RXESC_F0DS_12B                     0x00000001
#define CANFD6_REG_BITS_MCAN_RXESC_F0DS_16B                     0x00000002
#define CANFD6_REG_BITS_MCAN_RXESC_F0DS_20B                     0x00000003
#define CANFD6_REG_BITS_MCAN_RXESC_F0DS_24B                     0x00000004
#define CANFD6_REG_BITS_MCAN_RXESC_F0DS_32B                     0x00000005
#define CANFD6_REG_BITS_MCAN_RXESC_F0DS_48B                     0x00000006
#define CANFD6_REG_BITS_MCAN_RXESC_F0DS_64B                     0x00000007
 
 // canfd6_reg13
 
#define CANFD6_REG_BITS_MCAN_TXBC_TFQM                          0x40000000
 
#define CANFD6_REG_BITS_MCAN_TXESC_TBDS_8                       0x00000000
#define CANFD6_REG_BITS_MCAN_TXESC_TBDS_12                      0x00000001
#define CANFD6_REG_BITS_MCAN_TXESC_TBDS_16                      0x00000002
#define CANFD6_REG_BITS_MCAN_TXESC_TBDS_20                      0x00000003
#define CANFD6_REG_BITS_MCAN_TXESC_TBDS_24                      0x00000004
#define CANFD6_REG_BITS_MCAN_TXESC_TBDS_32                      0x00000005
#define CANFD6_REG_BITS_MCAN_TXESC_TBDS_48                      0x00000006
#define CANFD6_REG_BITS_MCAN_TXESC_TBDS_64                      0x00000007
 
 // canfd6_reg14
 
#define CANFD6_REG_BITS_MCAN_TSCC_PRESCALER_MASK                0x000F0000
#define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_ALWAYS_0              0x00000000
#define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_USE_TCP               0x00000001
#define CANFD6_REG_BITS_MCAN_TSCC_COUNTER_EXTERNAL              0x00000002
 
 // canfd6_reg15
 
#define CANFD6_REG_BITS_MCAN_TXBAR_AR31                         0x80000000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR30                         0x40000000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR29                         0x20000000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR28                         0x10000000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR27                         0x08000000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR26                         0x04000000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR25                         0x02000000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR24                         0x01000000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR23                         0x00800000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR22                         0x00400000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR21                         0x00200000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR20                         0x00100000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR19                         0x00080000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR18                         0x00040000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR17                         0x00020000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR16                         0x00010000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR15                         0x00008000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR14                         0x00004000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR13                         0x00002000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR12                         0x00001000
#define CANFD6_REG_BITS_MCAN_TXBAR_AR11                         0x00000800
#define CANFD6_REG_BITS_MCAN_TXBAR_AR10                         0x00000400
#define CANFD6_REG_BITS_MCAN_TXBAR_AR9                          0x00000200
#define CANFD6_REG_BITS_MCAN_TXBAR_AR8                          0x00000100
#define CANFD6_REG_BITS_MCAN_TXBAR_AR7                          0x00000080
#define CANFD6_REG_BITS_MCAN_TXBAR_AR6                          0x00000040
#define CANFD6_REG_BITS_MCAN_TXBAR_AR5                          0x00000020
#define CANFD6_REG_BITS_MCAN_TXBAR_AR4                          0x00000010
#define CANFD6_REG_BITS_MCAN_TXBAR_AR3                          0x00000008
#define CANFD6_REG_BITS_MCAN_TXBAR_AR2                          0x00000004
#define CANFD6_REG_BITS_MCAN_TXBAR_AR1                          0x00000002
#define CANFD6_REG_BITS_MCAN_TXBAR_AR0                          0x00000001
 
 // canfd6_reg16
 
#define CANFD6_REG_BITS_MCAN_TXBCR_CR31                         0x80000000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR30                         0x40000000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR29                         0x20000000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR28                         0x10000000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR27                         0x08000000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR26                         0x04000000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR25                         0x02000000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR24                         0x01000000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR23                         0x00800000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR22                         0x00400000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR21                         0x00200000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR20                         0x00100000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR19                         0x00080000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR18                         0x00040000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR17                         0x00020000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR16                         0x00010000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR15                         0x00008000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR14                         0x00004000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR13                         0x00002000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR12                         0x00001000
#define CANFD6_REG_BITS_MCAN_TXBCR_CR11                         0x00000800
#define CANFD6_REG_BITS_MCAN_TXBCR_CR10                         0x00000400
#define CANFD6_REG_BITS_MCAN_TXBCR_CR9                          0x00000200
#define CANFD6_REG_BITS_MCAN_TXBCR_CR8                          0x00000100
#define CANFD6_REG_BITS_MCAN_TXBCR_CR7                          0x00000080
#define CANFD6_REG_BITS_MCAN_TXBCR_CR6                          0x00000040
#define CANFD6_REG_BITS_MCAN_TXBCR_CR5                          0x00000020
#define CANFD6_REG_BITS_MCAN_TXBCR_CR4                          0x00000010
#define CANFD6_REG_BITS_MCAN_TXBCR_CR3                          0x00000008
#define CANFD6_REG_BITS_MCAN_TXBCR_CR2                          0x00000004
#define CANFD6_REG_BITS_MCAN_TXBCR_CR1                          0x00000002
#define CANFD6_REG_BITS_MCAN_TXBCR_CR0                          0x00000001
 
 // canfd6_reg17
 
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE31                       0x80000000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE30                       0x40000000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE29                       0x20000000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE28                       0x10000000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE27                       0x08000000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE26                       0x04000000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE25                       0x02000000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE24                       0x01000000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE23                       0x00800000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE22                       0x00400000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE21                       0x00200000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE20                       0x00100000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE19                       0x00080000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE18                       0x00040000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE17                       0x00020000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE16                       0x00010000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE15                       0x00008000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE14                       0x00004000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE13                       0x00002000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE12                       0x00001000
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE11                       0x00000800
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE10                       0x00000400
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE9                        0x00000200
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE8                        0x00000100
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE7                        0x00000080
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE6                        0x00000040
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE5                        0x00000020
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE4                        0x00000010
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE3                        0x00000008
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE2                        0x00000004
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE1                        0x00000002
#define CANFD6_REG_BITS_MCAN_TXBTIE_TIE0                        0x00000001
 
 // canfd6_reg18
 
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE31                      0x80000000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE30                      0x40000000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE29                      0x20000000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE28                      0x10000000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE27                      0x08000000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE26                      0x04000000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE25                      0x02000000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE24                      0x01000000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE23                      0x00800000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE22                      0x00400000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE21                      0x00200000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE20                      0x00100000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE19                      0x00080000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE18                      0x00040000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE17                      0x00020000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE16                      0x00010000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE15                      0x00008000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE14                      0x00004000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE13                      0x00002000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE12                      0x00001000
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE11                      0x00000800
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE10                      0x00000400
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE9                       0x00000200
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE8                       0x00000100
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE7                       0x00000080
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE6                       0x00000040
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE5                       0x00000020
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE4                       0x00000010
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE3                       0x00000008
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE2                       0x00000004
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE1                       0x00000002
#define CANFD6_REG_BITS_MCAN_TXBCIE_CFIE0                       0x00000001
 
 // canfd6_reg19
 
#define CANFD6_REG_BITS_DEVICE_MODE_FORCED_SET_BITS             0x00000020
 
#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_MASK               0xC0000000
#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_DIS                0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_RISING             0x40000000
#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_FALLING            0x80000000
#define CANFD6_REG_BITS_DEVICE_MODE_WAKE_PIN_BOTHEDGES          0xC0000000
 
#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_MASK               0x30000000
#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_60MS               0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_600MS              0x10000000
#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_3S                 0x20000000
#define CANFD6_REG_BITS_DEVICE_MODE_WD_TIMER_6S                 0x30000000
 
#define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_MASK                 0x08000000
#define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_20MHZ                0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_WD_CLK_40MHZ                0x08000000
 
#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MASK                   0x00C00000
#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_CAN_FAULT              0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_MCAN_INT0              0x00400000
#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_WDT                    0x00800000
#define CANFD6_REG_BITS_DEVICE_MODE_GPO2_NINT                   0x00C00000
 
#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_ENMASK             0x00200000
#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_EN                 0x00200000
#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_DIS                0x00000000
 
#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_MASK             0x00080000
#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_INTERNAL         0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_VOLT_VIO              0x00080000
 
#define CANFD6_REG_BITS_DEVICE_MODE_WDT_RESET_BIT               0x00040000
 
#define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_MASK             0x00020000
#define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INT              0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_INH_PULSE        0x00010000
#define CANFD6_REG_BITS_DEVICE_MODE_WDT_ACTION_WDT_PULSE        0x00020000
 
#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_MASK              0x0000C000
#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPO               0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_CLKOUT            0x00004000
#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_MODE_GPI               0x00008000
 
#define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_MASK              0x00002000
#define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_EN                0x00002000
#define CANFD6_REG_BITS_DEVICE_MODE_FAIL_SAFE_DIS               0x00000000
 
#define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_MASK                 0x00001000
#define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV1                 0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_CLKOUT_DIV2                 0x00001000
 
#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MASK              0x00000C00
#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_SPI_INT           0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_MCAN_INT1         0x00000400
#define CANFD6_REG_BITS_DEVICE_MODE_GPO1_FUNC_UVLO_THERM        0x00000800
 
#define CANFD6_REG_BITS_DEVICE_MODE_INH_MASK                    0x00000200
#define CANFD6_REG_BITS_DEVICE_MODE_INH_DIS                     0x00000200
#define CANFD6_REG_BITS_DEVICE_MODE_INH_EN                      0x00000000
 
#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_MASK           0x00000100
#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_INH            0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_NWKRQ_CONFIG_WKRQ           0x00000100
 
#define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_MASK             0x000000C0
#define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_SLEEP            0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_STANDBY          0x00000040
#define CANFD6_REG_BITS_DEVICE_MODE_DEVICEMODE_NORMAL           0x00000080
 
#define CANFD6_REG_BITS_DEVICE_MODE_WDT_MASK                    0x00000008
#define CANFD6_REG_BITS_DEVICE_MODE_WDT_EN                      0x00000008
#define CANFD6_REG_BITS_DEVICE_MODE_WDT_DIS                     0x00000000
 
#define CANFD6_REG_BITS_DEVICE_MODE_DEVICE_RESET                0x00000004
 
#define CANFD6_REG_BITS_DEVICE_MODE_SWE_MASK                    0x00000002
#define CANFD6_REG_BITS_DEVICE_MODE_SWE_DIS                     0x00000002
#define CANFD6_REG_BITS_DEVICE_MODE_SWE_EN                      0x00000000
 
#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_MASK               0x00000001
#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_PHY                0x00000000
#define CANFD6_REG_BITS_DEVICE_MODE_TESTMODE_CONTROLLER         0x00000001
 
 // canfd6_reg20
 
#define CANFD6_REG_BITS_DEVICE_IR_CANLGND                       0x08000000
#define CANFD6_REG_BITS_DEVICE_IR_CANBUSOPEN                    0x04000000
#define CANFD6_REG_BITS_DEVICE_IR_CANBUSGND                     0x02000000
#define CANFD6_REG_BITS_DEVICE_IR_CANBUSBAT                     0x01000000
#define CANFD6_REG_BITS_DEVICE_IR_UVSUP                         0x00400000
#define CANFD6_REG_BITS_DEVICE_IR_UVIO                          0x00200000
#define CANFD6_REG_BITS_DEVICE_IR_PWRON                         0x00100000
#define CANFD6_REG_BITS_DEVICE_IR_TSD                           0x00080000
#define CANFD6_REG_BITS_DEVICE_IR_WDTO                          0x00040000
#define CANFD6_REG_BITS_DEVICE_IR_ECCERR                        0x00010000
#define CANFD6_REG_BITS_DEVICE_IR_CANINT                        0x00008000
#define CANFD6_REG_BITS_DEVICE_IR_LWU                           0x00004000
#define CANFD6_REG_BITS_DEVICE_IR_WKERR                         0x00002000
#define CANFD6_REG_BITS_DEVICE_IR_FRAME_OVF                     0x00001000
#define CANFD6_REG_BITS_DEVICE_IR_CANSLNT                       0x00000400
#define CANFD6_REG_BITS_DEVICE_IR_CANDOM                        0x00000100
#define CANFD6_REG_BITS_DEVICE_IR_GLOBALERR                     0x00000080
#define CANFD6_REG_BITS_DEVICE_IR_nWKRQ                         0x00000040
#define CANFD6_REG_BITS_DEVICE_IR_CANERR                        0x00000020
#define CANFD6_REG_BITS_DEVICE_IR_CANBUSFAULT                   0x00000010
#define CANFD6_REG_BITS_DEVICE_IR_SPIERR                        0x00000008
#define CANFD6_REG_BITS_DEVICE_IR_SWERR                         0x00000004
#define CANFD6_REG_BITS_DEVICE_IR_M_CAN_INT                     0x00000002
#define CANFD6_REG_BITS_DEVICE_IR_VTWD                          0x00000001
 
 // canfd6_reg21
 
#define CANFD6_REG_BITS_DEVICE_IE_UVCCOUT                       0x00800000
#define CANFD6_REG_BITS_DEVICE_IE_UVSUP                         0x00400000
#define CANFD6_REG_BITS_DEVICE_IE_UVIO                          0x00200000
#define CANFD6_REG_BITS_DEVICE_IE_PWRON                         0x00100000
#define CANFD6_REG_BITS_DEVICE_IE_TSD                           0x00080000
#define CANFD6_REG_BITS_DEVICE_IE_WDTO                          0x00040000
#define CANFD6_REG_BITS_DEVICE_IE_ECCERR                        0x00010000
#define CANFD6_REG_BITS_DEVICE_IE_CANINT                        0x00008000
#define CANFD6_REG_BITS_DEVICE_IE_LWU                           0x00004000
#define CANFD6_REG_BITS_DEVICE_IE_WKERR                         0x00002000
#define CANFD6_REG_BITS_DEVICE_IE_FRAME_OVF                     0x00001000
#define CANFD6_REG_BITS_DEVICE_IE_CANSLNT                       0x00000400
#define CANFD6_REG_BITS_DEVICE_IE_CANDOM                        0x00000100
#define CANFD6_REG_BITS_DEVICE_IE_MASK                          0x7F69D700
 
 // canfd6_reg22
 
#define CANFD6_MAP_MIKROBUS( cfg, mikrobus )        \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK );  \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS );   \
    cfg.wkr  = MIKROBUS( mikrobus, MIKROBUS_AN );   \
    cfg.rst  = MIKROBUS( mikrobus, MIKROBUS_RST );  \
    cfg.wkp  = MIKROBUS( mikrobus, MIKROBUS_PWM );  \
    cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
 
 // canfd6_map
 // canfd6
 
typedef struct
{
    // Output pins
 
    digital_out_t  wkr;                                  
    digital_out_t  rst;                                  
    digital_out_t  wkp;                                  
    // Input pins
 
    digital_in_t  int_pin;                               
    // Modules
 
    spi_master_t  spi;                                   
    pin_name_t  chip_select;                             
} canfd6_t;
 
typedef struct
{
    // Communication gpio pins
 
    pin_name_t  miso;                                    
    pin_name_t  mosi;                                    
    pin_name_t  sck;                                     
    pin_name_t  cs;                                      
    // Additional gpio pins
 
    pin_name_t  wkr;                                     
    pin_name_t  rst;                                     
    pin_name_t  wkp;                                     
    pin_name_t  int_pin;                                 
    // static variable
 
    uint32_t                           spi_speed;        
    spi_master_mode_t                  spi_mode;         
    spi_master_chip_select_polarity_t  cs_polarity;      
} canfd6_cfg_t;
 
typedef enum
{
    CANFD6_OK = 0,
    CANFD6_ERROR = -1
 
} canfd6_return_value_t;
 
typedef enum
{
    CANFD6_PIN_STATE_LOW = 0,
    CANFD6_PIN_STATE_HIGH
    
} canfd6_pin_state_t;
 
typedef enum
{
    CANFD6_RXFIFO0,
    CANFD6_RXFIFO1
    
} canfd6_mcan_fifo_enum_t;
 
typedef enum
{
    CANFD6_WDT_60MS,
    CANFD6_WDT_600MS,
    CANFD6_WDT_3S,
    CANFD6_WDT_6S
    
} canfd6_wdt_timer_enum_t;
 
typedef enum
{
    CANFD6_DEVICE_TEST_MODE_NORMAL,
    CANFD6_DEVICE_TEST_MODE_PHY,
    CANFD6_DEVICE_TEST_MODE_CONTROLLER
    
} canfd6_device_test_mode_enum_t;
 
typedef enum
{
    CANFD6_DEVICE_MODE_NORMAL,
    CANFD6_DEVICE_MODE_STANDBY,
    CANFD6_DEVICE_MODE_SLEEP
    
} canfd6_device_mode_enum_t;
 
typedef enum
{
    CANFD6_MRAM_8_Byte_Data  = 0,
    CANFD6_MRAM_12_Byte_Data = 0x1,
    CANFD6_MRAM_16_Byte_Data = 0x2,
    CANFD6_MRAM_20_Byte_Data = 0x3,
    CANFD6_MRAM_24_Byte_Data = 0x4,
    CANFD6_MRAM_32_Byte_Data = 0x5,
    CANFD6_MRAM_48_Byte_Data = 0x6,
    CANFD6_MRAM_64_Byte_Data = 0x7
    
} canfd6_mram_elem_data_size_t;
 
typedef enum
{
    CANFD6_SID_SFEC_DISABLED          = 0x0,       
    CANFD6_SID_SFEC_STORERX0          = 0x1,       
    CANFD6_SID_SFEC_STORERX1          = 0x2,       
    CANFD6_SID_SFEC_REJECTMATCH       = 0x3,       
    CANFD6_SID_SFEC_PRIORITY          = 0x4,       
    CANFD6_SID_SFEC_PRIORITYSTORERX0  = 0x5,       
    CANFD6_SID_SFEC_PRIORITYSTORERX1  = 0x6,       
    CANFD6_SID_SFEC_STORERXBUFORDEBUG = 0x7        
} canfd6_sid_sfec_values_t;
 
typedef enum
{
    CANFD6_SID_SFT_DISABLED           = 0x3,       
    CANFD6_SID_SFT_CLASSIC            = 0x2,       
    CANFD6_SID_SFT_DUALID             = 0x1,       
    CANFD6_SID_SFT_RANGE              = 0x0        
} canfd6_sid_sft_values_t;
 
typedef enum
{
    CANFD6_XID_EFEC_DISABLED          = 0x0,       
    CANFD6_XID_EFEC_STORERX0          = 0x1,       
    CANFD6_XID_EFEC_STORERX1          = 0x2,       
    CANFD6_XID_EFEC_REJECTMATCH       = 0x3,       
    CANFD6_XID_EFEC_PRIORITY          = 0x4,       
    CANFD6_XID_EFEC_PRIORITYSTORERX0  = 0x5,       
    CANFD6_XID_EFEC_PRIORITYSTORERX1  = 0x6,       
    CANFD6_XID_EFEC_STORERXBUFORDEBUG = 0x7        
} canfd6_xid_efec_values_t;
 
typedef enum
{
    CANFD6_XID_EFT_RANGENOMASK        = 0x3,       
    CANFD6_XID_EFT_CLASSIC            = 0x2,       
    CANFD6_XID_EFT_DUALID             = 0x1,       
    CANFD6_XID_EFT_RANGE              = 0x0        
} canfd6_xid_eft_values_t;
 
typedef enum
{
    CANFD6_GFC_ACCEPT_INTO_RXFIFO0 = 0,            
    CANFD6_GFC_ACCEPT_INTO_RXFIFO1 = 1,            
    CANFD6_GFC_REJECT = 2                          
} canfd6_gfc_no_match_behavior_t;
 
typedef enum
{
    CANFD6_DEV_CONFIG_GPO1_SPI_FAULT_INT = 0,      
    CANFD6_DEV_CONFIG_GPO1_MCAN_INT1 = 1,          
    CANFD6_DEV_CONFIG_GPO1_UVO_OR_THERMAL_INT = 2, 
} canfd6_dev_config_gpo1_t;
 
typedef enum
{
    CANFD6_DEV_CONFIG_GPIO1_CONFIG_GPO = 0,        
    CANFD6_DEV_CONFIG_GPIO1_CONFIG_WDT_INPUT = 2   
} canfd6_dev_config_gpio1_t;
 
typedef enum
{
    CANFD6_DEV_CONFIG_WDT_ACTION_nINT = 0,         
    CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_INH = 1,    
    CANFD6_DEV_CONFIG_WDT_ACTION_PULSE_WDT_OUT = 2 
} canfd6_dev_config_wdt_action_t;
 
typedef enum
{
    CANFD6_DEV_CONFIG_GPO2_NO_ACTION = 0,          
    CANFD6_DEV_CONFIG_GPO2_MCAN_INT0 = 1,          
    CANFD6_DEV_CONFIG_GPO2_WATCHDOG = 2,           
    CANFD6_DEV_CONFIG_GPO2_MIRROR_INT = 3          
} canfd6_dev_config_gpo2_t;
 
typedef enum
{
    CANFD6_DEV_CONFIG_WAKE_DISABLED = 0,           
    CANFD6_DEV_CONFIG_WAKE_RISING_EDGE = 1,        
    CANFD6_DEV_CONFIG_WAKE_FALLING_EDGE = 2,       
    CANFD6_DEV_CONFIG_WAKE_BOTH_EDGES = 3          
} canfd6_dev_config_wake_t;
 
typedef struct
{
    uint8_t data_bitrate_prescaler : 6;            
    uint8_t data_tqbefore_samplepoint : 6;         
    uint8_t data_tqafter_samplepoint : 5;          
} canfd6_mcan_data_timing_simple_t;
 
typedef struct
{
    uint8_t data_bitrate_prescaler : 5;              
    uint8_t data_time_seg1_and_prop : 5;             
    uint8_t data_time_seg2 : 4;                      
    uint8_t data_sync_jumpwidth : 4;                 
    uint8_t tdc_offset : 7;                          
    uint8_t tdc_filter : 7;                          
} canfd6_mcan_data_timing_raw_t;
 
typedef struct
{
    uint16_t nominal_bitrate_prescaler : 10;         
    uint16_t nominal_tqbefore_samplepoint : 9;       
    uint8_t nominal_tqafter_samplepoint : 8;         
} canfd6_mcan_nominal_timing_simple_t;
 
typedef struct
{
    uint16_t nominal_bitrate_prescaler : 9;          
    uint8_t nominal_time_seg1_and_prop : 8;          
    uint8_t nominal_time_seg2 : 7;                   
    uint8_t nominal_sync_jumpwidth : 7;              
} canfd6_mcan_nominal_timing_raw_t;
 
typedef struct
{
    uint8_t sid_num_elements : 8;                    
    uint8_t xid_num_elements : 7;                    
    uint8_t rx0_num_elements : 7;                    
    canfd6_mram_elem_data_size_t rx0_element_size : 3; 
    uint8_t rx1_num_elements : 7;                    
    canfd6_mram_elem_data_size_t rx1_element_size : 3; 
    uint8_t rx_buf_num_elements : 7;                 
    canfd6_mram_elem_data_size_t rx_buf_element_size : 3; 
    uint8_t tx_event_fifo_num_elements : 6;          
    uint8_t tx_buffer_num_elements : 6;              
    canfd6_mram_elem_data_size_t tx_buf_element_size : 3; 
} canfd6_mram_config_t;
 
typedef struct
{
    union
    {
        uint32_t word;                               
        struct
        {
            uint8_t reserved : 2;                    
            uint8_t ASM : 1;                         
            uint8_t reserved2 : 1;                   
            uint8_t CSR : 1;                         
            uint8_t MON : 1;                         
            uint8_t DAR : 1;                         
            uint8_t TEST : 1;                        
            uint8_t FDOE : 1;                        
            uint8_t BRSE : 1;                        
            uint8_t reserved3 : 2;                   
            uint8_t PXHD : 1;                        
            uint8_t EFBI : 1;                        
            uint8_t TXP : 1;                         
            uint8_t NISO : 1;                        
        };
    };
} canfd6_mcan_cccr_config_t;
 
typedef struct
{
    union
    {
        uint32_t word;                               
        struct
        {
            uint8_t RF0N : 1;                        
            uint8_t RF0W : 1;                        
            uint8_t RF0F : 1;                        
            uint8_t RF0L : 1;                        
            uint8_t RF1N : 1;                        
            uint8_t RF1W : 1;                        
            uint8_t RF1F : 1;                        
            uint8_t RF1L : 1;                        
            uint8_t HPM : 1;                         
            uint8_t TC : 1;                          
            uint8_t TCF : 1;                         
            uint8_t TFE : 1;                         
            uint8_t TEFN : 1;                        
            uint8_t TEFW : 1;                        
            uint8_t TEFF : 1;                        
            uint8_t TEFL : 1;                        
            uint8_t TSW : 1;                         
            uint8_t MRAF : 1;                        
            uint8_t TOO : 1;                         
            uint8_t DRX : 1;                         
            uint8_t BEC : 1;                         
            uint8_t BEU : 1;                         
            uint8_t ELO : 1;                         
            uint8_t EP : 1;                          
            uint8_t EW : 1;                          
            uint8_t BO : 1;                          
            uint8_t WDI : 1;                         
            uint8_t PEA : 1;                         
            uint8_t PED : 1;                         
            uint8_t ARA : 1;                         
            uint8_t reserved : 2;                    
        };
    };
} canfd6_mcan_interrupts_t;
 
typedef struct
{
    union
    {
        uint32_t word;                               
        struct
        {
            uint8_t RF0NE : 1;                       
            uint8_t RF0WE : 1;                       
            uint8_t RF0FE : 1;                       
            uint8_t RF0LE : 1;                       
            uint8_t RF1NE : 1;                       
            uint8_t RF1WE : 1;                       
            uint8_t RF1FE : 1;                       
            uint8_t RF1LE : 1;                       
            uint8_t HPME : 1;                        
            uint8_t TCE : 1;                         
            uint8_t TCFE : 1;                        
            uint8_t TFEE : 1;                        
            uint8_t TEFNE : 1;                       
            uint8_t TEFWE : 1;                       
            uint8_t TEFFE : 1;                       
            uint8_t TEFLE : 1;                       
            uint8_t TSWE : 1;                        
            uint8_t MRAFE : 1;                       
            uint8_t TOOE : 1;                        
            uint8_t DRXE : 1;                        
            uint8_t BECE : 1;                        
            uint8_t BEUE : 1;                        
            uint8_t ELOE : 1;                        
            uint8_t EPE : 1;                         
            uint8_t EWE : 1;                         
            uint8_t BOE : 1;                         
            uint8_t WDIE : 1;                        
            uint8_t PEAE : 1;                        
            uint8_t PEDE : 1;                        
            uint8_t ARAE : 1;                        
            uint8_t reserved : 2;                    
        };
    };
} canfd6_mcan_interrupt_enable_t;
 
typedef struct
{
    uint32_t ID : 29;                                
    uint8_t RTR : 1;                                 
    uint8_t XTD : 1;                                 
    uint8_t ESI : 1;                                 
    uint16_t RXTS : 16;                              
    uint8_t DLC : 4;                                 
    uint8_t BRS : 1;                                 
    uint8_t FDF : 1;                                 
    uint8_t reserved : 2;                            
    uint8_t FIDX : 7;                                
    uint8_t ANMF : 1;                                
} canfd6_mcan_rx_header_t;
 
typedef struct
{
    uint32_t ID : 29;                                
    uint8_t RTR : 1;                                 
    uint8_t XTD : 1;                                 
    uint8_t ESI : 1;                                 
    uint8_t DLC : 4;                                 
    uint8_t BRS : 1;                                 
    uint8_t FDF : 1;                                 
    uint8_t reserved : 1;                            
    uint8_t EFC : 1;                                 
    uint8_t MM : 8;                                  
} canfd6_mcan_tx_header_t;
 
typedef struct
{
    union
    {
        uint32_t word;                               
        struct
        {
            uint16_t SFID2 : 11;                     
            uint8_t reserved : 5;                    
            uint16_t SFID1 : 11;                     
            canfd6_sid_sfec_values_t SFEC : 3;       
            canfd6_sid_sfec_values_t SFT : 2;        
        };
    };
} canfd6_mcan_sid_filter_t;
 
typedef struct
{
    uint32_t EFID2 : 29;                             
    uint8_t reserved : 1;                            
    canfd6_xid_eft_values_t EFT : 2;                 
    uint32_t EFID1 : 29;                             
    canfd6_xid_efec_values_t EFEC : 3;               
} canfd6_mcan_xid_filter_t;
 
typedef struct
{
    union
    {
        uint32_t word;                               
        struct
        {
            uint8_t RRFE : 1;                        
            uint8_t RRFS : 1;                        
            canfd6_gfc_no_match_behavior_t ANFE : 2; 
            canfd6_gfc_no_match_behavior_t ANFS : 2; 
            uint32_t reserved : 26;                  
        };
    };
} canfd6_mcan_global_filter_configuration_t;
 
typedef struct
{
    union
    {
        uint32_t word;                               
        struct
        {
            uint8_t VTWD : 1;                        
            uint8_t M_CAN_INT : 1;                   
            uint8_t SWERR : 1;                       
            uint8_t SPIERR : 1;                      
            uint8_t CBF : 1;                         
            uint8_t CANERR : 1;                      
            uint8_t WKRQ : 1;                        
            uint8_t GLOBALERR : 1;                   
            uint8_t CANDOM : 1;                      
            uint8_t RESERVED : 1;                    
            uint8_t CANTO : 1;                       
            uint8_t RESERVED2 : 1;                   
            uint8_t FRAME_OVF : 1;                   
            uint8_t WKERR : 1;                       
            uint8_t LWU : 1;                         
            uint8_t CANINT : 1;                      
            uint8_t ECCERR : 1;                      
            uint8_t RESERVED3 : 1;                   
            uint8_t WDTO : 1;                        
            uint8_t TSD : 1;                         
            uint8_t PWRON : 1;                       
            uint8_t UVIO : 1;                        
            uint8_t UVSUP : 1;                       
            uint8_t SMS : 1;                         
            uint8_t CANBUSBAT : 1;                   
            uint8_t CANBUSGND : 1;                   
            uint8_t CANBUSOPEN : 1;                  
            uint8_t CANLGND : 1;                     
            uint8_t CANHBAT : 1;                     
            uint8_t CANHCANL : 1;                    
            uint8_t CANBUSTERMOPEN : 1;              
            uint8_t CANBUSNORM : 1;                  
        };
    };
} canfd6_device_interrupts_t;
 
typedef struct
{
    union
    {
        uint32_t word;                               
        struct
        {
            uint8_t RESERVED1 : 8;                   
            uint8_t CANDOMEN : 1;                    
            uint8_t RESERVED2 : 1;                   
            uint8_t CANTOEN : 1;                     
            uint8_t RESERVED3 : 1;                   
            uint8_t FRAME_OVFEN : 1;                 
            uint8_t WKERREN : 1;                     
            uint8_t LWUEN : 1;                       
            uint8_t CANINTEN : 1;                    
            uint8_t ECCERREN : 1;                    
            uint8_t RESERVED4 : 1;                   
            uint8_t WDTOEN : 1;                      
            uint8_t TSDEN : 1;                       
            uint8_t PWRONEN : 1;                     
            uint8_t UVIOEN : 1;                      
            uint8_t UVSUPEN : 1;                     
            uint8_t SMSEN : 1;                       
            uint8_t CANBUSBATEN : 1;                 
            uint8_t CANBUSGNDEN : 1;                 
            uint8_t CANBUSOPENEN : 1;                
            uint8_t CANLGNDEN : 1;                   
            uint8_t CANHBATEN : 1;                   
            uint8_t CANHCANLEN : 1;                  
            uint8_t CANBUSTERMOPENEN : 1;            
            uint8_t CANBUSNORMEN : 1;                
        };
    };
} canfd6_device_interrupt_enable_t;
 
typedef struct
{
    union
    {
        uint32_t word;                               
        struct
        {
            uint8_t RESERVED0 : 1;                   
            uint8_t SWE_DIS: 1;                      
            uint8_t DEVICE_RESET : 1;                
            uint8_t WD_EN : 1;                       
            uint8_t RESERVED1 : 4;                   
            uint8_t nWKRQ_CONFIG : 1;                
            uint8_t INH_DIS : 1;                     
            canfd6_dev_config_gpo1_t GPIO1_GPO_CONFIG : 2; 
            uint8_t RESERVED2 : 1;                   
            uint8_t FAIL_SAFE_EN : 1;                
            canfd6_dev_config_gpio1_t GPIO1_CONFIG : 2; 
            canfd6_dev_config_wdt_action_t WD_ACTION : 2; 
            uint8_t WD_BIT_RESET : 1;                
            uint8_t nWKRQ_VOLTAGE : 1;               
            uint8_t RESERVED3 : 2;                   
            canfd6_dev_config_gpo2_t GPO2_CONFIG : 2; 
            uint8_t RESERVED4 : 3;                   
            uint8_t CLK_REF : 1;                     
            uint8_t RESERVED5 : 2;                   
            canfd6_dev_config_wake_t WAKE_CONFIG : 2; 
        };
    };
} canfd6_dev_config_t;
 
void canfd6_cfg_setup ( canfd6_cfg_t *cfg );
 
err_t canfd6_init ( canfd6_t *ctx, canfd6_cfg_t *cfg );
 
void canfd6_default_cfg ( canfd6_t *ctx );
 
void canfd6_wkr_pin_state ( canfd6_t *ctx, canfd6_pin_state_t state );
 
void canfd6_rst_pin_state ( canfd6_t *ctx, canfd6_pin_state_t state );
 
void canfd6_wkp_pin_state ( canfd6_t *ctx, canfd6_pin_state_t state );
 
uint8_t canfd6_get_int_pin ( canfd6_t *ctx );
 
err_t canfd6_enable_protected_registers ( canfd6_t *ctx );
 
err_t canfd6_disable_protected_registers ( canfd6_t *ctx );
 
void canfd6_configure_cccr_register ( canfd6_t *ctx, canfd6_mcan_cccr_config_t *cccr_config );
 
void canfd6_read_cccr_register ( canfd6_t *ctx, canfd6_mcan_cccr_config_t *cccr_config );
 
void canfd6_mcan_read_datatimingfd_simple ( canfd6_t *ctx, canfd6_mcan_data_timing_simple_t *data_timing );
 
void canfd6_mcan_read_datatimingfd_raw ( canfd6_t *ctx, canfd6_mcan_data_timing_raw_t *data_timing );
 
void canfd6_mcan_configure_datatiming_simple ( canfd6_t *ctx, canfd6_mcan_data_timing_simple_t *data_timing );
 
void canfd6_mcan_configure_datatiming_raw ( canfd6_t *ctx, canfd6_mcan_data_timing_raw_t *data_timing );
 
void canfd6_mcan_read_nominaltiming_simple ( canfd6_t *ctx, canfd6_mcan_nominal_timing_simple_t *nom_timing );
 
void canfd6_mcan_read_nominaltiming_raw ( canfd6_t *ctx, canfd6_mcan_nominal_timing_raw_t *nom_timing );
 
void canfd6_mcan_configure_nominaltiming_simple ( canfd6_t *ctx, canfd6_mcan_nominal_timing_simple_t *nom_timing );
 
void canfd6_mcan_configure_nominaltiming_raw ( canfd6_t *ctx, canfd6_mcan_nominal_timing_raw_t *nom_timing );
 
void canfd6_mcan_configure_globalfilter ( canfd6_t *ctx, canfd6_mcan_global_filter_configuration_t *gfc );
 
err_t canfd6_mram_configure ( canfd6_t *ctx, canfd6_mram_config_t *mram_config );
 
void canfd6_mram_clear ( canfd6_t *ctx );
 
uint8_t canfd6_mcan_read_nextfifo ( canfd6_t *ctx, canfd6_mcan_fifo_enum_t fifo_def, canfd6_mcan_rx_header_t *header, uint8_t data_payload[ ] );
 
uint8_t canfd6_mcan_read_rxbuffer ( canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_rx_header_t *header, uint8_t data_payload[ ] );
 
uint32_t canfd6_mcan_write_txbuffer ( canfd6_t *ctx, uint8_t buf_index, canfd6_mcan_tx_header_t *header, uint8_t data_payload[ ] );
 
err_t canfd6_mcan_transmit_buffer_contents ( canfd6_t *ctx, uint8_t buf_index );
 
err_t canfd6_mcan_write_sid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter );
 
err_t canfd6_mcan_read_sid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_sid_filter_t *filter );
 
err_t canfd6_mcan_write_xid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter );
 
err_t canfd6_mcan_read_xid_filter ( canfd6_t *ctx, uint8_t filter_index, canfd6_mcan_xid_filter_t *filter );
 
void canfd6_mcan_read_interrupts ( canfd6_t *ctx, canfd6_mcan_interrupts_t *ir );
 
void canfd6_mcan_clear_interrupts ( canfd6_t *ctx, canfd6_mcan_interrupts_t *ir );
 
void canfd6_mcan_clear_interrupts_all ( canfd6_t *ctx );
 
void canfd6_mcan_read_interrupt_enable ( canfd6_t *ctx, canfd6_mcan_interrupt_enable_t *ie );
 
void canfd6_mcan_configure_interrupt_enable ( canfd6_t *ctx, canfd6_mcan_interrupt_enable_t *ie );
 
uint8_t canfd6_mcan_dlc_to_bytes ( uint8_t input_dlc );
 
uint8_t canfd6_mcan_txrxesc_data_byte_value ( uint8_t input_esc_value );
 
uint16_t canfd6_device_read_version ( canfd6_t *ctx );
 
void canfd6_device_configure ( canfd6_t *ctx, canfd6_dev_config_t *dev_cfg );
 
void canfd6_device_read_config ( canfd6_t *ctx, canfd6_dev_config_t *dev_cfg );
 
void canfd6_device_read_interrupts ( canfd6_t *ctx, canfd6_device_interrupts_t *ir );
 
void canfd6_device_clear_interrupts ( canfd6_t *ctx, canfd6_device_interrupts_t *ir );
 
void canfd6_device_clear_interrupts_all ( canfd6_t *ctx );
 
void canfd6_device_clear_spierr ( canfd6_t *ctx );
 
void canfd6_device_read_interrupt_enable ( canfd6_t *ctx, canfd6_device_interrupt_enable_t *ie );
 
void canfd6_device_configure_ie ( canfd6_t *ctx, canfd6_device_interrupt_enable_t *ie );
 
err_t canfd6_device_set_mode ( canfd6_t *ctx, canfd6_device_mode_enum_t mode_define );
 
canfd6_device_mode_enum_t canfd6_device_read_mode ( canfd6_t *ctx );
 
err_t canfd6_device_enable_testmode ( canfd6_t *ctx, canfd6_device_test_mode_enum_t mode_define );
 
void canfd6_device_disable_testmode ( canfd6_t *ctx );
 
canfd6_device_test_mode_enum_t canfd6_device_read_testmode ( canfd6_t *ctx );
 
err_t canfd6_wdt_configure ( canfd6_t *ctx, canfd6_wdt_timer_enum_t wdt_timeout );
 
canfd6_wdt_timer_enum_t canfd6_wdt_read ( canfd6_t *ctx );
 
void canfd6_wdt_enable ( canfd6_t *ctx );
 
void canfd6_wdt_disable ( canfd6_t *ctx );
 
void canfd6_wdt_reset ( canfd6_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif // CANFD6_H
 
 // canfd6
 
// ------------------------------------------------------------------------ END