dac10.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef DAC10_H
#define DAC10_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"
 
#define DAC10_REG_STATUS                                0xD0
#define DAC10_REG_GENERAL_CONFIG                        0xD1
#define DAC10_REG_TRIGGER                               0xD3
#define DAC10_REG_DAC_DATA                              0x21
#define DAC10_REG_DAC_MARGIN_HIGH                       0x25
#define DAC10_REG_DAC_MARGIN_LOW                        0x26
#define DAC10_REG_PMBUS_OPERATION                       0x01
#define DAC10_REG_PMBUS_STATUS_BYTE                     0x78
#define DAC10_REG_PMBUS_VERSION                         0x98
 
 // dac10_reg
 
#define DAC10_STATUS_NVM_CRC_ALARM_USER                 0x8000
#define DAC10_STATUS_NVM_CRC_ALARM_INTERNAL             0x4000
#define DAC10_STATUS_NVM_BUSY                           0x2000
#define DAC10_STATUS_DAC_UPDATE_BUSY                    0x1000
#define DAC10_STATUS_DEVICE_ID                          0x000C
#define DAC10_STATUS_DEVICE_ID_MASK                     0x003C
#define DAC10_STATUS_VERSION_ID_MASK                    0x0003
 
#define DAC10_GEN_CONFIG_FCFG_TRIANGLE_WAVE             0x0000
#define DAC10_GEN_CONFIG_FCFG_SAW_TOOTH_WAVE_RISING     0x4000
#define DAC10_GEN_CONFIG_FCFG_SAW_TOOTH_WAVE_FALLING    0x8000
#define DAC10_GEN_CONFIG_FCFG_SQUARE_WAVE               0xC000
#define DAC10_GEN_CONFIG_FCFG_CLR_MASK                  0xC000
#define DAC10_GEN_CONFIG_DEVICE_LOCKED                  0x2000
#define DAC10_GEN_CONFIG_DEVICE_NOT_LOCKED              0x0000
#define DAC10_GEN_CONFIG_DEVICE_LOCK_MASK               0x2000
#define DAC10_GEN_CONFIG_PMBUS_ENABLE                   0x1000
#define DAC10_GEN_CONFIG_PMBUS_DISABLE                  0x0000
#define DAC10_GEN_CONFIG_PMBUS_EN_MASK                  0x1000
#define DAC10_GEN_CONFIG_CODE_STEP_1LSB                 0x0000
#define DAC10_GEN_CONFIG_CODE_STEP_2LSB                 0x0200
#define DAC10_GEN_CONFIG_CODE_STEP_3LSB                 0x0400
#define DAC10_GEN_CONFIG_CODE_STEP_4LSB                 0x0600
#define DAC10_GEN_CONFIG_CODE_STEP_6LSB                 0x0800
#define DAC10_GEN_CONFIG_CODE_STEP_8LSB                 0x0A00
#define DAC10_GEN_CONFIG_CODE_STEP_16LSB                0x0C00
#define DAC10_GEN_CONFIG_CODE_STEP_32LSB                0x0E00
#define DAC10_GEN_CONFIG_CODE_STEP_MASK                 0x0E00
#define DAC10_GEN_CONFIG_SLEW_RATE_25p6US               0x0000
#define DAC10_GEN_CONFIG_SLEW_RATE_25p6USx1p25          0x0020
#define DAC10_GEN_CONFIG_SLEW_RATE_25p6USx1p50          0x0040
#define DAC10_GEN_CONFIG_SLEW_RATE_25p6USx1p75          0x0060
#define DAC10_GEN_CONFIG_SLEW_RATE_204p8US              0x0080
#define DAC10_GEN_CONFIG_SLEW_RATE_204p8USx1p25         0x00A0
#define DAC10_GEN_CONFIG_SLEW_RATE_204p8USx1p50         0x00C0
#define DAC10_GEN_CONFIG_SLEW_RATE_204p8USx1p75         0x00E0
#define DAC10_GEN_CONFIG_SLEW_RATE_1p6384MS             0x0100
#define DAC10_GEN_CONFIG_SLEW_RATE_1p6384MSx1p25        0x0120
#define DAC10_GEN_CONFIG_SLEW_RATE_1p6384MSx1p50        0x0140
#define DAC10_GEN_CONFIG_SLEW_RATE_1p6384MSx1p75        0x0160
#define DAC10_GEN_CONFIG_SLEW_RATE_12US                 0x0180
#define DAC10_GEN_CONFIG_SLEW_RATE_8US                  0x01A0
#define DAC10_GEN_CONFIG_SLEW_RATE_4US                  0x01C0
#define DAC10_GEN_CONFIG_SLEW_RATE_NO_SLEW              0x01E0
#define DAC10_GEN_CONFIG_SLEW_RATE_MASK                 0x01E0
#define DAC10_GEN_CONFIG_DAC_PDN_POWER_UP               0x0000
#define DAC10_GEN_CONFIG_DAC_PDN_POWER_DOWN_10K         0x0008
#define DAC10_GEN_CONFIG_DAC_PDN_POWER_DOWN_HIGH_Z      0x0010
#define DAC10_GEN_CONFIG_DAC_PDN_MASK                   0x0018
#define DAC10_GEN_CONFIG_INT_REF_ENABLE                 0x0004
#define DAC10_GEN_CONFIG_INT_REF_DISABLE                0x0000
#define DAC10_GEN_CONFIG_INT_REF_EN_MASK                0x0004
#define DAC10_GEN_CONFIG_DAC_SPAN_GAIN_1p5X             0x0000
#define DAC10_GEN_CONFIG_DAC_SPAN_GAIN_2X               0x0001
#define DAC10_GEN_CONFIG_DAC_SPAN_GAIN_3X               0x0002
#define DAC10_GEN_CONFIG_DAC_SPAN_GAIN_4X               0x0003
#define DAC10_GEN_CONFIG_DAC_SPAN_MASK                  0x0003
 
#define DAC10_TRIGGER_DEVICE_UNLOCK_CODE                0x5000
#define DAC10_TRIGGER_DEVICE_UNLOCK_CODE_MASK           0xF000
#define DAC10_TRIGGER_DEVICE_CONFIG_RESET_INITIATED     0x0200
#define DAC10_TRIGGER_DEVICE_CONFIG_RESET_NOT_INITIATED 0x0000
#define DAC10_TRIGGER_DEVICE_CONFIG_RESET_MASK          0x0200
#define DAC10_TRIGGER_START_FUNC_GEN_ENABLE             0x0100
#define DAC10_TRIGGER_START_FUNC_GEN_DISABLE            0x0000
#define DAC10_TRIGGER_START_FUNC_GEN_MASK               0x0100
#define DAC10_TRIGGER_PMBUS_MARGIN_HIGH_INITIATED       0x0080
#define DAC10_TRIGGER_PMBUS_MARGIN_HIGH_NOT_INITIATED   0x0000
#define DAC10_TRIGGER_PMBUS_MARGIN_HIGH_MASK            0x0080
#define DAC10_TRIGGER_PMBUS_MARGIN_LOW_INITIATED        0x0040
#define DAC10_TRIGGER_PMBUS_MARGIN_LOW_NOT_INITIATED    0x0000
#define DAC10_TRIGGER_PMBUS_MARGIN_LOW_MASK             0x0040
#define DAC10_TRIGGER_NWM_RELOAD_INITIATED              0x0020
#define DAC10_TRIGGER_NWM_RELOAD_NOT_INITIATED          0x0000
#define DAC10_TRIGGER_NWM_RELOAD_MASK                   0x0020
#define DAC10_TRIGGER_NWM_PROG_INITIATED                0x0010
#define DAC10_TRIGGER_NWM_PROG_NOT_INITIATED            0x0000
#define DAC10_TRIGGER_NWM_PROG_MASK                     0x0010
#define DAC10_TRIGGER_SW_RESET_INITIATED                0x0008
#define DAC10_TRIGGER_SW_RESET_NOT_INITIATED            0x000A
#define DAC10_TRIGGER_SW_RESET_MASK                     0x000F
 
#define DAC10_PMBUS_OPERATION_CMD_TURN_OFF              0x0000
#define DAC10_PMBUS_OPERATION_CMD_TURN_ON               0x8000
#define DAC10_PMBUS_OPERATION_CMD_MARGIN_HIGH           0xA400
#define DAC10_PMBUS_OPERATION_CMD_MARGIN_LOW            0x9400
#define DAC10_PMBUS_OPERATION_CMD                       0xFF00
 
#define DAC10_PMBUS_STATUS_BYTE_CML_NO_FAULT            0x0000
#define DAC10_PMBUS_STATUS_BYTE_CML_FAULT               0x0200
#define DAC10_PMBUS_STATUS_BYTE_CML_MASK                0x0200
 
#define DAC10_PMBUS_VERSION_DEFAULT                     0x2200
#define DAC10_PMBUS_VERSION_MASK                        0xFF00
 
#define DAC10_MIN_DAC_VALUE                             0x0000
#define DAC10_MAX_DAC_VALUE                             0x03FF
 
#define DAC10_VREF_3V3                                  3.3
#define DAC10_VREF_5V                                   5
#define DAC10_VREF_INT                                  1.21
 
#define DAC10_DEV_ADDR_GND                              0x48
#define DAC10_DEV_ADDR_VCC                              0x49
#define DAC10_DEV_ADDR_SDA                              0x4A
#define DAC10_DEV_ADDR_SCL                              0x4B
#define DAC10_DEV_ADDR_BROADCAST                        0x47
 
 
 // dac10_set
 
#define DAC10_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
    cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA );
 
 // dac10_map
 // dac10
 
typedef struct
{
    // Modules
    i2c_master_t i2c;        
    // I2C slave address
    uint8_t slave_address;   
} dac10_t;
 
typedef struct
{
    pin_name_t  scl;        
    pin_name_t  sda;        
    uint32_t  i2c_speed;    
    uint8_t   i2c_address;  
} dac10_cfg_t;
 
typedef enum
{
    DAC10_OK = 0,
    DAC10_ERROR = -1
 
} dac10_return_value_t;
 
void dac10_cfg_setup ( dac10_cfg_t *cfg );
 
err_t dac10_init ( dac10_t *ctx, dac10_cfg_t *cfg );
 
err_t dac10_reg_write ( dac10_t *ctx, uint8_t reg, uint16_t data_in );
 
err_t dac10_reg_read ( dac10_t *ctx, uint8_t reg, uint16_t *data_in );
 
err_t dac10_set_dac_value ( dac10_t *ctx, uint16_t data_in );
 
err_t dac10_set_output_voltage ( dac10_t *ctx, float vref, float voltage );
 
err_t dac10_set_output_voltage_int_vref ( dac10_t *ctx, float voltage );
 
err_t dac10_set_dac_margin_high ( dac10_t *ctx, uint16_t data_in );
 
err_t dac10_set_dac_margin_low ( dac10_t *ctx, uint16_t data_in );
 
err_t dac10_check_device_id ( dac10_t *ctx );
 
err_t dac10_enable_dac ( dac10_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif // DAC10_H
 
 // dac10
 
// ------------------------------------------------------------------------ END