ecg3 2.0.0.0
ecg3.h
Go to the documentation of this file.
1/*
2 * MikroSDK - MikroE Software Development Kit
3 * Copyright© 2020 MikroElektronika d.o.o.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22 * OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
33// ----------------------------------------------------------------------------
34
35#ifndef ECG3_H
36#define ECG3_H
37
42#ifdef PREINIT_SUPPORTED
43#include "preinit.h"
44#endif
45
46#ifdef MikroCCoreVersion
47 #if MikroCCoreVersion >= 1
48 #include "delays.h"
49 #endif
50#endif
51
52#include "drv_digital_out.h"
53#include "drv_digital_in.h"
54#include "drv_spi_master.h"
55
56// -------------------------------------------------------------- PUBLIC MACROS
67#define ECG3_MAP_MIKROBUS( cfg, mikrobus ) \
68 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
69 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
70 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
71 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
72 cfg.clk = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
73 cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
80#define ECG3_RETVAL uint8_t
81
82#define ECG3_OK 0x00
83#define ECG3_INIT_ERROR 0xFF
91#define ECG3_NO_OP_REG 0x00
92#define ECG3_STAT_REG 0x01
93#define ECG3_EN_INT_REG 0x02
94#define ECG3_EN_INT2_REG 0x03
95#define ECG3_MNGR_INT_REG 0x04
96#define ECG3_MNGR_DYN_REG 0x05
97#define ECG3_SW_RST_REG 0x08
98#define ECG3_SYNC_REG 0x09
99#define ECG3_FIFO_RST_REG 0x0A
100#define ECG3_INFO_REG 0x0F
101#define ECG3_CNFG_GEN_REG 0x10
102#define ECG3_CNFG_CAL_REG 0x12
103#define ECG3_CNFG_EMUX_REG 0x14
104#define ECG3_CNFG_ECG_REG 0x15
105#define ECG3_CNFG_RTOR1_REG 0x1D
106#define ECG3_CNFG_RTOR2_REG 0x1E
107#define ECG3_ECG_FIFO_BURST_REG 0x20
108#define ECG3_ECG_FIFO_REG 0x21
109#define ECG3_RTOR_REG 0x25
110#define ECG3_NO_OP2_REG 0x7F
117#define ECG3_EINT_MASK 0x800000
118#define ECG3_EOVF_MASK 0x400000
119#define ECG3_FSTINT_MASK 0x200000
120#define ECG3_DCLOFF_INT_MASK 0x100000
121#define ECG3_LONINT_MASK 0x000800
122#define ECG3_RRINT_MASK 0x000400
123#define ECG3_SAMP_INT_MASK 0x000200
124#define ECG3_PLLINT_MASK 0x000100
125#define ECG3_LDOFF_PH_INT_MASK 0x000008
126#define ECG3_LDOFF_PL_INT_MASK 0x000004
127#define ECG3_LDOFF_NH_INT_MASK 0x000002
128#define ECG3_LDOFF_NL_INT_MASK 0x000001
135#define ECG3_INTB_DIS 0x000000
136#define ECG3_INTB_CMOS 0x000001
137#define ECG3_INTB_OD_NMOS 0x000002
138#define ECG3_INTB_OD_NMOS_INTER_PULLUP 0x000003
145#define ECG3_FSINT_CLR_DISENGAGED 0x000000
146#define ECG3_FSINT_CLR_STAT 0x000040
147#define ECG3_RRINT_CLR_STAT 0x000000
148#define ECG3_RRINT_CLR_RTOR 0x000010
149#define ECG3_RRINT_SELF_CLR 0x000020
150#define ECG3_SAMP_CLR_STAT 0x000000
151#define ECG3_SAMP_SELF_CLR 0x000004
152#define ECG3_SAMP_FREQ_1_SAMP 0x000000
153#define ECG3_SAMP_FREQ_2_SAMP 0x000001
154#define ECG3_SAMP_FREQ_4_SAMP 0x000002
155#define ECG3_SAMP_FREQ_16_SAMP 0x000003
162#define ECG3_NORMAL_MODE 0x000000
163#define ECG3_MANUAL_FAST_MODE 0x400000
164#define ECG3_AUTO_FAST_MODE 0x800000
171#define ECG3_SW_RST_CMD 0x000000
172#define ECG3_FIFO_RST_CMD 0x000000
173#define ECG3_SYNCH_CMD 0x000000
180#define ECG3_ULP_LON_EN 0x400000
181#define ECG3_FMSTR_32768HZ_ECG_512HZ 0x000000
182#define ECG3_FMSTR_32000HZ_ECG_500HZ 0x100000
183#define ECG3_FMSTR_32000HZ_ECG_200HZ 0x200000
184#define ECG3_FMSTR_31968HZ_ECG_199HZ 0x300000
185#define ECG3_ECG_CHANN_EN 0x080000
186#define ECG3_DCLOFF_EN 0x001000
187#define ECG3_ECGP_PULLUP 0x000000
188#define ECG3_ECGP_PULLDOWN 0x000800
189#define ECG3_DCLOFF_IMAG_0NA 0x000000
190#define ECG3_DCLOFF_IMAG_5NA 0x000100
191#define ECG3_DCLOFF_IMAG_10NA 0x000200
192#define ECG3_DCLOFF_IMAG_20NA 0x000300
193#define ECG3_DCLOFF_IMAG_50NA 0x000400
194#define ECG3_DCLOFF_IMAG_100NA 0x000500
195#define ECG3_DCLOFF_VTH_300MV 0x000000
196#define ECG3_DCLOFF_VTH_400MV 0x000040
197#define ECG3_DCLOFF_VTH_450MV 0x000080
198#define ECG3_DCLOFF_VTH_500MV 0x0000C0
199#define ECG3_RBIAS_EN 0x000010
200#define ECG3_RBIAS_50M_OHM 0x000000
201#define ECG3_RBIAS_100M_OHM 0x000004
202#define ECG3_RBIAS_200M_OHM 0x000008
203#define ECG3_RBIASP_EN 0x000002
204#define ECG3_RBIASN_EN 0x000001
211#define ECG3_VCAL_EN 0x400000
212#define ECG3_VMODE_UNIPOL 0x000000
213#define ECG3_VMODE_BIPOL 0x200000
214#define ECG3_VMAG_250MICROV 0x000000
215#define ECG3_VMAG_500MICROV 0x100000
216#define ECG3_FCAL_256HZ 0x000000
217#define ECG3_FCAL_64HZ 0x001000
218#define ECG3_FCAL_16HZ 0x002000
219#define ECG3_FCAL_4HZ 0x003000
220#define ECG3_FCAL_1HZ 0x004000
221#define ECG3_FCAL_1PER4HZ 0x005000
222#define ECG3_FCAL_1PER16HZ 0x006000
223#define ECG3_FCAL_1PER64HZ 0x007000
224#define ECG3_FIFTY_CAL_THIGH 0x000000
225#define ECG3_FIFTY_50PERCENTS 0x000800
232#define ECG3_INPUT_NON_INV 0x000000
233#define ECG3_INPUT_INV 0x800000
234#define ECG3_ECGP_EN 0x000000
235#define ECG3_ECGP_DIS 0x200000
236#define ECG3_ECGN_EN 0x000000
237#define ECG3_ECGN_DIS 0x100000
238#define ECG3_ECGP_NO_CAL 0x000000
239#define ECG3_ECGP_CAL_VMID 0x040000
240#define ECG3_ECGP_CAL_VCALP 0x080000
241#define ECG3_ECGP_CAL_VCALN 0x0C0000
242#define ECG3_ECGN_NO_CAL 0x000000
243#define ECG3_ECGN_CAL_VMID 0x010000
244#define ECG3_ECGN_CAL_VCALP 0x020000
245#define ECG3_ECGN_CAL_VCALN 0x030000
252#define ECG3_GAIN_20VPERV 0x000000
253#define ECG3_GAIN_40VPERV 0x010000
254#define ECG3_GAIN_80VPERV 0x020000
255#define ECG3_GAIN_160VPERV 0x030000
256#define ECG3_DHPF_BYPASS_DC 0x000000
257#define ECG3_DHPF_500MILIHZ 0x004000
258#define ECG3_DLPF_BYPASS 0x000000
259#define ECG3_DLPF_40HZ 0x001000
260#define ECG3_DLPF_100HZ 0x002000
261#define ECG3_DLPF_150HZ 0x003000
268#define ECG3_WNDW_6 0x000000
269#define ECG3_WNDW_8 0x100000
270#define ECG3_WNDW_10 0x200000
271#define ECG3_WNDW_12 0x300000
272#define ECG3_WNDW_14 0x400000
273#define ECG3_WNDW_16 0x500000
274#define ECG3_WNDW_18 0x600000
275#define ECG3_WNDW_20 0x700000
276#define ECG3_WNDW_22 0x800000
277#define ECG3_WNDW_24 0x900000
278#define ECG3_WNDW_26 0xA00000
279#define ECG3_WNDW_28 0xB00000
280#define ECG3_RRGAIN_1 0x000000
281#define ECG3_RRGAIN_2 0x010000
282#define ECG3_RRGAIN_4 0x020000
283#define ECG3_RRGAIN_8 0x030000
284#define ECG3_RRGAIN_16 0x040000
285#define ECG3_RRGAIN_32 0x050000
286#define ECG3_RRGAIN_64 0x060000
287#define ECG3_RRGAIN_128 0x070000
288#define ECG3_RRGAIN_256 0x080000
289#define ECG3_RRGAIN_512 0x090000
290#define ECG3_RRGAIN_1024 0x0A0000
291#define ECG3_RRGAIN_2048 0x0B0000
292#define ECG3_RRGAIN_4096 0x0C0000
293#define ECG3_RRGAIN_8192 0x0D0000
294#define ECG3_RRGAIN_16384 0x0E0000
295#define ECG3_RRGAIN_AUTO_SCALE 0x0F0000
296#define ECG3_RTOR_EN 0x008000
297#define ECG3_PAVG_2 0x000000
298#define ECG3_PAVG_4 0x001000
299#define ECG3_PAVG_8 0x002000
300#define ECG3_PAVG_16 0x003000
307#define ECG3_WRONG_ADDR 0x01
308#define ECG3_OK 0x00
309#define ECG3_INT_OCCURRED 0x01
310#define ECG3_INT_NOT_OCCURRED 0x00
311#define ECG3_DUMMY_BYTE 0x00
313 // End group macro
314// --------------------------------------------------------------- PUBLIC TYPES
323typedef struct
324{
325 // Output pins
326
327 digital_out_t cs;
328 digital_out_t clk;
329
330 // Input pins
331
332 digital_in_t int_pin;
333
334 // Modules
335
336 spi_master_t spi;
337 pin_name_t chip_select;
338
339} ecg3_t;
340
344typedef struct
345{
346 // Communication gpio pins
347
348 pin_name_t miso;
349 pin_name_t mosi;
350 pin_name_t sck;
351 pin_name_t cs;
352
353 // Additional gpio pins
354
355 pin_name_t clk;
356 pin_name_t int_pin;
357
358 // static variable
359
360 uint32_t spi_speed;
361 spi_master_mode_t spi_mode;
362 spi_master_chip_select_polarity_t cs_polarity;
363
364} ecg3_cfg_t;
365
366 // End types group
367// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
368
373#ifdef __cplusplus
374extern "C"{
375#endif
376
386
396
405
417void ecg3_generic_transfer ( ecg3_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len );
418
430uint8_t ecg3_write_reg ( ecg3_t *ctx, uint8_t reg_addr, uint32_t data_in );
431
443uint8_t ecg3_read_reg ( ecg3_t *ctx, uint8_t reg_addr, uint32_t *data_out );
444
455uint8_t ecg3_check_status ( ecg3_t *ctx, uint32_t bit_mask );
456
464void ecg3_sw_reset ( ecg3_t *ctx );
465
474
482void ecg3_sync ( ecg3_t *ctx );
483
492void ecg3_get_ecg ( ecg3_t *ctx, uint32_t *out_ecg );
493
504void ecg3_get_rtor ( ecg3_t *ctx, uint16_t *out_hr, uint16_t *out_rr );
505
506
507#ifdef __cplusplus
508}
509#endif
510#endif // _ECG3_H_
511
512 // End public_function group
514
515// ------------------------------------------------------------------------- END
#define ECG3_RETVAL
Definition ecg3.h:80
uint8_t ecg3_check_status(ecg3_t *ctx, uint32_t bit_mask)
Status Check function.
ECG3_RETVAL ecg3_init(ecg3_t *ctx, ecg3_cfg_t *cfg)
Initialization function.
void ecg3_fifo_reset(ecg3_t *ctx)
FIFO Reset function.
void ecg3_sync(ecg3_t *ctx)
Synchronization function.
uint8_t ecg3_read_reg(ecg3_t *ctx, uint8_t reg_addr, uint32_t *data_out)
Generic Read function.
void ecg3_get_rtor(ecg3_t *ctx, uint16_t *out_hr, uint16_t *out_rr)
RTOR Get function.
uint8_t ecg3_write_reg(ecg3_t *ctx, uint8_t reg_addr, uint32_t data_in)
Generic Write function.
void ecg3_sw_reset(ecg3_t *ctx)
SW Reset function.
void ecg3_generic_transfer(ecg3_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
void ecg3_default_cfg(ecg3_t *ctx)
Click Default Configuration function.
void ecg3_cfg_setup(ecg3_cfg_t *cfg)
Config Object Initialization function.
void ecg3_get_ecg(ecg3_t *ctx, uint32_t *out_ecg)
ECG Get function.
Click configuration structure definition.
Definition ecg3.h:345
pin_name_t clk
Definition ecg3.h:355
spi_master_chip_select_polarity_t cs_polarity
Definition ecg3.h:362
pin_name_t sck
Definition ecg3.h:350
spi_master_mode_t spi_mode
Definition ecg3.h:361
pin_name_t mosi
Definition ecg3.h:349
uint32_t spi_speed
Definition ecg3.h:360
pin_name_t int_pin
Definition ecg3.h:356
pin_name_t miso
Definition ecg3.h:348
pin_name_t cs
Definition ecg3.h:351
Click ctx object definition.
Definition ecg3.h:324
digital_out_t cs
Definition ecg3.h:327
spi_master_t spi
Definition ecg3.h:336
digital_in_t int_pin
Definition ecg3.h:332
digital_out_t clk
Definition ecg3.h:328
pin_name_t chip_select
Definition ecg3.h:337