Settings for registers of eFuse 2 Click driver.
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Settings for registers of eFuse 2 Click driver.
◆ EFUSE2_10_BIT
#define EFUSE2_10_BIT 0x03FF |
eFuse 2 data setting.
Specified data setting of eFuse 2 Click driver.
◆ EFUSE2_AD5175_50T_PROGRAM_DISABLED
#define EFUSE2_AD5175_50T_PROGRAM_DISABLED 0x00 |
◆ EFUSE2_AD5175_50T_PROGRAM_ENABLE
#define EFUSE2_AD5175_50T_PROGRAM_ENABLE 0x01 |
◆ EFUSE2_AD5175_COMMAND_NOP
#define EFUSE2_AD5175_COMMAND_NOP 0x00 |
eFuse 2 ADD5175 commands.
Specified ADD5175 commands for description of eFuse 2 Click driver.
◆ EFUSE2_AD5175_COMMAND_READ_50TP
#define EFUSE2_AD5175_COMMAND_READ_50TP 0x14 |
◆ EFUSE2_AD5175_COMMAND_READ_CONTROL
#define EFUSE2_AD5175_COMMAND_READ_CONTROL 0x20 |
◆ EFUSE2_AD5175_COMMAND_READ_MEMORY
#define EFUSE2_AD5175_COMMAND_READ_MEMORY 0x18 |
◆ EFUSE2_AD5175_COMMAND_READ_RDAC
#define EFUSE2_AD5175_COMMAND_READ_RDAC 0x08 |
◆ EFUSE2_AD5175_COMMAND_STORE_WIPER
#define EFUSE2_AD5175_COMMAND_STORE_WIPER 0x0C |
◆ EFUSE2_AD5175_COMMAND_SW_RESET
#define EFUSE2_AD5175_COMMAND_SW_RESET 0x10 |
◆ EFUSE2_AD5175_COMMAND_SW_SHUTDOWN
#define EFUSE2_AD5175_COMMAND_SW_SHUTDOWN 0x24 |
◆ EFUSE2_AD5175_COMMAND_WRITE_MEMORY
#define EFUSE2_AD5175_COMMAND_WRITE_MEMORY 0x1C |
◆ EFUSE2_AD5175_COMMAND_WRITE_RDAC
#define EFUSE2_AD5175_COMMAND_WRITE_RDAC 0x04 |
◆ EFUSE2_AD5175_CTRL_REG_BIT_MASK
#define EFUSE2_AD5175_CTRL_REG_BIT_MASK 0x0B |
eFuse 2 ADD5175 Bit masks.
Specified ADD5175 bit masks for description of eFuse 2 Click driver.
◆ EFUSE2_AD5175_FUSE_PROGRAM_SUCCESSFUL
#define EFUSE2_AD5175_FUSE_PROGRAM_SUCCESSFUL 0x00 |
◆ EFUSE2_AD5175_FUSE_PROGRAM_UNSUCCESSFUL
#define EFUSE2_AD5175_FUSE_PROGRAM_UNSUCCESSFUL 0x08 |
◆ EFUSE2_AD5175_NORMAL_MODE
#define EFUSE2_AD5175_NORMAL_MODE 0x00 |
◆ EFUSE2_AD5175_SHUTDOWN_BIT_MASK
#define EFUSE2_AD5175_SHUTDOWN_BIT_MASK 0x01 |
eFuse 2 description setting.
Specified setting for description of eFuse 2 Click driver.
◆ EFUSE2_AD5175_SHUTDOWN_MODE
#define EFUSE2_AD5175_SHUTDOWN_MODE 0x01 |
◆ EFUSE2_AD5175_UPDATE_WIPER_POS
#define EFUSE2_AD5175_UPDATE_WIPER_POS 0x02 |
◆ EFUSE2_AD5175_WIPER_POS_FROZEN
#define EFUSE2_AD5175_WIPER_POS_FROZEN 0x00 |
◆ EFUSE2_AD5241_NO_RESET
#define EFUSE2_AD5241_NO_RESET 0x00 |
◆ EFUSE2_AD5241_NO_SHUTDOWN
#define EFUSE2_AD5241_NO_SHUTDOWN 0x00 |
◆ EFUSE2_AD5241_O1_HIGH
#define EFUSE2_AD5241_O1_HIGH 0x10 |
◆ EFUSE2_AD5241_O1_LOW
#define EFUSE2_AD5241_O1_LOW 0x00 |
◆ EFUSE2_AD5241_O2_HIGH
#define EFUSE2_AD5241_O2_HIGH 0x08 |
◆ EFUSE2_AD5241_O2_LOW
#define EFUSE2_AD5241_O2_LOW 0x00 |
◆ EFUSE2_AD5241_RDAC0
#define EFUSE2_AD5241_RDAC0 0x00 |
◆ EFUSE2_AD5241_RDAC1
#define EFUSE2_AD5241_RDAC1 0x80 |
◆ EFUSE2_AD5241_RESET
#define EFUSE2_AD5241_RESET 0x40 |
◆ EFUSE2_AD5241_SHUTDOWN
#define EFUSE2_AD5241_SHUTDOWN 0x20 |
◆ EFUSE2_DUMMY
#define EFUSE2_DUMMY 0x0000 |
◆ EFUSE2_FAULT
#define EFUSE2_FAULT 0x00 |
eFuse 2 fault setting.
Specified fault setting of eFuse 2 Click driver.
◆ EFUSE2_I2C_SLAVE_ADDRESS_AD5175_GND
#define EFUSE2_I2C_SLAVE_ADDRESS_AD5175_GND 0x2F |
◆ EFUSE2_I2C_SLAVE_ADDRESS_AD5175_NC
#define EFUSE2_I2C_SLAVE_ADDRESS_AD5175_NC 0x2E |
◆ EFUSE2_I2C_SLAVE_ADDRESS_AD5175_VCC
#define EFUSE2_I2C_SLAVE_ADDRESS_AD5175_VCC 0x2C |
◆ EFUSE2_I2C_SLAVE_ADDRESS_AD5241_0
#define EFUSE2_I2C_SLAVE_ADDRESS_AD5241_0 0x2C |
eFuse 2 device address setting.
Specified setting for device slave address selection of eFuse 2 Click driver.
◆ EFUSE2_I2C_SLAVE_ADDRESS_AD5241_1
#define EFUSE2_I2C_SLAVE_ADDRESS_AD5241_1 0x2D |
◆ EFUSE2_I2C_SLAVE_ADDRESS_AD5241_2
#define EFUSE2_I2C_SLAVE_ADDRESS_AD5241_2 0x2E |
◆ EFUSE2_I2C_SLAVE_ADDRESS_AD5241_3
#define EFUSE2_I2C_SLAVE_ADDRESS_AD5241_3 0x2F |
◆ EFUSE2_NO_FAULT
#define EFUSE2_NO_FAULT 0x01 |