Settings for registers of H-Bridge 11 Click driver. More...

Macros
#define	HBRIDGE11_CMD_WRITE 0x80
	H-Bridge 11 command register setting.

#define	HBRIDGE11_CMD_ADDRESS_MASK 0x1E

#define	HBRIDGE11_CMD_8BIT_REG 0x01

#define	HBRIDGE11_STATUS_ONCH_ALL_OFF 0x00000000ul
	H-Bridge 11 status register setting.

#define	HBRIDGE11_STATUS_ONCH_ALL_ON 0xFF000000ul

#define	HBRIDGE11_STATUS_ONCH_MASK 0xFF000000ul

#define	HBRIDGE11_STATUS_M_OVT 0x00800000ul

#define	HBRIDGE11_STATUS_M_OCP 0x00400000ul

#define	HBRIDGE11_STATUS_M_OLF 0x00200000ul

#define	HBRIDGE11_STATUS_M_HHF 0x00100000ul

#define	HBRIDGE11_STATUS_M_DPM 0x00080000ul

#define	HBRIDGE11_STATUS_M_COMF 0x00040000ul

#define	HBRIDGE11_STATUS_M_UVM 0x00020000ul

#define	HBRIDGE11_STATUS_FREQM_100KHZ 0x00000000ul

#define	HBRIDGE11_STATUS_FREQM_80KHZ 0x00010000ul

#define	HBRIDGE11_STATUS_FREQM_MASK 0x00010000ul

#define	HBRIDGE11_STATUS_CM76_INDEPEND 0x00000000ul

#define	HBRIDGE11_STATUS_CM76_PARALLEL 0x00004000ul

#define	HBRIDGE11_STATUS_CM76_HBRIDGE 0x00008000ul

#define	HBRIDGE11_STATUS_CM76_MASK 0x0000C000ul

#define	HBRIDGE11_STATUS_CM54_INDEPEND 0x00000000ul

#define	HBRIDGE11_STATUS_CM54_PARALLEL 0x00001000ul

#define	HBRIDGE11_STATUS_CM54_HBRIDGE 0x00002000ul

#define	HBRIDGE11_STATUS_CM54_MASK 0x00003000ul

#define	HBRIDGE11_STATUS_CM32_INDEPEND 0x00000000ul

#define	HBRIDGE11_STATUS_CM32_PARALLEL 0x00000400ul

#define	HBRIDGE11_STATUS_CM32_HBRIDGE 0x00000800ul

#define	HBRIDGE11_STATUS_CM32_MASK 0x00000C00ul

#define	HBRIDGE11_STATUS_CM10_INDEPEND 0x00000000ul

#define	HBRIDGE11_STATUS_CM10_PARALLEL 0x00000100ul

#define	HBRIDGE11_STATUS_CM10_HBRIDGE 0x00000200ul

#define	HBRIDGE11_STATUS_CM10_MASK 0x00000300ul

#define	HBRIDGE11_STATUS_OVT 0x00000080ul

#define	HBRIDGE11_STATUS_OCP 0x00000040ul

#define	HBRIDGE11_STATUS_OLF 0x00000020ul

#define	HBRIDGE11_STATUS_HHF 0x00000010ul

#define	HBRIDGE11_STATUS_DPM 0x00000008ul

#define	HBRIDGE11_STATUS_COMF 0x00000004ul

#define	HBRIDGE11_STATUS_UVM 0x00000002ul

#define	HBRIDGE11_STATUS_ACTIVE 0x00000001ul

#define	HBRIDGE11_CFG_CH_HFS_FULL_SCALE 0x00000000ul
	H-Bridge 11 cfg_ch setting.

#define	HBRIDGE11_CFG_CH_HFS_HALF_SCALE 0x80000000ul

#define	HBRIDGE11_CFG_CH_HFS_MASK 0x80000000ul

#define	HBRIDGE11_CFG_CH_HOLD_HS_OFF_LS_ON 0x00000000ul

#define	HBRIDGE11_CFG_CH_HOLD_DUTY_MIN 0x01000000ul

#define	HBRIDGE11_CFG_CH_HOLD_DUTY_MAX 0x7E000000ul

#define	HBRIDGE11_CFG_CH_HOLD_HS_ON_LS_OFF 0x7F000000ul

#define	HBRIDGE11_CFG_CH_HOLD_MASK 0x7F000000ul

#define	HBRIDGE11_CFG_CH_TRGNSPI_ONCH 0x00000000ul

#define	HBRIDGE11_CFG_CH_TRGNSPI_TRIG 0x00800000ul

#define	HBRIDGE11_CFG_CH_TRGNSPI_MASK 0x00800000ul

#define	HBRIDGE11_CFG_CH_HIT_HS_OFF_LS_ON 0x00000000ul

#define	HBRIDGE11_CFG_CH_HIT_DUTY_MIN 0x00010000ul

#define	HBRIDGE11_CFG_CH_HIT_DUTY_MAX 0x007E0000ul

#define	HBRIDGE11_CFG_CH_HIT_HS_ON_LS_OFF 0x007F0000ul

#define	HBRIDGE11_CFG_CH_HIT_MASK 0x007F0000ul

#define	HBRIDGE11_CFG_CH_HIT_T_MASK 0x0000FF00ul

#define	HBRIDGE11_CFG_CH_VDRNCDR_CDR 0x00000000ul

#define	HBRIDGE11_CFG_CH_VDRNCDR_VDR 0x00000080ul

#define	HBRIDGE11_CFG_CH_VDRNCDR_MASK 0x00000080ul

#define	HBRIDGE11_CFG_CH_HSNLS_LS 0x00000000ul

#define	HBRIDGE11_CFG_CH_HSNLS_HS 0x00000040ul

#define	HBRIDGE11_CFG_CH_HSNLS_MASK 0x00000040ul

#define	HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_4 0x00000000ul

#define	HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_3 0x00000010ul

#define	HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_2 0x00000020ul

#define	HBRIDGE11_CFG_CH_FREQ_CFG_MAIN 0x00000030ul

#define	HBRIDGE11_CFG_CH_FREQ_CFG_MASK 0x00000030ul

#define	HBRIDGE11_CFG_CH_SRC_MASK 0x00000008ul

#define	HBRIDGE11_CFG_CH_OL_EN_MASK 0x00000004ul

#define	HBRIDGE11_CFG_CH_DPM_EN_MASK 0x00000002ul

#define	HBRIDGE11_CFG_CH_HHF_EN_MASK 0x00000001ul

#define	HBRIDGE11_FAULT_OCP_MASK 0xFF000000ul
	H-Bridge 11 fault setting.

#define	HBRIDGE11_FAULT_HHF_MASK 0x00FF0000ul

#define	HBRIDGE11_FAULT_OLF_MASK 0x0000FF00ul

#define	HBRIDGE11_FAULT_DPM_MASK 0x000000FFul

#define	HBRIDGE11_CFG_DPM_ISTART_MASK 0x00007F00ul
	H-Bridge 11 cfg_dpm setting.

#define	HBRIDGE11_CFG_DPM_TDEB_MASK 0x000000F0ul

#define	HBRIDGE11_CFG_DPM_IPTH_MASK 0x0000000Ful

#define	HBRIDGE11_MOTOR_SEL_0 0
	H-Bridge 11 motor selection setting.

#define	HBRIDGE11_MOTOR_SEL_1 1

#define	HBRIDGE11_MOTOR_SEL_2 2

#define	HBRIDGE11_MOTOR_SEL_3 3

#define	HBRIDGE11_MOTOR_STATE_HI_Z 0
	H-Bridge 11 motor state setting.

#define	HBRIDGE11_MOTOR_STATE_FORWARD 1

#define	HBRIDGE11_MOTOR_STATE_REVERSE 2

#define	HBRIDGE11_MOTOR_STATE_BRAKE 3

#define	HBRIDGE11_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
	Data sample selection.

#define	HBRIDGE11_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE

Detailed Description

Settings for registers of H-Bridge 11 Click driver.

Macro Definition Documentation

◆ HBRIDGE11_CFG_CH_DPM_EN_MASK

#define HBRIDGE11_CFG_CH_DPM_EN_MASK 0x00000002ul

◆ HBRIDGE11_CFG_CH_FREQ_CFG_MAIN

#define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN 0x00000030ul

◆ HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_2

#define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_2 0x00000020ul

◆ HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_3

#define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_3 0x00000010ul

◆ HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_4

#define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_4 0x00000000ul

◆ HBRIDGE11_CFG_CH_FREQ_CFG_MASK

#define HBRIDGE11_CFG_CH_FREQ_CFG_MASK 0x00000030ul

◆ HBRIDGE11_CFG_CH_HFS_FULL_SCALE

#define HBRIDGE11_CFG_CH_HFS_FULL_SCALE 0x00000000ul

H-Bridge 11 cfg_ch setting.

Specified setting for cfg_ch register of H-Bridge 11 Click driver.

◆ HBRIDGE11_CFG_CH_HFS_HALF_SCALE

#define HBRIDGE11_CFG_CH_HFS_HALF_SCALE 0x80000000ul

◆ HBRIDGE11_CFG_CH_HFS_MASK

#define HBRIDGE11_CFG_CH_HFS_MASK 0x80000000ul

◆ HBRIDGE11_CFG_CH_HHF_EN_MASK

#define HBRIDGE11_CFG_CH_HHF_EN_MASK 0x00000001ul

◆ HBRIDGE11_CFG_CH_HIT_DUTY_MAX

#define HBRIDGE11_CFG_CH_HIT_DUTY_MAX 0x007E0000ul

◆ HBRIDGE11_CFG_CH_HIT_DUTY_MIN

#define HBRIDGE11_CFG_CH_HIT_DUTY_MIN 0x00010000ul

◆ HBRIDGE11_CFG_CH_HIT_HS_OFF_LS_ON

#define HBRIDGE11_CFG_CH_HIT_HS_OFF_LS_ON 0x00000000ul

◆ HBRIDGE11_CFG_CH_HIT_HS_ON_LS_OFF

#define HBRIDGE11_CFG_CH_HIT_HS_ON_LS_OFF 0x007F0000ul

◆ HBRIDGE11_CFG_CH_HIT_MASK

#define HBRIDGE11_CFG_CH_HIT_MASK 0x007F0000ul

◆ HBRIDGE11_CFG_CH_HIT_T_MASK

#define HBRIDGE11_CFG_CH_HIT_T_MASK 0x0000FF00ul

◆ HBRIDGE11_CFG_CH_HOLD_DUTY_MAX

#define HBRIDGE11_CFG_CH_HOLD_DUTY_MAX 0x7E000000ul

◆ HBRIDGE11_CFG_CH_HOLD_DUTY_MIN

#define HBRIDGE11_CFG_CH_HOLD_DUTY_MIN 0x01000000ul

◆ HBRIDGE11_CFG_CH_HOLD_HS_OFF_LS_ON

#define HBRIDGE11_CFG_CH_HOLD_HS_OFF_LS_ON 0x00000000ul

◆ HBRIDGE11_CFG_CH_HOLD_HS_ON_LS_OFF

#define HBRIDGE11_CFG_CH_HOLD_HS_ON_LS_OFF 0x7F000000ul

◆ HBRIDGE11_CFG_CH_HOLD_MASK

#define HBRIDGE11_CFG_CH_HOLD_MASK 0x7F000000ul

◆ HBRIDGE11_CFG_CH_HSNLS_HS

#define HBRIDGE11_CFG_CH_HSNLS_HS 0x00000040ul

◆ HBRIDGE11_CFG_CH_HSNLS_LS

#define HBRIDGE11_CFG_CH_HSNLS_LS 0x00000000ul

◆ HBRIDGE11_CFG_CH_HSNLS_MASK

#define HBRIDGE11_CFG_CH_HSNLS_MASK 0x00000040ul

◆ HBRIDGE11_CFG_CH_OL_EN_MASK

#define HBRIDGE11_CFG_CH_OL_EN_MASK 0x00000004ul

◆ HBRIDGE11_CFG_CH_SRC_MASK

#define HBRIDGE11_CFG_CH_SRC_MASK 0x00000008ul

◆ HBRIDGE11_CFG_CH_TRGNSPI_MASK

#define HBRIDGE11_CFG_CH_TRGNSPI_MASK 0x00800000ul

◆ HBRIDGE11_CFG_CH_TRGNSPI_ONCH

#define HBRIDGE11_CFG_CH_TRGNSPI_ONCH 0x00000000ul

◆ HBRIDGE11_CFG_CH_TRGNSPI_TRIG

#define HBRIDGE11_CFG_CH_TRGNSPI_TRIG 0x00800000ul

◆ HBRIDGE11_CFG_CH_VDRNCDR_CDR

#define HBRIDGE11_CFG_CH_VDRNCDR_CDR 0x00000000ul

◆ HBRIDGE11_CFG_CH_VDRNCDR_MASK

#define HBRIDGE11_CFG_CH_VDRNCDR_MASK 0x00000080ul

◆ HBRIDGE11_CFG_CH_VDRNCDR_VDR

#define HBRIDGE11_CFG_CH_VDRNCDR_VDR 0x00000080ul

◆ HBRIDGE11_CFG_DPM_IPTH_MASK

#define HBRIDGE11_CFG_DPM_IPTH_MASK 0x0000000Ful

◆ HBRIDGE11_CFG_DPM_ISTART_MASK

#define HBRIDGE11_CFG_DPM_ISTART_MASK 0x00007F00ul

H-Bridge 11 cfg_dpm setting.

Specified setting for cfg_dpm register of H-Bridge 11 Click driver.

◆ HBRIDGE11_CFG_DPM_TDEB_MASK

#define HBRIDGE11_CFG_DPM_TDEB_MASK 0x000000F0ul

◆ HBRIDGE11_CMD_8BIT_REG

#define HBRIDGE11_CMD_8BIT_REG 0x01

◆ HBRIDGE11_CMD_ADDRESS_MASK

#define HBRIDGE11_CMD_ADDRESS_MASK 0x1E

◆ HBRIDGE11_CMD_WRITE

#define HBRIDGE11_CMD_WRITE 0x80

H-Bridge 11 command register setting.

Specified setting for command register of H-Bridge 11 Click driver.

◆ HBRIDGE11_FAULT_DPM_MASK

#define HBRIDGE11_FAULT_DPM_MASK 0x000000FFul

◆ HBRIDGE11_FAULT_HHF_MASK

#define HBRIDGE11_FAULT_HHF_MASK 0x00FF0000ul

◆ HBRIDGE11_FAULT_OCP_MASK

#define HBRIDGE11_FAULT_OCP_MASK 0xFF000000ul

H-Bridge 11 fault setting.

Specified setting for fault register of H-Bridge 11 Click driver.

◆ HBRIDGE11_FAULT_OLF_MASK

#define HBRIDGE11_FAULT_OLF_MASK 0x0000FF00ul

◆ HBRIDGE11_MOTOR_SEL_0

#define HBRIDGE11_MOTOR_SEL_0 0

H-Bridge 11 motor selection setting.

Specified setting for motor selection of H-Bridge 11 Click driver.

◆ HBRIDGE11_MOTOR_SEL_1

#define HBRIDGE11_MOTOR_SEL_1 1

◆ HBRIDGE11_MOTOR_SEL_2

#define HBRIDGE11_MOTOR_SEL_2 2

◆ HBRIDGE11_MOTOR_SEL_3

#define HBRIDGE11_MOTOR_SEL_3 3

◆ HBRIDGE11_MOTOR_STATE_BRAKE

#define HBRIDGE11_MOTOR_STATE_BRAKE 3

◆ HBRIDGE11_MOTOR_STATE_FORWARD

#define HBRIDGE11_MOTOR_STATE_FORWARD 1

◆ HBRIDGE11_MOTOR_STATE_HI_Z

#define HBRIDGE11_MOTOR_STATE_HI_Z 0

H-Bridge 11 motor state setting.

Specified setting for motor state of H-Bridge 11 Click driver.

◆ HBRIDGE11_MOTOR_STATE_REVERSE

#define HBRIDGE11_MOTOR_STATE_REVERSE 2

◆ HBRIDGE11_SET_DATA_SAMPLE_EDGE

#define HBRIDGE11_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note: Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with hbridge11_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

◆ HBRIDGE11_SET_DATA_SAMPLE_MIDDLE

#define HBRIDGE11_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE

◆ HBRIDGE11_STATUS_ACTIVE

#define HBRIDGE11_STATUS_ACTIVE 0x00000001ul

◆ HBRIDGE11_STATUS_CM10_HBRIDGE

#define HBRIDGE11_STATUS_CM10_HBRIDGE 0x00000200ul

◆ HBRIDGE11_STATUS_CM10_INDEPEND

#define HBRIDGE11_STATUS_CM10_INDEPEND 0x00000000ul

◆ HBRIDGE11_STATUS_CM10_MASK

#define HBRIDGE11_STATUS_CM10_MASK 0x00000300ul

◆ HBRIDGE11_STATUS_CM10_PARALLEL

#define HBRIDGE11_STATUS_CM10_PARALLEL 0x00000100ul

◆ HBRIDGE11_STATUS_CM32_HBRIDGE

#define HBRIDGE11_STATUS_CM32_HBRIDGE 0x00000800ul

◆ HBRIDGE11_STATUS_CM32_INDEPEND

#define HBRIDGE11_STATUS_CM32_INDEPEND 0x00000000ul

◆ HBRIDGE11_STATUS_CM32_MASK

#define HBRIDGE11_STATUS_CM32_MASK 0x00000C00ul

◆ HBRIDGE11_STATUS_CM32_PARALLEL

#define HBRIDGE11_STATUS_CM32_PARALLEL 0x00000400ul

◆ HBRIDGE11_STATUS_CM54_HBRIDGE

#define HBRIDGE11_STATUS_CM54_HBRIDGE 0x00002000ul

◆ HBRIDGE11_STATUS_CM54_INDEPEND

#define HBRIDGE11_STATUS_CM54_INDEPEND 0x00000000ul

◆ HBRIDGE11_STATUS_CM54_MASK

#define HBRIDGE11_STATUS_CM54_MASK 0x00003000ul

◆ HBRIDGE11_STATUS_CM54_PARALLEL

#define HBRIDGE11_STATUS_CM54_PARALLEL 0x00001000ul

◆ HBRIDGE11_STATUS_CM76_HBRIDGE

#define HBRIDGE11_STATUS_CM76_HBRIDGE 0x00008000ul

◆ HBRIDGE11_STATUS_CM76_INDEPEND

#define HBRIDGE11_STATUS_CM76_INDEPEND 0x00000000ul

◆ HBRIDGE11_STATUS_CM76_MASK

#define HBRIDGE11_STATUS_CM76_MASK 0x0000C000ul

◆ HBRIDGE11_STATUS_CM76_PARALLEL

#define HBRIDGE11_STATUS_CM76_PARALLEL 0x00004000ul

◆ HBRIDGE11_STATUS_COMF

#define HBRIDGE11_STATUS_COMF 0x00000004ul

◆ HBRIDGE11_STATUS_DPM

#define HBRIDGE11_STATUS_DPM 0x00000008ul

◆ HBRIDGE11_STATUS_FREQM_100KHZ

#define HBRIDGE11_STATUS_FREQM_100KHZ 0x00000000ul

◆ HBRIDGE11_STATUS_FREQM_80KHZ

#define HBRIDGE11_STATUS_FREQM_80KHZ 0x00010000ul

◆ HBRIDGE11_STATUS_FREQM_MASK

#define HBRIDGE11_STATUS_FREQM_MASK 0x00010000ul

◆ HBRIDGE11_STATUS_HHF

#define HBRIDGE11_STATUS_HHF 0x00000010ul

◆ HBRIDGE11_STATUS_M_COMF

#define HBRIDGE11_STATUS_M_COMF 0x00040000ul

◆ HBRIDGE11_STATUS_M_DPM

#define HBRIDGE11_STATUS_M_DPM 0x00080000ul

◆ HBRIDGE11_STATUS_M_HHF

#define HBRIDGE11_STATUS_M_HHF 0x00100000ul

◆ HBRIDGE11_STATUS_M_OCP

#define HBRIDGE11_STATUS_M_OCP 0x00400000ul

◆ HBRIDGE11_STATUS_M_OLF

#define HBRIDGE11_STATUS_M_OLF 0x00200000ul

◆ HBRIDGE11_STATUS_M_OVT

#define HBRIDGE11_STATUS_M_OVT 0x00800000ul

◆ HBRIDGE11_STATUS_M_UVM

#define HBRIDGE11_STATUS_M_UVM 0x00020000ul

◆ HBRIDGE11_STATUS_OCP

#define HBRIDGE11_STATUS_OCP 0x00000040ul

◆ HBRIDGE11_STATUS_OLF

#define HBRIDGE11_STATUS_OLF 0x00000020ul

◆ HBRIDGE11_STATUS_ONCH_ALL_OFF

#define HBRIDGE11_STATUS_ONCH_ALL_OFF 0x00000000ul

H-Bridge 11 status register setting.

Specified setting for status register of H-Bridge 11 Click driver.

◆ HBRIDGE11_STATUS_ONCH_ALL_ON

#define HBRIDGE11_STATUS_ONCH_ALL_ON 0xFF000000ul

◆ HBRIDGE11_STATUS_ONCH_MASK

#define HBRIDGE11_STATUS_ONCH_MASK 0xFF000000ul

◆ HBRIDGE11_STATUS_OVT

#define HBRIDGE11_STATUS_OVT 0x00000080ul

◆ HBRIDGE11_STATUS_UVM

#define HBRIDGE11_STATUS_UVM 0x00000002ul

Macros