hbridge9 2.0.0.0
Data Structures | Macros | Enumerations | Functions
hbridge9.h File Reference

This file contains API for H-Bridge 9 Click Driver. More...

#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"

Go to the source code of this file.

Data Structures

struct  hbridge9_t
 H-Bridge 9 Click context object. More...
 
struct  hbridge9_cfg_t
 H-Bridge 9 Click configuration object. More...
 

Macros

#define HBRIDGE9_OPCODE_WRITE   0x00
 H-Bridge 9 operating codes.
 
#define HBRIDGE9_OPCODE_READ   0x40
 
#define HBRIDGE9_OPCODE_READ_CLEAR   0x80
 
#define HBRIDGE9_OPCODE_READ_DEV_INFO   0xC0
 
#define HBRIDGE9_ADV_OPCODE_SET_DEFAULT   0xFF
 
#define HBRIDGE9_ADV_OPCODE_CLEAR_STATUS   0xBF
 
#define HBRIDGE9_OPCODE_BITS_MASK   0xC0
 
#define HBRIDGE9_REG_CR0   0x00
 H-Bridge 9 control register addresses.
 
#define HBRIDGE9_REG_CR1   0x01
 
#define HBRIDGE9_REG_CR2   0x02
 
#define HBRIDGE9_REG_CR3   0x03
 
#define HBRIDGE9_REG_CR4   0x04
 
#define HBRIDGE9_REG_CR5   0x05
 
#define HBRIDGE9_REG_CR6   0x06
 
#define HBRIDGE9_REG_CR7   0x07
 
#define HBRIDGE9_REG_CR8   0x08
 
#define HBRIDGE9_REG_SR0   0x10
 H-Bridge 9 status register addresses.
 
#define HBRIDGE9_REG_SR1   0x11
 
#define HBRIDGE9_REG_SR2   0x12
 
#define HBRIDGE9_REG_SR3   0x13
 
#define HBRIDGE9_REG_SR4   0x14
 
#define HBRIDGE9_REG_SR5   0x15
 
#define HBRIDGE9_REG_SR6   0x16
 
#define HBRIDGE9_REG_SR7   0x17
 
#define HBRIDGE9_REG_SR8   0x18
 
#define HBRIDGE9_REG_INFO_COMPANY_CODE   0x00
 H-Bridge 9 info register addresses.
 
#define HBRIDGE9_REG_INFO_DEVICE_FAMILY   0x01
 
#define HBRIDGE9_REG_INFO_DEVICE_NO_1   0x02
 
#define HBRIDGE9_REG_INFO_DEVICE_NO_2   0x03
 
#define HBRIDGE9_REG_INFO_DEVICE_NO_3   0x04
 
#define HBRIDGE9_REG_INFO_DEVICE_NO_4   0x05
 
#define HBRIDGE9_REG_INFO_SILICON_VER   0x0A
 
#define HBRIDGE9_REG_INFO_SPI_MODE   0x10
 
#define HBRIDGE9_REG_INFO_SPI_CPHA_TEST   0x20
 
#define HBRIDGE9_SPI_CPHA_TEST   0x55
 H-Bridge 9 SPI CPHA test bits.
 
#define HBRIDGE9_ODD_PARITY   0x01
 H-Bridge 9 ODD parity flag.
 
#define HBRIDGE9_CR0_PWM_FREQ_10p240   0x0000
 H-Bridge 9 Control register 0 bits.
 
#define HBRIDGE9_CR0_PWM_FREQ_12p288   0x2000
 
#define HBRIDGE9_CR0_PWM_FREQ_14p336   0x4000
 
#define HBRIDGE9_CR0_PWM_FREQ_16p384   0x6000
 
#define HBRIDGE9_CR0_PWM_FREQ_18p432   0x8000
 
#define HBRIDGE9_CR0_PWM_FREQ_20p480   0xA000
 
#define HBRIDGE9_CR0_PWM_FREQ_22p528   0xC000
 
#define HBRIDGE9_CR0_PWM_FREQ_24p576   0xE000
 
#define HBRIDGE9_CR0_PWM_FREQ_MASK   0xE000
 
#define HBRIDGE9_CR0_OUT6_POL_HIGH   0x1000
 
#define HBRIDGE9_CR0_OUT6_POL_LOW   0x0040
 
#define HBRIDGE9_CR0_OUT6_POL_MASK   0x1040
 
#define HBRIDGE9_CR0_OUT5_POL_HIGH   0x0800
 
#define HBRIDGE9_CR0_OUT5_POL_LOW   0x0020
 
#define HBRIDGE9_CR0_OUT5_POL_MASK   0x0820
 
#define HBRIDGE9_CR0_OUT4_POL_HIGH   0x0400
 
#define HBRIDGE9_CR0_OUT4_POL_LOW   0x0010
 
#define HBRIDGE9_CR0_OUT4_POL_MASK   0x0410
 
#define HBRIDGE9_CR0_OUT3_POL_HIGH   0x0200
 
#define HBRIDGE9_CR0_OUT3_POL_LOW   0x0008
 
#define HBRIDGE9_CR0_OUT3_POL_MASK   0x0208
 
#define HBRIDGE9_CR0_OUT2_POL_HIGH   0x0100
 
#define HBRIDGE9_CR0_OUT2_POL_LOW   0x0004
 
#define HBRIDGE9_CR0_OUT2_POL_MASK   0x0104
 
#define HBRIDGE9_CR0_OUT1_POL_HIGH   0x0080
 
#define HBRIDGE9_CR0_OUT1_POL_LOW   0x0002
 
#define HBRIDGE9_CR0_OUT1_POL_MASK   0x0082
 
#define HBRIDGE9_CR1_EX_OUT2_ON   0x8000
 H-Bridge 9 Control register 1 bits.
 
#define HBRIDGE9_CR1_EX_OUT1_ON   0x4000
 
#define HBRIDGE9_CR1_EX_OUT_MASK   0xC000
 
#define HBRIDGE9_CR1_OUT6_ON   0x2000
 
#define HBRIDGE9_CR1_OUT5_ON   0x1000
 
#define HBRIDGE9_CR1_OUT4_ON   0x0800
 
#define HBRIDGE9_CR1_OUT3_ON   0x0400
 
#define HBRIDGE9_CR1_OUT2_ON   0x0200
 
#define HBRIDGE9_CR1_OUT1_ON   0x0100
 
#define HBRIDGE9_CR1_OUT_MASK   0x3F00
 
#define HBRIDGE9_CR1_EMCY_NORMAL_MODE   0x0000
 
#define HBRIDGE9_CR1_EMCY_EMERGENCY_MODE   0x0080
 
#define HBRIDGE9_CR1_EMCY_MASK   0x00C0
 
#define HBRIDGE9_CR1_EX_OUT2_POL_HIGH   0x0020
 
#define HBRIDGE9_CR1_EX_OUT2_POL_LOW   0x0008
 
#define HBRIDGE9_CR1_EX_OUT2_POL_MASK   0x0028
 
#define HBRIDGE9_CR1_EX_OUT1_POL_HIGH   0x0010
 
#define HBRIDGE9_CR1_EX_OUT1_POL_LOW   0x0004
 
#define HBRIDGE9_CR1_EX_OUT1_POL_MASK   0x0014
 
#define HBRIDGE9_CR1_OUT_ON   0x0002
 
#define HBRIDGE9_CR2_DBN_EX2   0x8000
 H-Bridge 9 Control register 2 bits.
 
#define HBRIDGE9_CR2_DBN_EX1   0x4000
 
#define HBRIDGE9_CR2_DBN_EX_MASK   0xC000
 
#define HBRIDGE9_CR2_DBN_6   0x2000
 
#define HBRIDGE9_CR2_DBN_5   0x1000
 
#define HBRIDGE9_CR2_DBN_4   0x0800
 
#define HBRIDGE9_CR2_DBN_3   0x0400
 
#define HBRIDGE9_CR2_DBN_2   0x0200
 
#define HBRIDGE9_CR2_DBN_1   0x0100
 
#define HBRIDGE9_CR2_DBN_MASK   0x3F00
 
#define HBRIDGE9_CR2_ON_TIME_DUR_100MS   0x0000
 
#define HBRIDGE9_CR2_ON_TIME_DUR_120MS   0x0008
 
#define HBRIDGE9_CR2_ON_TIME_DUR_140MS   0x0010
 
#define HBRIDGE9_CR2_ON_TIME_DUR_160MS   0x0018
 
#define HBRIDGE9_CR2_ON_TIME_DUR_180MS   0x0020
 
#define HBRIDGE9_CR2_ON_TIME_DUR_200MS   0x0028
 
#define HBRIDGE9_CR2_ON_TIME_DUR_220MS   0x0030
 
#define HBRIDGE9_CR2_ON_TIME_DUR_240MS   0x0038
 
#define HBRIDGE9_CR2_ON_TIME_DUR_260MS   0x0040
 
#define HBRIDGE9_CR2_ON_TIME_DUR_280MS   0x0048
 
#define HBRIDGE9_CR2_ON_TIME_DUR_300MS   0x0050
 
#define HBRIDGE9_CR2_ON_TIME_DUR_320MS   0x0058
 
#define HBRIDGE9_CR2_ON_TIME_DUR_340MS   0x0060
 
#define HBRIDGE9_CR2_ON_TIME_DUR_360MS   0x0068
 
#define HBRIDGE9_CR2_ON_TIME_DUR_380MS   0x0070
 
#define HBRIDGE9_CR2_ON_TIME_DUR_400MS   0x0078
 
#define HBRIDGE9_CR2_ON_TIME_DUR_440MS   0x0080
 
#define HBRIDGE9_CR2_ON_TIME_DUR_480MS   0x0088
 
#define HBRIDGE9_CR2_ON_TIME_DUR_520MS   0x0090
 
#define HBRIDGE9_CR2_ON_TIME_DUR_560MS   0x0098
 
#define HBRIDGE9_CR2_ON_TIME_DUR_600MS   0x00A0
 
#define HBRIDGE9_CR2_ON_TIME_DUR_640MS   0x00A8
 
#define HBRIDGE9_CR2_ON_TIME_DUR_680MS   0x00B0
 
#define HBRIDGE9_CR2_ON_TIME_DUR_720MS   0x00B8
 
#define HBRIDGE9_CR2_ON_TIME_DUR_760MS   0x00C0
 
#define HBRIDGE9_CR2_ON_TIME_DUR_800MS   0x00C8
 
#define HBRIDGE9_CR2_ON_TIME_DUR_840MS   0x00D0
 
#define HBRIDGE9_CR2_ON_TIME_DUR_880MS   0x00D8
 
#define HBRIDGE9_CR2_ON_TIME_DUR_920MS   0x00E0
 
#define HBRIDGE9_CR2_ON_TIME_DUR_960MS   0x00E8
 
#define HBRIDGE9_CR2_ON_TIME_DUR_1000MS   0x00F0
 
#define HBRIDGE9_CR2_ON_TIME_DUR_1040MS   0x00F8
 
#define HBRIDGE9_CR2_ON_TIME_DUR_MASK   0x00F8
 
#define HBRIDGE9_CR2_BRAKING_DUR_0MS   0x0000
 
#define HBRIDGE9_CR2_BRAKING_DUR_100MS   0x0002
 
#define HBRIDGE9_CR2_BRAKING_DUR_200MS   0x0004
 
#define HBRIDGE9_CR2_BRAKING_DUR_100MS_IND   0x0006
 
#define HBRIDGE9_CR2_BRAKING_DUR_MASK   0x0006
 
#define HBRIDGE9_CR3_GFI   0x0080
 H-Bridge 9 Control register 3 bits.
 
#define HBRIDGE9_CR3_TSD_ACT   0x0040
 
#define HBRIDGE9_CR3_DITHN   0x0020
 
#define HBRIDGE9_CR3_NO_GROUP   0x0000
 
#define HBRIDGE9_CR3_GROUP_1_2   0x0002
 
#define HBRIDGE9_CR3_GROUP_1_3   0x0004
 
#define HBRIDGE9_CR3_GROUP_1_2_3   0x0006
 
#define HBRIDGE9_CR3_GROUP_4_5   0x0008
 
#define HBRIDGE9_CR3_GROUP_4_6   0x0010
 
#define HBRIDGE9_CR3_GROUP_4_5_6   0x0018
 
#define HBRIDGE9_CR3_GROUP_MASK   0x001E
 
#define HBRIDGE9_CR4_OCP1_SHIFT_BITS   0x0001
 H-Bridge 9 Control register 4 and 5 bits.
 
#define HBRIDGE9_CR4_OCP2_SHIFT_BITS   0x0006
 
#define HBRIDGE9_CR4_OCP3_SHIFT_BITS   0x000B
 
#define HBRIDGE9_CR5_OCP4_SHIFT_BITS   0x0001
 
#define HBRIDGE9_CR5_OCP5_SHIFT_BITS   0x0006
 
#define HBRIDGE9_CR5_OCP6_SHIFT_BITS   0x000B
 
#define HBRIDGE9_DUTY_CYCLE_6p25   0x0000
 
#define HBRIDGE9_DUTY_CYCLE_12p5   0x0001
 
#define HBRIDGE9_DUTY_CYCLE_18p75   0x0002
 
#define HBRIDGE9_DUTY_CYCLE_25   0x0003
 
#define HBRIDGE9_DUTY_CYCLE_31p25   0x0004
 
#define HBRIDGE9_DUTY_CYCLE_37p5   0x0005
 
#define HBRIDGE9_DUTY_CYCLE_43p75   0x0006
 
#define HBRIDGE9_DUTY_CYCLE_50   0x0007
 
#define HBRIDGE9_DUTY_CYCLE_56p25   0x0008
 
#define HBRIDGE9_DUTY_CYCLE_62p5   0x0009
 
#define HBRIDGE9_DUTY_CYCLE_68p75   0x000A
 
#define HBRIDGE9_DUTY_CYCLE_75   0x000B
 
#define HBRIDGE9_DUTY_CYCLE_81p25   0x000C
 
#define HBRIDGE9_DUTY_CYCLE_87p5   0x000D
 
#define HBRIDGE9_DUTY_CYCLE_93p75   0x000E
 
#define HBRIDGE9_DUTY_CYCLE_100   0x000F
 
#define HBRIDGE9_DUTY_CYCLE_MASK   0x001F
 
#define HBRIDGE9_CURRENT_1A   0x0010
 
#define HBRIDGE9_CURRENT_1p2A   0x0011
 
#define HBRIDGE9_CURRENT_1p4A   0x0012
 
#define HBRIDGE9_CURRENT_1p6A   0x0013
 
#define HBRIDGE9_CURRENT_1p8A   0x0014
 
#define HBRIDGE9_CURRENT_2A   0x0015
 
#define HBRIDGE9_CURRENT_2p2A   0x0016
 
#define HBRIDGE9_CURRENT_2p4A   0x0017
 
#define HBRIDGE9_CURRENT_2p6A   0x0018
 
#define HBRIDGE9_CURRENT_2p8A   0x0019
 
#define HBRIDGE9_CURRENT_3A   0x001A
 
#define HBRIDGE9_CURRENT_3p2A   0x001B
 
#define HBRIDGE9_CURRENT_3p4A   0x001C
 
#define HBRIDGE9_CURRENT_3p6A   0x001D
 
#define HBRIDGE9_CURRENT_3p8A   0x001E
 
#define HBRIDGE9_CURRENT_4A   0x001F
 
#define HBRIDGE9_CURRENT_MASK   0x001F
 
#define HBRIDGE9_CR6_HBDCL2   0x8000
 H-Bridge 9 Control register 6 bits.
 
#define HBRIDGE9_CR6_HBDCH2   0x4000
 
#define HBRIDGE9_CR6_HBDC2_MASK   0xC000
 
#define HBRIDGE9_CR6_STBY1   0x2000
 
#define HBRIDGE9_CR6_EXT2_VDT_1US   0x0000
 
#define HBRIDGE9_CR6_EXT2_VDT_2US   0x0800
 
#define HBRIDGE9_CR6_EXT2_VDT_3US   0x1000
 
#define HBRIDGE9_CR6_EXT2_VDT_4US   0x1800
 
#define HBRIDGE9_CR6_EXT2_VDT_MASK   0x1800
 
#define HBRIDGE9_CR6_EXT1_VDT_1US   0x0000
 
#define HBRIDGE9_CR6_EXT1_VDT_2US   0x0200
 
#define HBRIDGE9_CR6_EXT1_VDT_3US   0x0400
 
#define HBRIDGE9_CR6_EXT1_VDT_4US   0x0600
 
#define HBRIDGE9_CR6_EXT1_VDT_MASK   0x0600
 
#define HBRIDGE9_CR6_EXT2_VDS_OFF   0x0000
 
#define HBRIDGE9_CR6_EXT2_VDS_0p25V   0x0100
 
#define HBRIDGE9_CR6_EXT2_VDS_0p5V   0x0120
 
#define HBRIDGE9_CR6_EXT2_VDS_0p75V   0x0140
 
#define HBRIDGE9_CR6_EXT2_VDS_1V   0x0160
 
#define HBRIDGE9_CR6_EXT2_VDS_1p25V   0x0180
 
#define HBRIDGE9_CR6_EXT2_VDS_1p5V   0x01A0
 
#define HBRIDGE9_CR6_EXT2_VDS_1p75V   0x01C0
 
#define HBRIDGE9_CR6_EXT2_VDS_2V   0x01E0
 
#define HBRIDGE9_CR6_EXT2_VDS_MASK   0x01E0
 
#define HBRIDGE9_CR6_EXT1_VDS_OFF   0x0000
 
#define HBRIDGE9_CR6_EXT1_VDS_0p25V   0x0010
 
#define HBRIDGE9_CR6_EXT1_VDS_0p5V   0x0012
 
#define HBRIDGE9_CR6_EXT1_VDS_0p75V   0x0014
 
#define HBRIDGE9_CR6_EXT1_VDS_1V   0x0016
 
#define HBRIDGE9_CR6_EXT1_VDS_1p25V   0x0018
 
#define HBRIDGE9_CR6_EXT1_VDS_1p5V   0x001A
 
#define HBRIDGE9_CR6_EXT1_VDS_1p75V   0x001C
 
#define HBRIDGE9_CR6_EXT1_VDS_2V   0x001E
 
#define HBRIDGE9_CR6_EXT1_VDS_MASK   0x001E
 
#define HBRIDGE9_CR7_HBDCL1   0x8000
 H-Bridge 9 Control register 7 bits.
 
#define HBRIDGE9_CR7_HBDCH1   0x4000
 
#define HBRIDGE9_CR7_HBDC1_MASK   0xC000
 
#define HBRIDGE9_CR7_STBY2   0x2000
 
#define HBRIDGE9_CR7_ODCL6   0x1000
 
#define HBRIDGE9_CR7_ODCH6   0x0800
 
#define HBRIDGE9_CR7_ODC6_MASK   0x1800
 
#define HBRIDGE9_CR7_ODCL5   0x0400
 
#define HBRIDGE9_CR7_ODCH5   0x0200
 
#define HBRIDGE9_CR7_ODC5_MASK   0x0600
 
#define HBRIDGE9_CR7_ODCL4   0x0100
 
#define HBRIDGE9_CR7_ODCH4   0x0080
 
#define HBRIDGE9_CR7_ODC4_MASK   0x0180
 
#define HBRIDGE9_CR7_ODCL3   0x0040
 
#define HBRIDGE9_CR7_ODCH3   0x0020
 
#define HBRIDGE9_CR7_ODC3_MASK   0x0060
 
#define HBRIDGE9_CR7_ODCL2   0x0010
 
#define HBRIDGE9_CR7_ODCH2   0x0008
 
#define HBRIDGE9_CR7_ODC2_MASK   0x0018
 
#define HBRIDGE9_CR7_ODCL1   0x0004
 
#define HBRIDGE9_CR7_ODCH1   0x0002
 
#define HBRIDGE9_CR7_ODC1_MASK   0x0006
 
#define HBRIDGE9_CR8_KI_GAIN_1_OVER_128   0x0000
 H-Bridge 9 Control register 8 bits.
 
#define HBRIDGE9_CR8_KI_GAIN_1_OVER_64   0x0010
 
#define HBRIDGE9_CR8_KI_GAIN_1_OVER_32   0x0020
 
#define HBRIDGE9_CR8_KI_GAIN_1_OVER_16   0x0030
 
#define HBRIDGE9_CR8_KI_GAIN_1_OVER_8   0x0040
 
#define HBRIDGE9_CR8_KI_GAIN_1_OVER_4   0x0050
 
#define HBRIDGE9_CR8_KI_GAIN_1_OVER_2   0x0060
 
#define HBRIDGE9_CR8_KI_GAIN_1   0x0070
 
#define HBRIDGE9_CR8_KI_GAIN_MASK   0x0070
 
#define HBRIDGE9_CR8_KP_GAIN_2   0x0000
 
#define HBRIDGE9_CR8_KP_GAIN_4   0x0001
 
#define HBRIDGE9_CR8_KP_GAIN_8   0x0002
 
#define HBRIDGE9_CR8_KP_GAIN_16   0x0003
 
#define HBRIDGE9_CR8_KP_GAIN_32   0x0004
 
#define HBRIDGE9_CR8_KP_GAIN_64   0x0005
 
#define HBRIDGE9_CR8_KP_GAIN_128   0x0006
 
#define HBRIDGE9_CR8_KP_GAIN_256   0x0007
 
#define HBRIDGE9_CR8_KP_GAIN_MASK   0x0007
 
#define HBRIDGE9_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
 Data sample selection.
 
#define HBRIDGE9_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE
 
#define HBRIDGE9_MAP_MIKROBUS(cfg, mikrobus)
 MikroBUS pin mapping.
 

Enumerations

enum  hbridge9_return_value_t { HBRIDGE9_OK = 0 , HBRIDGE9_ERROR = -1 }
 H-Bridge 9 Click return value data. More...
 

Functions

void hbridge9_cfg_setup (hbridge9_cfg_t *cfg)
 H-Bridge 9 configuration object setup function.
 
err_t hbridge9_init (hbridge9_t *ctx, hbridge9_cfg_t *cfg)
 H-Bridge 9 initialization function.
 
err_t hbridge9_default_cfg (hbridge9_t *ctx)
 H-Bridge 9 default configuration function.
 
err_t hbridge9_spi_transfer (hbridge9_t *ctx, uint8_t *data_in, uint8_t tx_len, uint8_t *data_out, uint8_t rx_len)
 H-Bridge 9 spi transfer function.
 
err_t hbridge9_write_register (hbridge9_t *ctx, uint8_t reg, uint16_t data_in)
 H-Bridge 9 write register function.
 
err_t hbridge9_read_register (hbridge9_t *ctx, uint8_t reg, uint16_t *data_out)
 H-Bridge 9 read register function.
 
err_t hbridge9_modify_register_bits (hbridge9_t *ctx, uint8_t reg, uint16_t clr_mask, uint16_t set_mask)
 H-Bridge 9 modify register bits function.
 
err_t hbridge9_read_register_and_clear (hbridge9_t *ctx, uint8_t reg, uint16_t *data_out)
 H-Bridge 9 read register and clear function.
 
err_t hbridge9_read_info_register (hbridge9_t *ctx, uint8_t reg, uint8_t *data_out)
 H-Bridge 9 read info register function.
 
err_t hbridge9_set_default (hbridge9_t *ctx)
 H-Bridge 9 set default function.
 
err_t hbridge9_clear_all_status (hbridge9_t *ctx)
 H-Bridge 9 clear all status function.
 
err_t hbridge9_check_communication (hbridge9_t *ctx)
 H-Bridge 9 check communication function.
 
void hbridge9_set_en_out_pin (hbridge9_t *ctx, uint8_t state)
 H-Bridge 9 set en out pin function.
 
void hbridge9_send_actuation_pulse (hbridge9_t *ctx)
 H-Bridge 9 send actuation pulse function.
 
uint8_t hbridge9_get_dout_pin (hbridge9_t *ctx)
 H-Bridge 9 get dout pin function.
 

Detailed Description

This file contains API for H-Bridge 9 Click Driver.

Enumeration Type Documentation

◆ hbridge9_return_value_t

enum hbridge9_return_value_t

H-Bridge 9 Click return value data.

Predefined enum values for driver return values.

Enumerator
HBRIDGE9_OK 
HBRIDGE9_ERROR