i2ctospi.h

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/*
 * MikroSDK - MikroE Software Development Kit
 * Copyright© 2020 MikroElektronika d.o.o.
 * 
 * Permission is hereby granted, free of charge, to any person 
 * obtaining a copy of this software and associated documentation 
 * files (the "Software"), to deal in the Software without restriction, 
 * including without limitation the rights to use, copy, modify, merge, 
 * publish, distribute, sublicense, and/or sell copies of the Software, 
 * and to permit persons to whom the Software is furnished to do so, 
 * subject to the following conditions:
 * 
 * The above copyright notice and this permission notice shall be 
 * included in all copies or substantial portions of the Software.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 
 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE 
 * OR OTHER DEALINGS IN THE SOFTWARE. 
 */
 
// ----------------------------------------------------------------------------
 
#ifndef I2CTOSPI_H
#define I2CTOSPI_H
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"
 
// -------------------------------------------------------------- PUBLIC MACROS 
#define I2CTOSPI_MAP_MIKROBUS( cfg, mikrobus ) \
  cfg.scl  = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
  cfg.sda  = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
  cfg.rst  = MIKROBUS( mikrobus, MIKROBUS_RST ); \
  cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS ); \
  cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
#define I2CTOSPI_RETVAL  uint8_t
 
#define I2CTOSPI_OK           0x00
#define I2CTOSPI_INIT_ERROR   0xFF
#define I2CTOSPI_I2C_SLAVE_ADDRESS_0                               0x28
#define I2CTOSPI_I2C_SLAVE_ADDRESS_1                               0x29
#define I2CTOSPI_I2C_SLAVE_ADDRESS_2                               0x2A
#define I2CTOSPI_I2C_SLAVE_ADDRESS_3                               0x2B
#define I2CTOSPI_I2C_SLAVE_ADDRESS_4                               0x2C
#define I2CTOSPI_I2C_SLAVE_ADDRESS_5                               0x2D
#define I2CTOSPI_I2C_SLAVE_ADDRESS_6                               0x2E
#define I2CTOSPI_I2C_SLAVE_ADDRESS_7                               0x2F
#define I2CTOSPI_CONFIGURE_SPI                                     0xF0
#define I2CTOSPI_CLEAR_INTERRUPT                                   0xF1
#define I2CTOSPI_IDLE_MODE                                         0xF2
#define I2CTOSPI_GPIO_WRITE                                        0xF4
#define I2CTOSPI_GPIO_READ                                         0xF5
#define I2CTOSPI_GPIO_ENABLE                                       0xF6
#define I2CTOSPI_GPIO_CONFIGURATION                                0xF7
#define I2CTOSPI_CONFIGURE_SPI_ORDER_MSB_FIRST                     0x00
#define I2CTOSPI_CONFIGURE_SPI_ORDER_LSB_FIRST                     0x20
#define I2CTOSPI_CONFIGURE_SPI_MODE_SPICLK_LOW_LEADING_EDGE        0x00
#define I2CTOSPI_CONFIGURE_SPI_MODE_SPICLK_LOW_TRAILING_EDGE       0x04
#define I2CTOSPI_CONFIGURE_SPI_MODE_SPICLK_HIGH_LEADING_EDGE       0x08
#define I2CTOSPI_CONFIGURE_SPI_MODE_SPICLK_HIGH_TRAILING_EDGE      0x0C
#define I2CTOSPI_CONFIGURE_SPI_CLOCK_RATE_1843kHz                  0x00
#define I2CTOSPI_CONFIGURE_SPI_CLOCK_RATE_461kHz                   0x01
#define I2CTOSPI_CONFIGURE_SPI_CLOCK_RATE_115kHz                   0x02
#define I2CTOSPI_CONFIGURE_SPI_CLOCK_RATE_58kHz                    0x03
#define I2CTOSPI_CONFIGURE_GPIO_WRITE_PORT_ENABLE_SS0              0x01
#define I2CTOSPI_CONFIGURE_GPIO_WRITE_PORT_ENABLE_SS1              0x02
#define I2CTOSPI_CONFIGURE_GPIO_WRITE_PORT_ENABLE_SS2              0x04
#define I2CTOSPI_CONFIGURE_GPIO_WRITE_PORT_ENABLE_SS3              0x08
#define I2CTOSPI_CONFIGURE_GPIO_READ_PORT_ENABLE_SS0               0x01
#define I2CTOSPI_CONFIGURE_GPIO_READ_PORT_ENABLE_SS1               0x02
#define I2CTOSPI_CONFIGURE_GPIO_READ_PORT_ENABLE_SS2               0x04
#define I2CTOSPI_CONFIGURE_GPIO_READ_PORT_ENABLE_SS3               0x08
#define I2CTOSPI_CONFIGURE_GPIO_BIDIRECTIONAL_PORT_ENABLE_SS0      0x01
#define I2CTOSPI_CONFIGURE_GPIO_BIDIRECTIONAL_PORT_ENABLE_SS1      0x02
#define I2CTOSPI_CONFIGURE_GPIO_BIDIRECTIONAL_PORT_ENABLE_SS2      0x04
#define I2CTOSPI_CONFIGURE_GPIO_BIDIRECTIONAL_PORT_ENABLE_SS3      0x08
#define I2CTOSPI_CONFIGURE_GPIO_QUASI_BIDIRECTIONAL_SS0            0x00
#define I2CTOSPI_CONFIGURE_GPIO_PUSH_PULL_SS0                      0x01
#define I2CTOSPI_CONFIGURE_GPIO_INPUT_ONLY_SS0                     0x02
#define I2CTOSPI_CONFIGURE_GPIO_OPEN_DRAIN_SS0                     0x03
#define I2CTOSPI_CONFIGURE_GPIO_QUASI_BIDIRECTIONAL_SS1            0x00
#define I2CTOSPI_CONFIGURE_GPIO_PUSH_PULL_SS1                      0x04
#define I2CTOSPI_CONFIGURE_GPIO_INPUT_ONLY_SS1                     0x08
#define I2CTOSPI_CONFIGURE_GPIO_OPEN_DRAIN_SS1                     0x0C
#define I2CTOSPI_CONFIGURE_GPIO_QUASI_BIDIRECTIONAL_SS2            0x00
#define I2CTOSPI_CONFIGURE_GPIO_PUSH_PULL_SS2                      0x10
#define I2CTOSPI_CONFIGURE_GPIO_INPUT_ONLY_SS2                     0x20
#define I2CTOSPI_CONFIGURE_GPIO_OPEN_DRAIN_SS2                     0x30
#define I2CTOSPI_CONFIGURE_GPIO_QUASI_BIDIRECTIONAL_SS3            0x00
#define I2CTOSPI_CONFIGURE_GPIO_PUSH_PULL_SS3                      0x40
#define I2CTOSPI_CONFIGURE_GPIO_INPUT_ONLY_SS3                     0x80
#define I2CTOSPI_CONFIGURE_GPIO_OPEN_DRAIN_SS3                     0xC0
 
#define I2CTOSPI_SLAVEDEVICE_SS0                                  0x01
#define I2CTOSPI_SLAVEDEVICE_SS1                                  0x02
#define I2CTOSPI_SLAVEDEVICE_SS2                                  0x04
#define I2CTOSPI_SLAVEDEVICE_SS3                                  0x08
 
#define I2CTOSPI_RTC5_COMMAND_WRITE                                0x12
#define I2CTOSPI_RTC5_COMMAND_READ                                 0x13
 
#define I2CTOSPI_RTC5_REG_TIME_HUN_OF_SEC                          0x00
#define I2CTOSPI_RTC5_REG_TIME_SEC                                 0x01
#define I2CTOSPI_RTC5_REG_TIME_MIN                                 0x02
#define I2CTOSPI_RTC5_REG_TIME_HOUR                                0x03
#define I2CTOSPI_RTC5_REG_TIME_DAY_OF_THE_WEEK                     0x04
#define I2CTOSPI_RTC5_REG_TIME_DATE_DAY                            0x05
#define I2CTOSPI_RTC5_REG_TIME_DATE_MONTH                          0x06
#define I2CTOSPI_RTC5_REG_TIME_DATE_YEAR                           0x07
#define I2CTOSPI_RTC5_REG_CONFIG                                   0x08
#define I2CTOSPI_RTC5_REG_CALIBRATION                              0x09
 
#define I2CTOSPI_RTC5_COMMAND_CLEAR                                0x54
#define I2CTOSPI_RTC5_COMMAND_ENABLE_COUNTING                      0x80
 // End group macro 
// --------------------------------------------------------------- PUBLIC TYPES
typedef struct
{
    // Output pins 
 
    digital_out_t rst;
    digital_out_t cs;
 
    // Input pins 
 
    digital_in_t int_pin;
    
    // Modules 
 
    i2c_master_t i2c;
 
    // ctx variable 
 
    uint8_t slave_address;
 
} i2ctospi_t;
 
typedef struct
{
    // Communication gpio pins 
 
    pin_name_t scl;
    pin_name_t sda;
    
    // Additional gpio pins 
 
    pin_name_t rst;
    pin_name_t cs;
    pin_name_t int_pin;
 
    // static variable 
 
    uint32_t i2c_speed;
    uint8_t i2c_address;
 
} i2ctospi_cfg_t;
 
typedef struct
{
    // Variable 
     uint8_t slave_device; 
     uint8_t function_id; 
     uint8_t reg_addr; 
     uint8_t n_bytes;
 
} i2ctospi_spi_t;
 
typedef struct
{
    // Variable 
      uint8_t ss3_val; 
      uint8_t ss2_val; 
      uint8_t ss1_val; 
      uint8_t ss0_val;
 
} i2ctospi_gpio_t;
 
 // End types group
// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
 
#ifdef __cplusplus
extern "C"{
#endif
 
void i2ctospi_cfg_setup ( i2ctospi_cfg_t *cfg );
 
I2CTOSPI_RETVAL i2ctospi_init ( i2ctospi_t *ctx, i2ctospi_cfg_t *cfg );
 
void i2ctospi_default_cfg ( i2ctospi_t *ctx );
 
void i2ctospi_generic_write ( i2ctospi_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
 
void i2ctospi_generic_read ( i2ctospi_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len );
 
void i2ctospi_hw_reset ( i2ctospi_t *ctx );
 
uint8_t i2ctospi_get_interrupt ( i2ctospi_t *ctx );
 
void i2ctospi_spi_write_byte ( i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t write_data );
 
uint8_t i2ctospi_spi_read_byte ( i2ctospi_t *ctx, i2ctospi_spi_t *spi );
 
void i2ctospi_spi_burst_write ( i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t *write_data );
 
void i2ctospi_spi_burst_read ( i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t *read_data );
 
void i2ctospi_read_buffer_bytes ( i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t *read_data );
 
void i2ctospi_write_command ( i2ctospi_t *ctx, i2ctospi_spi_t *spi, uint8_t command_data );
 
void i2ctospi_write_enable ( i2ctospi_t *ctx, uint8_t ss_pin_data );
 
void i2ctospi_config_spi ( i2ctospi_t *ctx, uint8_t config_data );
 
void i2ctospi_clear_interrupt ( i2ctospi_t *ctx );
 
void i2ctospi_set_idle_mode ( i2ctospi_t *ctx );
 
void i2ctospi_set_write_state_of_gpio ( i2ctospi_t *ctx, uint8_t gpio_state );
 
void i2ctospi_set_read_state_of_gpio ( i2ctospi_t *ctx, uint8_t gpio_state );
 
void i2ctospi_enable_gpio ( i2ctospi_t *ctx, uint8_t ss_pin_number );
 
void i2ctospi_types_gpio ( i2ctospi_t *ctx, i2ctospi_gpio_t *gpio );
 
#ifdef __cplusplus
}
#endif
#endif  // _I2CTOSPI_H_
 
 // End public_function group
 
// ------------------------------------------------------------------------- END