ism5 2.1.0.0
ism5.h
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1/****************************************************************************
2** Copyright (C) 2020 MikroElektronika d.o.o.
3** Contact: https://www.mikroe.com/contact
4**
5** Permission is hereby granted, free of charge, to any person obtaining a copy
6** of this software and associated documentation files (the "Software"), to deal
7** in the Software without restriction, including without limitation the rights
8** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9** copies of the Software, and to permit persons to whom the Software is
10** furnished to do so, subject to the following conditions:
11** The above copyright notice and this permission notice shall be
12** included in all copies or substantial portions of the Software.
13**
14** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
17** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
18** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
19** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20** USE OR OTHER DEALINGS IN THE SOFTWARE.
21****************************************************************************/
22
28#ifndef ISM5_H
29#define ISM5_H
30
31#ifdef __cplusplus
32extern "C"{
33#endif
34
39#ifdef PREINIT_SUPPORTED
40#include "preinit.h"
41#endif
42
43#ifdef MikroCCoreVersion
44 #if MikroCCoreVersion >= 1
45 #include "delays.h"
46 #endif
47#endif
48
49#include "drv_digital_out.h"
50#include "drv_digital_in.h"
51#include "drv_spi_master.h"
52#include "spi_specifics.h"
53
74#define ISM5_CMD_POWER_UP 0x02
75#define ISM5_CMD_NOP 0x00
76#define ISM5_CMD_PART_INFO 0x01
77#define ISM5_CMD_FUNC_INFO 0x10
78#define ISM5_CMD_SET_PROPERTY 0x11
79#define ISM5_CMD_GET_PROPERTY 0x12
80#define ISM5_CMD_GPIO_PIN_CFG 0x13
81#define ISM5_CMD_FIFO_INFO 0x15
82#define ISM5_CMD_GET_INT_STATUS 0x20
83#define ISM5_CMD_REQUEST_DEVICE_STATE 0x33
84#define ISM5_CMD_CHANGE_STATE 0x34
85#define ISM5_CMD_OFFLINE_RECAL 0x38
86#define ISM5_CMD_READ_CMD_BUFF 0x44
87#define ISM5_CMD_FRR_A_READ 0x50
88#define ISM5_CMD_FRR_B_READ 0x51
89#define ISM5_CMD_FRR_C_READ 0x53
90#define ISM5_CMD_FRR_D_READ 0x57
91#define ISM5_CMD_IRCAL 0x17
92#define ISM5_CMD_START_TX 0x31
93#define ISM5_CMD_TX_HOP 0x37
94#define ISM5_CMD_WRITE_TX_FIFO 0x66
95#define ISM5_CMD_PACKET_INFO 0x16
96#define ISM5_CMD_GET_MODEM_STATUS 0x22
97#define ISM5_CMD_START_RX 0x32
98#define ISM5_CMD_RX_HOP 0x36
99#define ISM5_CMD_READ_RX_FIFO 0x77
100#define ISM5_CMD_GET_ADC_READING 0x14
101#define ISM5_CMD_GET_PH_STATUS 0x21
102#define ISM5_CMD_GET_CHIP_STATUS 0x23
103
104 // ism5_cmd
105
120#define ISM5_CTS_READY_BYTE 0xFF
121#define ISM5_CTS_READY_TIMEOUT 5000ul
122
127#define ISM5_PART_NUMBER 0x4461u
128
133#define ISM5_POWER_UP_BOOT_FUNCTIONAL 1
134#define ISM5_POWER_UP_SELECT_TCXO 1
135#define ISM5_POWER_UP_TCXO_26MHZ 26000000ul
136
141#define ISM5_PROPERTY_GLOBAL_XO_TUNE 0x0000
142#define ISM5_PROPERTY_GLOBAL_CLK_CFG 0x0001
143#define ISM5_PROPERTY_GLOBAL_LOW_BATT_THRESH 0x0001
144#define ISM5_PROPERTY_GLOBAL_CONFIG 0x0003
145#define ISM5_PROPERTY_GLOBAL_WUT_CONFIG 0x0004
146#define ISM5_PROPERTY_GLOBAL_WUT_M_15_8 0x0005
147#define ISM5_PROPERTY_GLOBAL_WUT_M_7_0 0x0006
148#define ISM5_PROPERTY_GLOBAL_WUT_R 0x0007
149#define ISM5_PROPERTY_GLOBAL_WUT_LDC 0x0008
150#define ISM5_PROPERTY_GLOBAL_WUT_CAL 0x0009
151#define ISM5_PROPERTY_INT_CTL_ENABLE 0x0100
152#define ISM5_PROPERTY_INT_CTL_PH_ENABLE 0x0101
153#define ISM5_PROPERTY_INT_CTL_MODEM_ENABLE 0x0102
154#define ISM5_PROPERTY_INT_CTL_CHIP_ENABLE 0x0103
155#define ISM5_PROPERTY_FRR_CTL_A_MODE 0x0200
156#define ISM5_PROPERTY_FRR_CTL_B_MODE 0x0201
157#define ISM5_PROPERTY_FRR_CTL_C_MODE 0x0202
158#define ISM5_PROPERTY_FRR_CTL_D_MODE 0x0203
159#define ISM5_PROPERTY_PREAMBLE_TX_LENGTH 0x1000
160#define ISM5_PROPERTY_PREAMBLE_CONFIG_STD_1 0x1001
161#define ISM5_PROPERTY_PREAMBLE_CONFIG_NSTD 0x1002
162#define ISM5_PROPERTY_PREAMBLE_CONFIG_STD_2 0x1003
163#define ISM5_PROPERTY_PREAMBLE_CONFIG 0x1004
164#define ISM5_PROPERTY_PREAMBLE_PATTERN_31_24 0x1005
165#define ISM5_PROPERTY_PREAMBLE_PATTERN_23_16 0x1006
166#define ISM5_PROPERTY_PREAMBLE_PATTERN_15_8 0x1007
167#define ISM5_PROPERTY_PREAMBLE_PATTERN_7_0 0x1008
168#define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_CONFIG 0x1009
169#define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_PATTERN_31_24 0x100A
170#define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_PATTERN_23_16 0x100B
171#define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_PATTERN_15_8 0x100C
172#define ISM5_PROPERTY_PREAMBLE_POSTAMBLE_PATTERN_7_0 0x100D
173#define ISM5_PROPERTY_SYNC_CONFIG 0x1100
174#define ISM5_PROPERTY_SYNC_BITS_31_24 0x1101
175#define ISM5_PROPERTY_SYNC_BITS_23_16 0x1102
176#define ISM5_PROPERTY_SYNC_BITS_15_8 0x1103
177#define ISM5_PROPERTY_SYNC_BITS_7_0 0x1104
178#define ISM5_PROPERTY_PKT_CRC_CONFIG 0x1200
179#define ISM5_PROPERTY_PKT_CONFIG1 0x1206
180#define ISM5_PROPERTY_PKT_LEN 0x1208
181#define ISM5_PROPERTY_PKT_LEN_FIELD_SOURCE 0x1209
182#define ISM5_PROPERTY_PKT_LEN_ADJUST 0x120A
183#define ISM5_PROPERTY_PKT_TX_THRESHOLD 0x120B
184#define ISM5_PROPERTY_PKT_RX_THRESHOLD 0x120C
185#define ISM5_PROPERTY_PKT_FIELD_1_LENGTH_12_8 0x120D
186#define ISM5_PROPERTY_PKT_FIELD_1_LENGTH_7_0 0x120E
187#define ISM5_PROPERTY_PKT_FIELD_1_CONFIG 0x120F
188#define ISM5_PROPERTY_PKT_FIELD_1_CRC_CONFIG 0x1210
189#define ISM5_PROPERTY_PKT_FIELD_2_LENGTH_12_8 0x1211
190#define ISM5_PROPERTY_PKT_FIELD_2_LENGTH_7_0 0x1212
191#define ISM5_PROPERTY_PKT_FIELD_2_CONFIG 0x1213
192#define ISM5_PROPERTY_PKT_FIELD_2_CRC_CONFIG 0x1214
193#define ISM5_PROPERTY_PKT_FIELD_3_LENGTH_12_8 0x1215
194#define ISM5_PROPERTY_PKT_FIELD_3_LENGTH_7_0 0x1216
195#define ISM5_PROPERTY_PKT_FIELD_3_CONFIG 0x1217
196#define ISM5_PROPERTY_PKT_FIELD_3_CRC_CONFIG 0x1218
197#define ISM5_PROPERTY_PKT_FIELD_4_LENGTH_12_8 0x1219
198#define ISM5_PROPERTY_PKT_FIELD_4_LENGTH_7_0 0x121A
199#define ISM5_PROPERTY_PKT_FIELD_4_CONFIG 0x121B
200#define ISM5_PROPERTY_PKT_FIELD_4_CRC_CONFIG 0x121C
201#define ISM5_PROPERTY_PKT_FIELD_5_LENGTH_12_8 0x121D
202#define ISM5_PROPERTY_PKT_FIELD_5_LENGTH_7_0 0x121E
203#define ISM5_PROPERTY_PKT_FIELD_5_CONFIG 0x121F
204#define ISM5_PROPERTY_PKT_FIELD_5_CRC_CONFIG 0x1220
205#define ISM5_PROPERTY_PKT_RX_FIELD_1_LENGTH_12_8 0x1221
206#define ISM5_PROPERTY_PKT_RX_FIELD_1_LENGTH_7_0 0x1222
207#define ISM5_PROPERTY_PKT_RX_FIELD_1_CONFIG 0x1223
208#define ISM5_PROPERTY_PKT_RX_FIELD_1_CRC_CONFIG 0x1224
209#define ISM5_PROPERTY_PKT_RX_FIELD_2_LENGTH_12_8 0x1225
210#define ISM5_PROPERTY_PKT_RX_FIELD_2_LENGTH_7_0 0x1226
211#define ISM5_PROPERTY_PKT_RX_FIELD_2_CONFIG 0x1227
212#define ISM5_PROPERTY_PKT_RX_FIELD_2_CRC_CONFIG 0x1228
213#define ISM5_PROPERTY_PKT_RX_FIELD_3_LENGTH_12_8 0x1229
214#define ISM5_PROPERTY_PKT_RX_FIELD_3_LENGTH_7_0 0x122A
215#define ISM5_PROPERTY_PKT_RX_FIELD_3_CONFIG 0x122B
216#define ISM5_PROPERTY_PKT_RX_FIELD_3_CRC_CONFIG 0x122C
217#define ISM5_PROPERTY_PKT_RX_FIELD_4_LENGTH_12_8 0x122D
218#define ISM5_PROPERTY_PKT_RX_FIELD_4_LENGTH_7_0 0x122E
219#define ISM5_PROPERTY_PKT_RX_FIELD_4_CONFIG 0x122F
220#define ISM5_PROPERTY_PKT_RX_FIELD_4_CRC_CONFIG 0x1230
221#define ISM5_PROPERTY_PKT_RX_FIELD_5_LENGTH_12_8 0x1231
222#define ISM5_PROPERTY_PKT_RX_FIELD_5_LENGTH_7_0 0x1232
223#define ISM5_PROPERTY_PKT_RX_FIELD_5_CONFIG 0x1233
224#define ISM5_PROPERTY_PKT_RX_FIELD_5_CRC_CONFIG 0x1234
225#define ISM5_PROPERTY_MODEM_MOD_TYPE 0x2000
226#define ISM5_PROPERTY_MODEM_MAP_CONTROL 0x2001
227#define ISM5_PROPERTY_MODEM_DATA_RATE_2 0x2003
228#define ISM5_PROPERTY_MODEM_DATA_RATE_1 0x2004
229#define ISM5_PROPERTY_MODEM_DATA_RATE_0 0x2005
230#define ISM5_PROPERTY_MODEM_TX_NCO_MODE_3 0x2006
231#define ISM5_PROPERTY_MODEM_TX_NCO_MODE_2 0x2007
232#define ISM5_PROPERTY_MODEM_TX_NCO_MODE_1 0x2008
233#define ISM5_PROPERTY_MODEM_TX_NCO_MODE_0 0x2009
234#define ISM5_PROPERTY_MODEM_FREQ_DEV_2 0x200A
235#define ISM5_PROPERTY_MODEM_FREQ_DEV_1 0x200B
236#define ISM5_PROPERTY_MODEM_FREQ_DEV_0 0x200C
237#define ISM5_PROPERTY_MODEM_FREQ_OFFSET_1 0x200D
238#define ISM5_PROPERTY_MODEM_FREQ_OFFSET_0 0x200E
239#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_8 0x200F
240#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_7 0x2010
241#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_6 0x2011
242#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_5 0x2012
243#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_4 0x2013
244#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_3 0x2014
245#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_2 0x2015
246#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_1 0x2016
247#define ISM5_PROPERTY_MODEM_TX_FILTER_COEFF_0 0x2017
248#define ISM5_PROPERTY_MODEM_TX_RAMP_DELAY 0x2018
249#define ISM5_PROPERTY_MODEM_MDM_CTRL 0x2019
250#define ISM5_PROPERTY_MODEM_IF_CONTROL 0x201A
251#define ISM5_PROPERTY_MODEM_IF_FREQ_2 0x201B
252#define ISM5_PROPERTY_MODEM_IF_FREQ_1 0x201C
253#define ISM5_PROPERTY_MODEM_IF_FREQ_0 0x201D
254#define ISM5_PROPERTY_MODEM_DECIMATION_CFG1 0x201E
255#define ISM5_PROPERTY_MODEM_DECIMATION_CFG0 0x201F
256#define ISM5_PROPERTY_MODEM_BCR_OSR_1 0x2022
257#define ISM5_PROPERTY_MODEM_BCR_OSR_0 0x2023
258#define ISM5_PROPERTY_MODEM_BCR_NCO_OFFSET_2 0x2024
259#define ISM5_PROPERTY_MODEM_BCR_NCO_OFFSET_1 0x2025
260#define ISM5_PROPERTY_MODEM_BCR_NCO_OFFSET_0 0x2026
261#define ISM5_PROPERTY_MODEM_BCR_GAIN_1 0x2027
262#define ISM5_PROPERTY_MODEM_BCR_GAIN_0 0x2028
263#define ISM5_PROPERTY_MODEM_BCR_GEAR 0x2029
264#define ISM5_PROPERTY_MODEM_BCR_MISC1 0x202A
265#define ISM5_PROPERTY_MODEM_BCR_MISC0 0x202B
266#define ISM5_PROPERTY_MODEM_AFC_GEAR 0x202C
267#define ISM5_PROPERTY_MODEM_AFC_WAIT 0x202D
268#define ISM5_PROPERTY_MODEM_AFC_GAIN_1 0x202E
269#define ISM5_PROPERTY_MODEM_AFC_GAIN_0 0x202F
270#define ISM5_PROPERTY_MODEM_AFC_LIMITER_1 0x2030
271#define ISM5_PROPERTY_MODEM_AFC_LIMITER_0 0x2031
272#define ISM5_PROPERTY_MODEM_AFC_MISC 0x2032
273#define ISM5_PROPERTY_MODEM_AFC_ZIFOFF 0x2033
274#define ISM5_PROPERTY_MODEM_ADC_CTRL 0x2034
275#define ISM5_PROPERTY_MODEM_AGC_CONTROL 0x2035
276#define ISM5_PROPERTY_MODEM_AGC_WINDOW_SIZE 0x2038
277#define ISM5_PROPERTY_MODEM_AGC_RFPD_DECAY 0x2039
278#define ISM5_PROPERTY_MODEM_AGC_IFPD_DECAY 0x203A
279#define ISM5_PROPERTY_MODEM_FSK4_GAIN1 0x203B
280#define ISM5_PROPERTY_MODEM_FSK4_GAIN0 0x203C
281#define ISM5_PROPERTY_MODEM_FSK4_TH1 0x203D
282#define ISM5_PROPERTY_MODEM_FSK4_TH0 0x203E
283#define ISM5_PROPERTY_MODEM_FSK4_MAP 0x203F
284#define ISM5_PROPERTY_MODEM_OOK_PDTC 0x2040
285#define ISM5_PROPERTY_MODEM_OOK_BLOPK 0x2041
286#define ISM5_PROPERTY_MODEM_OOK_CNT1 0x2042
287#define ISM5_PROPERTY_MODEM_OOK_MISC 0x2043
288#define ISM5_PROPERTY_MODEM_RAW_SEARCH 0x2044
289#define ISM5_PROPERTY_MODEM_RAW_CONTROL 0x2045
290#define ISM5_PROPERTY_MODEM_RAW_EYE_1 0x2046
291#define ISM5_PROPERTY_MODEM_RAW_EYE_0 0x2047
292#define ISM5_PROPERTY_MODEM_ANT_DIV_MODE 0x2048
293#define ISM5_PROPERTY_MODEM_ANT_DIV_CONTROL 0x2049
294#define ISM5_PROPERTY_MODEM_RSSI_THRESH 0x204A
295#define ISM5_PROPERTY_MODEM_RSSI_JUMP_THRESH 0x204B
296#define ISM5_PROPERTY_MODEM_RSSI_CONTROL 0x204C
297#define ISM5_PROPERTY_MODEM_RSSI_CONTROL2 0x204D
298#define ISM5_PROPERTY_MODEM_RSSI_COMP 0x204E
299#define ISM5_PROPERTY_MODEM_CLKGEN_BAND 0x2051
300#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE13_7_0 0x2100
301#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE12_7_0 0x2101
302#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE11_7_0 0x2102
303#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE10_7_0 0x2103
304#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE9_7_0 0x2104
305#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE8_7_0 0x2105
306#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE7_7_0 0x2106
307#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE6_7_0 0x2107
308#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE5_7_0 0x2108
309#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE4_7_0 0x2109
310#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE3_7_0 0x210A
311#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE2_7_0 0x210B
312#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE1_7_0 0x210C
313#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COE0_7_0 0x210D
314#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COEM0 0x210E
315#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COEM1 0x210F
316#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COEM2 0x2110
317#define ISM5_PROPERTY_MODEM_CHFLT_RX1_CHFLT_COEM3 0x2111
318#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE13_7_0 0x2112
319#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE12_7_0 0x2113
320#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE11_7_0 0x2114
321#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE10_7_0 0x2115
322#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE9_7_0 0x2116
323#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE8_7_0 0x2117
324#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE7_7_0 0x2118
325#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE6_7_0 0x2119
326#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE5_7_0 0x211A
327#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE4_7_0 0x211B
328#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE3_7_0 0x211C
329#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE2_7_0 0x211D
330#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE1_7_0 0x211E
331#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COE0_7_0 0x211F
332#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COEM0 0x2120
333#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COEM1 0x2121
334#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COEM2 0x2122
335#define ISM5_PROPERTY_MODEM_CHFLT_RX2_CHFLT_COEM3 0x2123
336#define ISM5_PROPERTY_PA_MODE 0x2200
337#define ISM5_PROPERTY_PA_PWR_LVL 0x2201
338#define ISM5_PROPERTY_PA_BIAS_CLKDUTY 0x2202
339#define ISM5_PROPERTY_PA_TC 0x2203
340#define ISM5_PROPERTY_PA_RAMP_EX 0x2204
341#define ISM5_PROPERTY_PA_RAMP_DOWN_DELAY 0x2205
342#define ISM5_PROPERTY_SYNTH_PFDCP_CPFF 0x2300
343#define ISM5_PROPERTY_SYNTH_PFDCP_CPINT 0x2301
344#define ISM5_PROPERTY_SYNTH_VCO_KV 0x2302
345#define ISM5_PROPERTY_SYNTH_LPFILT3 0x2303
346#define ISM5_PROPERTY_SYNTH_LPFILT2 0x2304
347#define ISM5_PROPERTY_SYNTH_LPFILT1 0x2305
348#define ISM5_PROPERTY_SYNTH_LPFILT0 0x2306
349#define ISM5_PROPERTY_SYNTH_VCO_KVCAL 0x2307
350#define ISM5_PROPERTY_MATCH_VALUE_1 0x3000
351#define ISM5_PROPERTY_MATCH_MASK_1 0x3001
352#define ISM5_PROPERTY_MATCH_CTRL_1 0x3002
353#define ISM5_PROPERTY_MATCH_VALUE_2 0x3003
354#define ISM5_PROPERTY_MATCH_MASK_2 0x3004
355#define ISM5_PROPERTY_MATCH_CTRL_2 0x3005
356#define ISM5_PROPERTY_MATCH_VALUE_3 0x3006
357#define ISM5_PROPERTY_MATCH_MASK_3 0x3007
358#define ISM5_PROPERTY_MATCH_CTRL_3 0x3008
359#define ISM5_PROPERTY_MATCH_VALUE_4 0x3009
360#define ISM5_PROPERTY_MATCH_MASK_4 0x300A
361#define ISM5_PROPERTY_MATCH_CTRL_4 0x300B
362#define ISM5_PROPERTY_FREQ_CONTROL_INTE 0x4000
363#define ISM5_PROPERTY_FREQ_CONTROL_FRAC_2 0x4001
364#define ISM5_PROPERTY_FREQ_CONTROL_FRAC_1 0x4002
365#define ISM5_PROPERTY_FREQ_CONTROL_FRAC_0 0x4003
366#define ISM5_PROPERTY_FREQ_CONTROL_CHANNEL_STEP_SIZE_1 0x4004
367#define ISM5_PROPERTY_FREQ_CONTROL_CHANNEL_STEP_SIZE_0 0x4005
368#define ISM5_PROPERTY_FREQ_CONTROL_W_SIZE 0x4006
369#define ISM5_PROPERTY_FREQ_CONTROL_VCOCNT_RX_ADJ 0x4007
370#define ISM5_PROPERTY_RX_HOP_CONTROL 0x5000
371#define ISM5_PROPERTY_RX_HOP_TABLE_SIZE 0x5001
372#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_0 0x5002
373#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_1 0x5003
374#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_2 0x5004
375#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_3 0x5005
376#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_4 0x5006
377#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_5 0x5007
378#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_6 0x5008
379#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_7 0x5009
380#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_8 0x500A
381#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_9 0x500B
382#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_10 0x500C
383#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_11 0x500D
384#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_12 0x500E
385#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_13 0x500F
386#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_14 0x5010
387#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_15 0x5011
388#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_16 0x5012
389#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_17 0x5013
390#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_18 0x5014
391#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_19 0x5015
392#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_20 0x5016
393#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_21 0x5017
394#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_22 0x5018
395#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_23 0x5019
396#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_24 0x501A
397#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_25 0x501B
398#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_26 0x501C
399#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_27 0x501D
400#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_28 0x501E
401#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_29 0x501F
402#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_30 0x5020
403#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_31 0x5021
404#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_32 0x5022
405#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_33 0x5023
406#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_34 0x5024
407#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_35 0x5025
408#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_36 0x5026
409#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_37 0x5027
410#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_38 0x5028
411#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_39 0x5029
412#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_40 0x502A
413#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_41 0x502B
414#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_42 0x502C
415#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_43 0x502D
416#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_44 0x502E
417#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_45 0x502F
418#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_46 0x5030
419#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_47 0x5031
420#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_48 0x5032
421#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_49 0x5033
422#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_50 0x5034
423#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_51 0x5035
424#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_52 0x5036
425#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_53 0x5037
426#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_54 0x5038
427#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_55 0x5039
428#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_56 0x503A
429#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_57 0x503B
430#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_58 0x503C
431#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_59 0x503D
432#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_60 0x503E
433#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_61 0x503F
434#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_62 0x5040
435#define ISM5_PROPERTY_RX_HOP_TABLE_ENTRY_63 0x5041
436
441#define ISM5_FIFO_RESET_NONE 0x00
442#define ISM5_FIFO_RESET_TX 0x01
443#define ISM5_FIFO_RESET_RX 0x02
444#define ISM5_FIFO_RESET_TX_RX 0x03
445#define ISM5_FIFO_RESET_MASK 0x03
446
451#define ISM5_STATE_NO_CHANGE 0x00
452#define ISM5_STATE_SLEEP 0x01
453#define ISM5_STATE_SPI_ACTIVE 0x02
454#define ISM5_STATE_READY 0x03
455#define ISM5_STATE_TX_TUNE 0x05
456#define ISM5_STATE_RX_TUNE 0x06
457#define ISM5_STATE_TX 0x07
458#define ISM5_STATE_RX 0x08
459#define ISM5_STATE_MASK 0x0F
460
465#define ISM5_INT_CLEAR 0x00
466#define ISM5_INT_PEND_PH 0x01
467#define ISM5_INT_PEND_MODEM 0x02
468#define ISM5_INT_PEND_CHIP 0x04
469#define ISM5_INT_STATUS_PH 0x01
470#define ISM5_INT_STATUS_MODEM 0x02
471#define ISM5_INT_STATUS_CHIP 0x04
472#define ISM5_PH_PEND_RX_FIFO_ALMOST_FULL 0x01
473#define ISM5_PH_PEND_TX_FIFO_ALMOST_EMPTY 0x02
474#define ISM5_PH_PEND_ALT_CRC_ERROR 0x04
475#define ISM5_PH_PEND_CRC_ERROR 0x08
476#define ISM5_PH_PEND_PACKET_RX 0x10
477#define ISM5_PH_PEND_PACKET_SEND 0x20
478#define ISM5_PH_PEND_FILTER_MISS 0x40
479#define ISM5_PH_PEND_FILTER_MATCH 0x80
480#define ISM5_PH_STATUS_RX_FIFO_ALMOST_FULL 0x01
481#define ISM5_PH_STATUS_TX_FIFO_ALMOST_EMPTY 0x02
482#define ISM5_PH_STATUS_ALT_CRC_ERROR 0x04
483#define ISM5_PH_STATUS_CRC_ERROR 0x08
484#define ISM5_PH_STATUS_PACKET_RX 0x10
485#define ISM5_PH_STATUS_PACKET_SEND 0x20
486#define ISM5_PH_STATUS_FILTER_MISS 0x40
487#define ISM5_PH_STATUS_FILTER_MATCH 0x80
488#define ISM5_MODEM_PEND_SYNC_DETECT 0x01
489#define ISM5_MODEM_PEND_PREAMBLE_DETECT 0x02
490#define ISM5_MODEM_PEND_INVALID_PREAMBLE 0x04
491#define ISM5_MODEM_PEND_RSSI 0x08
492#define ISM5_MODEM_PEND_RSSI_JUMP 0x10
493#define ISM5_MODEM_PEND_INVALID_SYNC 0x20
494#define ISM5_MODEM_PEND_POSTAMBLE_DETECT 0x40
495#define ISM5_MODEM_PEND_RSSI_LATCH 0x80
496#define ISM5_MODEM_STATUS_SYNC_DETECT 0x01
497#define ISM5_MODEM_STATUS_PREAMBLE_DETECT 0x02
498#define ISM5_MODEM_STATUS_INVALID_PREAMBLE 0x04
499#define ISM5_MODEM_STATUS_RSSI 0x08
500#define ISM5_MODEM_STATUS_RSSI_JUMP 0x10
501#define ISM5_MODEM_STATUS_INVALID_SYNC 0x20
502#define ISM5_MODEM_STATUS_POSTAMBLE_DETECT 0x40
503#define ISM5_MODEM_STATUS_RSSI_LATCH 0x80
504#define ISM5_CHIP_PEND_WUT 0x01
505#define ISM5_CHIP_PEND_LOW_BATT 0x02
506#define ISM5_CHIP_PEND_CHIP_READY 0x04
507#define ISM5_CHIP_PEND_CMD_ERROR 0x08
508#define ISM5_CHIP_PEND_STATE_CHANGE 0x10
509#define ISM5_CHIP_PEND_FIFO_UNDERFLOW_OVERFLOW_ERROR 0x20
510#define ISM5_CHIP_PEND_CAL 0x40
511#define ISM5_CHIP_STATUS_WUT 0x01
512#define ISM5_CHIP_STATUS_LOW_BATT 0x02
513#define ISM5_CHIP_STATUS_CHIP_READY 0x04
514#define ISM5_CHIP_STATUS_CMD_ERROR 0x08
515#define ISM5_CHIP_STATUS_STATE_CHANGE 0x10
516#define ISM5_CHIP_STATUS_FIFO_UNDERFLOW_OVERFLOW_ERROR 0x20
517#define ISM5_CHIP_STATUS_CAL 0x40
518
523#define ISM5_PA_PWR_LVL_MIN 0x00
524#define ISM5_PA_PWR_LVL_MAX 0x7F
525
530#define ISM5_PACKET_MAX_SIZE 64
531#define ISM5_PACKET_FIXED_SIZE 0
532#define ISM5_PACKET_TIMEOUT_DISABLE 0
533#define ISM5_PACKET_TIMEOUT_1_SEC 1000
534
543#define ISM5_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE
544#define ISM5_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE
545
546 // ism5_set
547
562#define ISM5_MAP_MIKROBUS( cfg, mikrobus ) \
563 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
564 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
565 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
566 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
567 cfg.shd = MIKROBUS( mikrobus, MIKROBUS_RST ); \
568 cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
569
570 // ism5_map
571 // ism5
572
577typedef struct
578{
579 // Output pins
580 digital_out_t shd;
582 // Input pins
583 digital_in_t int_pin;
585 // Modules
586 spi_master_t spi;
588 pin_name_t chip_select;
590} ism5_t;
591
596typedef struct
597{
598 // Communication gpio pins
599 pin_name_t miso;
600 pin_name_t mosi;
601 pin_name_t sck;
602 pin_name_t cs;
604 // Additional gpio pins
605 pin_name_t shd;
606 pin_name_t int_pin;
608 // static variable
609 uint32_t spi_speed;
610 spi_master_mode_t spi_mode;
611 spi_master_chip_select_polarity_t cs_polarity;
613} ism5_cfg_t;
614
619typedef struct
620{
621 uint8_t chip_rev;
622 uint16_t part;
623 uint8_t part_build;
624 uint16_t id;
625 uint8_t customer;
626 uint8_t rom_id;
629
634typedef struct
635{
636 uint8_t gpio_0;
637 uint8_t gpio_1;
638 uint8_t gpio_2;
639 uint8_t gpio_3;
640 uint8_t nirq;
641 uint8_t sdo;
642 uint8_t gen_config;
645
650typedef struct
651{
652 uint8_t int_pend;
653 uint8_t int_status;
654 uint8_t ph_pend;
655 uint8_t ph_status;
656 uint8_t modem_pend;
657 uint8_t modem_status;
658 uint8_t chip_pend;
659 uint8_t chip_status;
662
667typedef enum
668{
671 ISM5_TIMEOUT = -2
672
674
691
705err_t ism5_init ( ism5_t *ctx, ism5_cfg_t *cfg );
706
720
736err_t ism5_send_cmd ( ism5_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len );
737
750err_t ism5_read_rsp ( ism5_t *ctx, uint8_t *data_out, uint8_t len );
751
765err_t ism5_send_fast_cmd ( ism5_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len );
766
781err_t ism5_read_fast_cmd ( ism5_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len );
782
793err_t ism5_wait_ready ( ism5_t *ctx );
794
806
816
826
835uint8_t ism5_get_int_pin ( ism5_t *ctx );
836
848
861
873err_t ism5_power_up ( ism5_t *ctx );
874
888err_t ism5_get_part_info ( ism5_t *ctx, ism5_part_info_t *part_info );
889
904err_t ism5_set_property ( ism5_t *ctx, uint16_t prop_idx, uint8_t *data_in, uint8_t num_props );
905
920err_t ism5_get_property ( ism5_t *ctx, uint16_t prop_idx, uint8_t *data_out, uint8_t num_props );
921
935err_t ism5_set_property_byte ( ism5_t *ctx, uint16_t prop_idx, uint8_t data_in );
936
950err_t ism5_get_property_byte ( ism5_t *ctx, uint16_t prop_idx, uint8_t *data_out );
951
966
981err_t ism5_fifo_info ( ism5_t *ctx, uint8_t fifo_reset, uint8_t *rx_fifo_count, uint8_t *tx_fifo_space );
982
997
1011err_t ism5_get_device_state ( ism5_t *ctx, uint8_t *state, uint8_t *channel );
1012
1025err_t ism5_change_state ( ism5_t *ctx, uint8_t state );
1026
1041err_t ism5_start_tx ( ism5_t *ctx, uint8_t channel, uint8_t condition, uint16_t len );
1042
1056err_t ism5_write_tx_fifo ( ism5_t *ctx, uint8_t *data_in, uint8_t len );
1057
1072err_t ism5_start_rx ( ism5_t *ctx, uint8_t channel, uint8_t condition, uint16_t len );
1073
1087err_t ism5_read_rx_fifo ( ism5_t *ctx, uint8_t *data_out, uint8_t len );
1088
1101err_t ism5_wait_tx_finish ( ism5_t *ctx, uint32_t timeout );
1102
1117err_t ism5_transmit_packet ( ism5_t *ctx, uint8_t channel, uint8_t *data_in, uint8_t len );
1118
1134err_t ism5_receive_packet ( ism5_t *ctx, uint8_t channel, uint8_t *data_out, uint8_t *len, uint32_t timeout );
1135
1136#ifdef __cplusplus
1137}
1138#endif
1139#endif // ISM5_H
1140
1141 // ism5
1142
1143// ------------------------------------------------------------------------ END
err_t ism5_set_property_byte(ism5_t *ctx, uint16_t prop_idx, uint8_t data_in)
ISM 5 set property byte function.
err_t ism5_fifo_info(ism5_t *ctx, uint8_t fifo_reset, uint8_t *rx_fifo_count, uint8_t *tx_fifo_space)
ISM 5 fifo info function.
err_t ism5_wait_tx_finish(ism5_t *ctx, uint32_t timeout)
ISM 5 wait tx finish function.
err_t ism5_wait_ready(ism5_t *ctx)
ISM 5 wait ready function.
err_t ism5_get_part_info(ism5_t *ctx, ism5_part_info_t *part_info)
ISM 5 get part info function.
void ism5_enable_device(ism5_t *ctx)
ISM 5 enable device function.
err_t ism5_read_rx_fifo(ism5_t *ctx, uint8_t *data_out, uint8_t len)
ISM 5 read rx fifo function.
err_t ism5_config_init(ism5_t *ctx)
ISM 5 config init function.
err_t ism5_power_up(ism5_t *ctx)
ISM 5 power up function.
err_t ism5_get_property(ism5_t *ctx, uint16_t prop_idx, uint8_t *data_out, uint8_t num_props)
ISM 5 get property function.
void ism5_disable_device(ism5_t *ctx)
ISM 5 disable device function.
err_t ism5_check_communication(ism5_t *ctx)
ISM 5 check communication function.
err_t ism5_start_rx(ism5_t *ctx, uint8_t channel, uint8_t condition, uint16_t len)
ISM 5 start rx function.
err_t ism5_default_cfg(ism5_t *ctx)
ISM 5 default configuration function.
err_t ism5_read_fast_cmd(ism5_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len)
ISM 5 read fast cmd function.
err_t ism5_start_tx(ism5_t *ctx, uint8_t channel, uint8_t condition, uint16_t len)
ISM 5 start tx function.
err_t ism5_check_ready(ism5_t *ctx)
ISM 5 check ready function.
err_t ism5_get_property_byte(ism5_t *ctx, uint16_t prop_idx, uint8_t *data_out)
ISM 5 get property byte function.
err_t ism5_write_tx_fifo(ism5_t *ctx, uint8_t *data_in, uint8_t len)
ISM 5 write tx fifo function.
err_t ism5_change_state(ism5_t *ctx, uint8_t state)
ISM 5 change state function.
err_t ism5_send_cmd(ism5_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len)
ISM 5 send cmd function.
void ism5_cfg_setup(ism5_cfg_t *cfg)
ISM 5 configuration object setup function.
err_t ism5_send_fast_cmd(ism5_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len)
ISM 5 send fast cmd function.
err_t ism5_get_device_state(ism5_t *ctx, uint8_t *state, uint8_t *channel)
ISM 5 get device state function.
err_t ism5_receive_packet(ism5_t *ctx, uint8_t channel, uint8_t *data_out, uint8_t *len, uint32_t timeout)
ISM 5 receive packet function.
err_t ism5_gpio_config(ism5_t *ctx, ism5_gpio_config_t *gpio_cfg)
ISM 5 gpio config function.
err_t ism5_transmit_packet(ism5_t *ctx, uint8_t channel, uint8_t *data_in, uint8_t len)
ISM 5 transmit packet function.
err_t ism5_get_int_status(ism5_t *ctx, ism5_int_status_t *status)
ISM 5 get int status function.
err_t ism5_init(ism5_t *ctx, ism5_cfg_t *cfg)
ISM 5 initialization function.
err_t ism5_read_rsp(ism5_t *ctx, uint8_t *data_out, uint8_t len)
ISM 5 read resp function.
uint8_t ism5_get_int_pin(ism5_t *ctx)
ISM 5 get int pin function.
err_t ism5_set_property(ism5_t *ctx, uint16_t prop_idx, uint8_t *data_in, uint8_t num_props)
ISM 5 set property function.
ism5_return_value_t
ISM 5 Click return value data.
Definition ism5.h:668
@ ISM5_TIMEOUT
Definition ism5.h:671
@ ISM5_ERROR
Definition ism5.h:670
@ ISM5_OK
Definition ism5.h:669
This file contains SPI specific macros, functions, etc.
ISM 5 Click configuration object.
Definition ism5.h:597
spi_master_chip_select_polarity_t cs_polarity
Definition ism5.h:611
pin_name_t sck
Definition ism5.h:601
spi_master_mode_t spi_mode
Definition ism5.h:610
pin_name_t mosi
Definition ism5.h:600
uint32_t spi_speed
Definition ism5.h:609
pin_name_t shd
Definition ism5.h:605
pin_name_t int_pin
Definition ism5.h:606
pin_name_t miso
Definition ism5.h:599
pin_name_t cs
Definition ism5.h:602
ISM 5 Click gpio config object.
Definition ism5.h:635
uint8_t sdo
Definition ism5.h:641
uint8_t gpio_0
Definition ism5.h:636
uint8_t gpio_3
Definition ism5.h:639
uint8_t gpio_1
Definition ism5.h:637
uint8_t nirq
Definition ism5.h:640
uint8_t gpio_2
Definition ism5.h:638
uint8_t gen_config
Definition ism5.h:642
ISM 5 Click int status object.
Definition ism5.h:651
uint8_t chip_status
Definition ism5.h:659
uint8_t int_status
Definition ism5.h:653
uint8_t ph_status
Definition ism5.h:655
uint8_t int_pend
Definition ism5.h:652
uint8_t ph_pend
Definition ism5.h:654
uint8_t modem_pend
Definition ism5.h:656
uint8_t chip_pend
Definition ism5.h:658
uint8_t modem_status
Definition ism5.h:657
ISM 5 Click part info object.
Definition ism5.h:620
uint8_t chip_rev
Definition ism5.h:621
uint8_t rom_id
Definition ism5.h:626
uint16_t part
Definition ism5.h:622
uint16_t id
Definition ism5.h:624
uint8_t customer
Definition ism5.h:625
uint8_t part_build
Definition ism5.h:623
ISM 5 Click context object.
Definition ism5.h:578
spi_master_t spi
Definition ism5.h:586
digital_in_t int_pin
Definition ism5.h:583
pin_name_t chip_select
Definition ism5.h:588
digital_out_t shd
Definition ism5.h:580