MRAM 4 Registers Settings

Settings for registers of MRAM 4 Click driver. More...

Macros
#define	MRAM4_MEMORY_ADDRESS_MIN   0x000000ul
	MRAM 4 description of the persistent memory and page size values.
#define	MRAM4_MEMORY_ADDRESS_MAX   0x3FFFFFul
#define	MRAM4_PAGE_SIZE   256
#define	MRAM4_WRITE_PROTECT_ENABLE   0
	MRAM 4 description of the write-protection and hold pin logic state.
#define	MRAM4_WRITE_PROTECT_DISABLE   1
#define	MRAM4_HOLD_ENABLE   0
#define	MRAM4_HOLD_DISABLE   1
#define	MRAM4_STATUS_WP_BIT_MASK   0x80
	MRAM 4 description of status register bit assignments.
#define	MRAM4_STATUS_BP3_BIT_MASK   0x40
#define	MRAM4_STATUS_TOP_BOTTOM_BIT_MASK   0x20
#define	MRAM4_STATUS_BP2_BIT_MASK   0x10
#define	MRAM4_STATUS_BP1_BIT_MASK   0x08
#define	MRAM4_STATUS_BP0_BIT_MASK   0x04
#define	MRAM4_STATUS_WEL_BIT_MASK   0x02
#define	MRAM4_STATUS_WIP_BIT_MASK   0x01
#define	MRAM4_STATUS_WEL_SET   0x02
#define	MRAM4_STATUS_WEL_CLR   0x00
#define	MRAM4_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
	Data sample selection.
#define	MRAM4_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

Detailed Description

Settings for registers of MRAM 4 Click driver.

Macro Definition Documentation

MRAM4_HOLD_DISABLE

#define MRAM4_HOLD_DISABLE   1

MRAM4_HOLD_ENABLE

#define MRAM4_HOLD_ENABLE   0

MRAM4_MEMORY_ADDRESS_MAX

#define MRAM4_MEMORY_ADDRESS_MAX   0x3FFFFFul

MRAM4_MEMORY_ADDRESS_MIN

#define MRAM4_MEMORY_ADDRESS_MIN   0x000000ul

MRAM 4 description of the persistent memory and page size values.

Specified persistent memory and page size values of MRAM 4 Click driver.

MRAM4_PAGE_SIZE

#define MRAM4_PAGE_SIZE   256

MRAM4_SET_DATA_SAMPLE_EDGE

#define MRAM4_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE

Data sample selection.

This macro sets data samples for SPI modules.

Note

Available only on Microchip PIC family devices. This macro will set data sampling for all SPI modules on MCU. Can be overwritten with mram4_init which will set SET_SPI_DATA_SAMPLE_MIDDLE by default on the mapped mikrobus.

MRAM4_SET_DATA_SAMPLE_MIDDLE

#define MRAM4_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE

MRAM4_STATUS_BP0_BIT_MASK

#define MRAM4_STATUS_BP0_BIT_MASK   0x04

MRAM4_STATUS_BP1_BIT_MASK

#define MRAM4_STATUS_BP1_BIT_MASK   0x08

MRAM4_STATUS_BP2_BIT_MASK

#define MRAM4_STATUS_BP2_BIT_MASK   0x10

MRAM4_STATUS_BP3_BIT_MASK

#define MRAM4_STATUS_BP3_BIT_MASK   0x40

MRAM4_STATUS_TOP_BOTTOM_BIT_MASK

#define MRAM4_STATUS_TOP_BOTTOM_BIT_MASK   0x20

MRAM4_STATUS_WEL_BIT_MASK

#define MRAM4_STATUS_WEL_BIT_MASK   0x02

MRAM4_STATUS_WEL_CLR

#define MRAM4_STATUS_WEL_CLR   0x00

MRAM4_STATUS_WEL_SET

#define MRAM4_STATUS_WEL_SET   0x02

MRAM4_STATUS_WIP_BIT_MASK

#define MRAM4_STATUS_WIP_BIT_MASK   0x01

MRAM4_STATUS_WP_BIT_MASK

#define MRAM4_STATUS_WP_BIT_MASK   0x80

MRAM 4 description of status register bit assignments.

Specified status register bit assignments of MRAM 4 Click driver.

MRAM4_WRITE_PROTECT_DISABLE

#define MRAM4_WRITE_PROTECT_DISABLE   1

MRAM4_WRITE_PROTECT_ENABLE

#define MRAM4_WRITE_PROTECT_ENABLE   0

MRAM 4 description of the write-protection and hold pin logic state.

Specified write-protection and hold pin logic state of MRAM 4 Click driver.