rtd2.h

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/*
 * MikroSDK - MikroE Software Development Kit
 * Copyright© 2020 MikroElektronika d.o.o.
 * 
 * Permission is hereby granted, free of charge, to any person 
 * obtaining a copy of this software and associated documentation 
 * files (the "Software"), to deal in the Software without restriction, 
 * including without limitation the rights to use, copy, modify, merge, 
 * publish, distribute, sublicense, and/or sell copies of the Software, 
 * and to permit persons to whom the Software is furnished to do so, 
 * subject to the following conditions:
 * 
 * The above copyright notice and this permission notice shall be 
 * included in all copies or substantial portions of the Software.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 
 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE 
 * OR OTHER DEALINGS IN THE SOFTWARE. 
 */
 
// ----------------------------------------------------------------------------
 
#ifndef RTD2_H
#define RTD2_H
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
// -------------------------------------------------------------- PUBLIC MACROS 
#define RTD2_MAP_MIKROBUS( cfg, mikrobus ) \
   cfg.miso  = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
   cfg.mosi  = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
   cfg.sck   = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
   cfg.cs    = MIKROBUS( mikrobus, MIKROBUS_CS ); \
   cfg.str   = MIKROBUS( mikrobus, MIKROBUS_AN ); \
   cfg.rst   = MIKROBUS( mikrobus, MIKROBUS_RST ); \
   cfg.rdy   = MIKROBUS( mikrobus, MIKROBUS_INT )
#define RTD2_SET_DATA_SAMPLE_EDGE                   SET_SPI_DATA_SAMPLE_EDGE
#define RTD2_SET_DATA_SAMPLE_MIDDLE                 SET_SPI_DATA_SAMPLE_MIDDLE
 
#define RTD2_REG_MUX0                               0x00
#define RTD2_REG_VBIAS                              0x01
#define RTD2_REG_MUX1                               0x02
#define RTD2_REG_SYS0                               0x03
#define RTD2_REG_OFC0                               0x04
#define RTD2_REG_OFC1                               0x05
#define RTD2_REG_OFC2                               0x06
#define RTD2_REG_FSC0                               0x07
#define RTD2_REG_FSC1                               0x08
#define RTD2_REG_FSC2                               0x09
#define RTD2_REG_IDAC0                              0x0A
#define RTD2_REG_IDAC1                              0x0B
#define RTD2_REG_GPIOCFG                            0x0C
#define RTD2_REG_GPIODIR                            0x0D
#define RTD2_REG_GPIODAT                            0x0E
#define RTD2_CMD_WAKEUP                             0x01
#define RTD2_CMD_SLEEP                              0x03
#define RTD2_CMD_SYNC                               0x05
#define RTD2_CMD_RESET                              0x07
#define RTD2_CMD_NOP                                0xFF
#define RTD2_CMD_RDATA                              0x12
#define RTD2_CMD_RDATAC                             0x14
#define RTD2_CMD_SDATAC                             0x16
#define RTD2_CMD_RREG                               0x20
#define RTD2_CMD_WREG                               0x40
#define RTD2_CMD_SYSOCAL                            0x60
#define RTD2_CMD_SYSGCAL                            0x61
#define RTD2_CMD_SELFOCAL                           0x62
#define RTD2_RW_DUMMY                               0xFF
#define RTD2_BCS_OFF                                0x00
#define RTD2_BCS_500                                0x40
#define RTD2_BCS_2                                  0x80
#define RTD2_BCS_10                                 0xC0
#define RTD2_AINP0                                  0x00
#define RTD2_AINP1                                  0x08
#define RTD2_AINP2                                  0x10
#define RTD2_AINP3                                  0x18
#define RTD2_AIN_POS                                0x38
#define RTD2_AINN0                                  0x00
#define RTD2_AINN1                                  0x01
#define RTD2_AINN2                                  0x02
#define RTD2_AINN3                                  0x03
#define RTD2_AIN_NEG                                0x07
#define RTD2_VBIAS_OFF                              0x00
#define RTD2_VBIAS0                                 0x01
#define RTD2_VBIAS1                                 0x02
#define RTD2_VBIAS2                                 0x04
#define RTD2_VBIAS3                                 0x08
#define RTD2_INT_VREF_OFF                           0x00
#define RTD2_INT_VREF_ON                            0x20
#define RTD2_INT_VREF_CONV                          0x40
#define RTD2_REF0                                   0x00
#define RTD2_INT                                    0x10
#define RTD2_INT_REF0                               0x18
#define RTD2_MEAS_NORM                              0x00
#define RTD2_MEAS_OFFSET                            0x01
#define RTD2_MEAS_GAIN                              0x02
#define RTD2_MEAS_TEMP                              0x03
#define RTD2_MEAS_REF0                              0x05
#define RTD2_MEAS_AVDD                              0x06
#define RTD2_MEAS_DVDD                              0x07
#define RTD2_GAIN_1                                 0x00
#define RTD2_GAIN_2                                 0x10
#define RTD2_GAIN_4                                 0x20
#define RTD2_GAIN_8                                 0x30
#define RTD2_GAIN_16                                0x40
#define RTD2_GAIN_32                                0x50
#define RTD2_GAIN_64                                0x60
#define RTD2_GAIN_128                               0x70
#define RTD2_DR_5                                   0x00
#define RTD2_DR_10                                  0x01
#define RTD2_DR_20                                  0x02
#define RTD2_DR_40                                  0x03
#define RTD2_DR_80                                  0x04
#define RTD2_DR_160                                 0x05
#define RTD2_DR_320                                 0x06
#define RTD2_DR_640                                 0x07
#define RTD2_DR_1000                                0x08
#define RTD2_DR_2000                                0x0F
#define RTD2_IDAC_ID                                0x90
#define RTD2_DRDY_OFF                               0x00
#define RTD2_DRDY_ON                                0x08
#define RTD2_IDAC_OFF                               0x00
#define RTD2_IDAC_50                                0x01
#define RTD2_IDAC_100                               0x02
#define RTD2_IDAC_250                               0x03
#define RTD2_IDAC_500                               0x04
#define RTD2_IDAC_750                               0x05
#define RTD2_IDAC_1000                              0x06
#define RTD2_IDAC_1500                              0x07
#define RTD2_IDAC1_A0                               0xCC
#define RTD2_IDAC1_A1                               0xDC
#define RTD2_IDAC1_A2                               0xEC
#define RTD2_IDAC1_A3                               0xFC
#define RTD2_IDAC2_A0                               0xCC
#define RTD2_IDAC2_A1                               0xCD
#define RTD2_IDAC2_A2                               0xCE
#define RTD2_IDAC2_A3                               0xCF
#define RTD2_GPIO_0                                 0x01
#define RTD2_GPIO_1                                 0x02
#define RTD2_GPIO_2                                 0x04
#define RTD2_GPIO_3                                 0x08
#define RTD2_IO_0                                   0x01
#define RTD2_IO_1                                   0x02
#define RTD2_IO_2                                   0x04
#define RTD2_IO_3                                   0x08
#define RTD2_OUT_0                                  0x01
#define RTD2_OUT_1                                  0x02
#define RTD2_OUT_2                                  0x04
#define RTD2_OUT_3                                  0x08
#define RTD2_PIN_LOW                                0x00
#define RTD2_PIN_HIGH                               0x01
#define RTD2_ERROR                                  0x00
#define RTD2_SUCCESS                                0x01
#define RTD2_START_CONVERSION_DISABLE               0x00
#define RTD2_START_CONVERSION_ENABLE                0x01
#define RTD2_NEW_DATA_IS_NOT_READY                  0x00
#define RTD2_NEW_DATA_IS_READY                      0x01
#define COEFF_PT100_RESISTANCE_OHMS_0_C             100.00000000
#define COEFF_ALPHA                                 0.3920000000
#define COEFF_ADC_RES_RT_P                          0.0000753846
#define COEFF_ADC_COR_FACT                          50.980300000
 // End group macro 
// --------------------------------------------------------------- PUBLIC TYPES
typedef struct
{
    digital_out_t cs;
    // Output pins 
 
    digital_out_t str;
    digital_out_t rst;
 
    // Input pins 
    digital_in_t rdy;
    
    // Modules 
    spi_master_t spi;
    pin_name_t chip_select;
 
} rtd2_t;
 
typedef struct
{
    // Communication gpio pins 
    pin_name_t miso;
    pin_name_t mosi;
    pin_name_t sck;
    pin_name_t cs;
 
    // Additional gpio pins 
    pin_name_t str;
    pin_name_t rst;
    pin_name_t rdy;
 
    // static variable 
    uint32_t spi_speed;
    spi_master_mode_t   spi_mode;
    spi_master_chip_select_polarity_t cs_polarity;
 
} rtd2_cfg_t;
 
 // End types group
// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
 
#ifdef __cplusplus
extern "C"{
#endif
 
void rtd2_cfg_setup ( rtd2_cfg_t *cfg );
 
err_t rtd2_init ( rtd2_t *ctx, rtd2_cfg_t *cfg );
 
void rtd2_default_cfg ( rtd2_t *ctx );
 
void rtd2_hw_reset ( rtd2_t *ctx );
 
void rtd2_toggle_cs ( rtd2_t *ctx, uint8_t cs_state );
 
void rtd2_enable_start ( rtd2_t *ctx, uint8_t en_start );
 
uint8_t rtd2_check_interupt ( rtd2_t *ctx );
 
void rtd2_send_cmd ( rtd2_t *ctx, uint8_t cmd );
 
void rtd2_set_wakeup ( rtd2_t *ctx );
 
void rtd2_set_sleep ( rtd2_t *ctx );
 
void rtd2_set_sync ( rtd2_t *ctx );
 
void rtd2_set_reset ( rtd2_t *ctx );
 
void rtd2_set_read_data_once ( rtd2_t *ctx );
 
void rtd2_set_read_data_continuous ( rtd2_t *ctx );
 
void rtd2_set_stop_data ( rtd2_t *ctx );
 
void rtd2_write_continuous ( rtd2_t *ctx, uint8_t reg, uint8_t *p_tx_data, uint8_t n_bytes );
 
void rtd2_read_continuous ( rtd2_t *ctx, uint8_t reg, uint8_t *p_rx_data, uint8_t n_bytes );
 
void rtd2_write_reg ( rtd2_t *ctx, uint8_t reg, uint8_t tx_data );
 
uint8_t rtd2_read_reg ( rtd2_t *ctx, uint8_t reg );
 
uint8_t rtd2_set_burn_out_source ( rtd2_t *ctx, uint8_t burn_out );
 
void rtd2_set_mux_sel ( rtd2_t *ctx, uint8_t adc_pos, uint8_t adc_neg );
 
uint8_t rtd2_set_bias ( rtd2_t *ctx, uint8_t bias );
 
uint8_t rtd2_set_int_ref ( rtd2_t *ctx, uint8_t s_ref );
 
void rtd2_set_system_monitor ( rtd2_t *ctx, uint8_t sys_mon );
 
void rtd2_set_system_control ( rtd2_t *ctx, uint8_t gain, uint8_t output_rate );
 
void rtd2_set_idac_current_mag ( rtd2_t *ctx, uint8_t c_idac );
 
void rtd2_set_idac_current_out ( rtd2_t *ctx, uint8_t c_out_1, uint8_t c_out_2 );
 
uint8_t rtd2_check_new_data_ready ( rtd2_t *ctx );
 
int32_t rtd2_read_output_data ( rtd2_t *ctx );
 
float rtd2_calc_temperature ( int32_t adc_val );
 
float rtd2_get_temperature ( rtd2_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif  // _RTD2_H_
 
 // End public_function group
 
// ------------------------------------------------------------------------- END