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vcpmonitor3 2.0.0.0
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List of registers of VCP Monitor 3 Click driver. More...
List of registers of VCP Monitor 3 Click driver.
| #define VCPMONITOR3_REG_ACCGPCTL 0xE3 |
| #define VCPMONITOR3_REG_ACCICTL 0xE1 |
| #define VCPMONITOR3_REG_ACCIDB 0xE4 |
| #define VCPMONITOR3_REG_ALERTBCTL 0xE8 |
| #define VCPMONITOR3_REG_C1_15_8 0x04 |
| #define VCPMONITOR3_REG_C1_23_16 0x03 |
| #define VCPMONITOR3_REG_C1_31_24 0x02 |
| #define VCPMONITOR3_REG_C1_39_32 0x01 |
| #define VCPMONITOR3_REG_C1_47_40 0x00 |
VCP Monitor 3 definitions of all byte addresses.
Specified definitions of all byte addresses of VCP Monitor 3 Click driver.
| #define VCPMONITOR3_REG_C1_7_0 0x05 |
| #define VCPMONITOR3_REG_C1TH_15_8 0x04 |
| #define VCPMONITOR3_REG_C1TH_23_16 0x03 |
| #define VCPMONITOR3_REG_C1TH_31_24 0x02 |
| #define VCPMONITOR3_REG_C1TH_39_32 0x01 |
| #define VCPMONITOR3_REG_C1TH_47_40 0x00 |
VCP Monitor 3 registers on page 1.
Specified definitions of registers on page 1 of VCP Monitor 3 Click driver.
| #define VCPMONITOR3_REG_C1TH_7_0 0x05 |
| #define VCPMONITOR3_REG_C1TL_15_8 0x0A |
| #define VCPMONITOR3_REG_C1TL_23_16 0x09 |
| #define VCPMONITOR3_REG_C1TL_31_24 0x08 |
| #define VCPMONITOR3_REG_C1TL_39_32 0x07 |
| #define VCPMONITOR3_REG_C1TL_47_40 0x06 |
| #define VCPMONITOR3_REG_C1TL_7_0 0x0B |
| #define VCPMONITOR3_REG_C2_15_8 0x14 |
| #define VCPMONITOR3_REG_C2_23_16 0x13 |
| #define VCPMONITOR3_REG_C2_31_24 0x12 |
| #define VCPMONITOR3_REG_C2_39_32 0x11 |
| #define VCPMONITOR3_REG_C2_47_40 0x10 |
| #define VCPMONITOR3_REG_C2_7_0 0x15 |
| #define VCPMONITOR3_REG_C2TH_15_8 0x24 |
| #define VCPMONITOR3_REG_C2TH_23_16 0x23 |
| #define VCPMONITOR3_REG_C2TH_31_24 0x22 |
| #define VCPMONITOR3_REG_C2TH_39_32 0x21 |
| #define VCPMONITOR3_REG_C2TH_47_40 0x20 |
| #define VCPMONITOR3_REG_C2TH_7_0 0x25 |
| #define VCPMONITOR3_REG_C2TL_15_8 0x2A |
| #define VCPMONITOR3_REG_C2TL_23_16 0x29 |
| #define VCPMONITOR3_REG_C2TL_31_24 0x28 |
| #define VCPMONITOR3_REG_C2TL_39_32 0x27 |
| #define VCPMONITOR3_REG_C2TL_47_40 0x26 |
| #define VCPMONITOR3_REG_C2TL_7_0 0x2B |
| #define VCPMONITOR3_REG_E1_15_8 0x0A |
| #define VCPMONITOR3_REG_E1_23_16 0x09 |
| #define VCPMONITOR3_REG_E1_31_24 0x08 |
| #define VCPMONITOR3_REG_E1_39_32 0x07 |
| #define VCPMONITOR3_REG_E1_47_40 0x06 |
| #define VCPMONITOR3_REG_E1_7_0 0x0B |
| #define VCPMONITOR3_REG_E1TH_15_8 0x14 |
| #define VCPMONITOR3_REG_E1TH_23_16 0x13 |
| #define VCPMONITOR3_REG_E1TH_31_24 0x12 |
| #define VCPMONITOR3_REG_E1TH_39_32 0x11 |
| #define VCPMONITOR3_REG_E1TH_47_40 0x10 |
| #define VCPMONITOR3_REG_E1TH_7_0 0x15 |
| #define VCPMONITOR3_REG_E1TL_15_8 0x1A |
| #define VCPMONITOR3_REG_E1TL_23_16 0x19 |
| #define VCPMONITOR3_REG_E1TL_31_24 0x18 |
| #define VCPMONITOR3_REG_E1TL_39_32 0x17 |
| #define VCPMONITOR3_REG_E1TL_47_40 0x16 |
| #define VCPMONITOR3_REG_E1TL_7_0 0x1B |
| #define VCPMONITOR3_REG_E2_15_8 0x1A |
| #define VCPMONITOR3_REG_E2_23_16 0x19 |
| #define VCPMONITOR3_REG_E2_31_24 0x18 |
| #define VCPMONITOR3_REG_E2_39_32 0x17 |
| #define VCPMONITOR3_REG_E2_47_40 0x16 |
| #define VCPMONITOR3_REG_E2_7_0 0x1B |
| #define VCPMONITOR3_REG_E2TH_15_8 0x34 |
| #define VCPMONITOR3_REG_E2TH_23_16 0x33 |
| #define VCPMONITOR3_REG_E2TH_31_24 0x32 |
| #define VCPMONITOR3_REG_E2TH_39_32 0x31 |
| #define VCPMONITOR3_REG_E2TH_47_40 0x30 |
| #define VCPMONITOR3_REG_E2TH_7_0 0x35 |
| #define VCPMONITOR3_REG_E2TL_15_8 0x3A |
| #define VCPMONITOR3_REG_E2TL_23_16 0x39 |
| #define VCPMONITOR3_REG_E2TL_31_24 0x38 |
| #define VCPMONITOR3_REG_E2TL_39_32 0x37 |
| #define VCPMONITOR3_REG_E2TL_47_40 0x36 |
| #define VCPMONITOR3_REG_E2TL_7_0 0x3B |
| #define VCPMONITOR3_REG_GPIOSTATCL 0x67 |
VCP Monitor 3 description register.
Specified register for description of VCP Monitor 3 Click driver.
| #define VCPMONITOR3_REG_I_15_8 0x91 |
| #define VCPMONITOR3_REG_I_23_16 0x90 |
| #define VCPMONITOR3_REG_I_7_0 0x92 |
| #define VCPMONITOR3_REG_IH1_15_8 0xB1 |
| #define VCPMONITOR3_REG_IH1_23_16 0xB0 |
| #define VCPMONITOR3_REG_IH1_7_0 0xB2 |
| #define VCPMONITOR3_REG_IH2_15_8 0xB4 |
| #define VCPMONITOR3_REG_IH2_23_16 0xB3 |
| #define VCPMONITOR3_REG_IH2_7_0 0xB5 |
| #define VCPMONITOR3_REG_IH3_15_8 0xB7 |
| #define VCPMONITOR3_REG_IH3_23_16 0xB6 |
| #define VCPMONITOR3_REG_IH3_7_0 0xB8 |
| #define VCPMONITOR3_REG_IH4_15_8 0xBA |
| #define VCPMONITOR3_REG_IH4_23_16 0xB9 |
| #define VCPMONITOR3_REG_IH4_7_0 0xBB |
| #define VCPMONITOR3_REG_IH5_15_8 0xBD |
| #define VCPMONITOR3_REG_IH5_23_16 0xBC |
| #define VCPMONITOR3_REG_IH5_7_0 0xBE |
| #define VCPMONITOR3_REG_IMAX_15_8 0x40 |
| #define VCPMONITOR3_REG_IMAX_7_0 0x41 |
| #define VCPMONITOR3_REG_IMIN_15_8 0x42 |
| #define VCPMONITOR3_REG_IMIN_7_0 0x43 |
| #define VCPMONITOR3_REG_ITH_15_8 0x80 |
| #define VCPMONITOR3_REG_ITH_7_0 0x81 |
| #define VCPMONITOR3_REG_ITL_15_8 0x82 |
| #define VCPMONITOR3_REG_ITL_7_0 0x83 |
| #define VCPMONITOR3_REG_OPCTL 0xF0 |
| #define VCPMONITOR3_REG_P_15_8 0x94 |
| #define VCPMONITOR3_REG_P_23_16 0x93 |
| #define VCPMONITOR3_REG_P_7_0 0x95 |
| #define VCPMONITOR3_REG_PGCTL 0xFF |
| #define VCPMONITOR3_REG_PMAX_15_8 0x44 |
| #define VCPMONITOR3_REG_PMAX_7_0 0x45 |
| #define VCPMONITOR3_REG_PMIN_15_8 0x46 |
| #define VCPMONITOR3_REG_PMIN_7_0 0x47 |
| #define VCPMONITOR3_REG_PTH_15_8 0x84 |
| #define VCPMONITOR3_REG_PTH_7_0 0x85 |
| #define VCPMONITOR3_REG_PTL_15_8 0x86 |
| #define VCPMONITOR3_REG_PTL_7_0 0x87 |
| #define VCPMONITOR3_REG_STATC 0x83 |
| #define VCPMONITOR3_REG_STATCEOF 0x85 |
| #define VCPMONITOR3_REG_STATCEOFM 0x8D |
| #define VCPMONITOR3_REG_STATCM 0x8B |
| #define VCPMONITOR3_REG_STATE 0x84 |
| #define VCPMONITOR3_REG_STATEM 0x8C |
| #define VCPMONITOR3_REG_STATIP 0x82 |
| #define VCPMONITOR3_REG_STATIPM 0x8A |
| #define VCPMONITOR3_REG_STATTB 0x86 |
| #define VCPMONITOR3_REG_STATTBM 0x8E |
| #define VCPMONITOR3_REG_STATUS 0x80 |
| #define VCPMONITOR3_REG_STATUSM 0x88 |
| #define VCPMONITOR3_REG_STATVDVCC 0x87 |
| #define VCPMONITOR3_REG_STATVDVCCM 0x8F |
| #define VCPMONITOR3_REG_STATVT 0x81 |
| #define VCPMONITOR3_REG_STATVTM 0x89 |
| #define VCPMONITOR3_REG_TB1_15_8 0x0E |
| #define VCPMONITOR3_REG_TB1_23_16 0x0D |
| #define VCPMONITOR3_REG_TB1_31_24 0x0C |
| #define VCPMONITOR3_REG_TB1_7_0 0x0F |
| #define VCPMONITOR3_REG_TB1TH_15_8 0x0E |
| #define VCPMONITOR3_REG_TB1TH_23_16 0x0D |
| #define VCPMONITOR3_REG_TB1TH_31_24 0x0C |
| #define VCPMONITOR3_REG_TB1TH_7_0 0x0F |
| #define VCPMONITOR3_REG_TB2_15_8 0x1E |
| #define VCPMONITOR3_REG_TB2_23_16 0x1D |
| #define VCPMONITOR3_REG_TB2_31_24 0x1C |
| #define VCPMONITOR3_REG_TB2_7_0 0x1F |
| #define VCPMONITOR3_REG_TB2TH_15_8 0x2E |
| #define VCPMONITOR3_REG_TB2TH_23_16 0x2D |
| #define VCPMONITOR3_REG_TB2TH_31_24 0x2C |
| #define VCPMONITOR3_REG_TB2TH_7_0 0x2F |
| #define VCPMONITOR3_REG_TBCTL 0xE9 |
| #define VCPMONITOR3_REG_TEMP_15_8 0xA2 |
| #define VCPMONITOR3_REG_TEMP_7_0 0xA3 |
| #define VCPMONITOR3_REG_TEMPMAX_15_8 0x54 |
| #define VCPMONITOR3_REG_TEMPMAX_7_0 0x55 |
| #define VCPMONITOR3_REG_TEMPMIN_15_8 0x56 |
| #define VCPMONITOR3_REG_TEMPMIN_7_0 0x57 |
| #define VCPMONITOR3_REG_TEMPTFANH_15_8 0x9C |
| #define VCPMONITOR3_REG_TEMPTFANH_7_0 0x9D |
| #define VCPMONITOR3_REG_TEMPTFANL_15_8 0x9E |
| #define VCPMONITOR3_REG_TEMPTFANL_7_0 0x9F |
| #define VCPMONITOR3_REG_TEMPTH_15_8 0x94 |
| #define VCPMONITOR3_REG_TEMPTH_7_0 0x95 |
| #define VCPMONITOR3_REG_TEMPTL_15_8 0x96 |
| #define VCPMONITOR3_REG_TEMPTL_7_0 0x97 |
| #define VCPMONITOR3_REG_V_15_8 0xA0 |
| #define VCPMONITOR3_REG_V_7_0 0xA1 |
| #define VCPMONITOR3_REG_VDVCC_15_8 0xA4 |
| #define VCPMONITOR3_REG_VDVCC_7_0 0xA5 |
| #define VCPMONITOR3_REG_VDVCCMAX_15_8 0x58 |
| #define VCPMONITOR3_REG_VDVCCMAX_7_0 0x59 |
| #define VCPMONITOR3_REG_VDVCCMIN_15_8 0x5A |
| #define VCPMONITOR3_REG_VDVCCMIN_7_0 0x5B |
| #define VCPMONITOR3_REG_VDVCCTH_15_8 0x98 |
| #define VCPMONITOR3_REG_VDVCCTH_7_0 0x99 |
| #define VCPMONITOR3_REG_VDVCCTL_15_8 0x9A |
| #define VCPMONITOR3_REG_VDVCCTL_7_0 0x9B |
| #define VCPMONITOR3_REG_VMAX_15_8 0x50 |
| #define VCPMONITOR3_REG_VMAX_7_0 0x51 |
| #define VCPMONITOR3_REG_VMIN_15_8 0x52 |
| #define VCPMONITOR3_REG_VMIN_7_0 0x53 |
| #define VCPMONITOR3_REG_VTH_15_8 0x90 |
| #define VCPMONITOR3_REG_VTH_7_0 0x91 |
| #define VCPMONITOR3_REG_VTL_15_8 0x92 |
| #define VCPMONITOR3_REG_VTL_7_0 0x93 |