accel21.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef ACCEL21_H
#define ACCEL21_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define ACCEL21_REG_STATUS_AUX               0x07
#define ACCEL21_REG_OUT_TEMP_L               0x0C
#define ACCEL21_REG_OUT_TEMP_H               0x0D
#define ACCEL21_REG_INT_COUNTER              0x0E
#define ACCEL21_REG_WHO_AM_I                 0x0F
#define ACCEL21_REG_TEMP_CFG                 0x1F
#define ACCEL21_REG_CTRL_REG1                0x20
#define ACCEL21_REG_CTRL_REG2                0x21
#define ACCEL21_REG_CTRL_REG3                0x22
#define ACCEL21_REG_CTRL_REG4                0x23
#define ACCEL21_REG_CTRL_REG5                0x24
#define ACCEL21_REG_CTRL_REG6                0x25
#define ACCEL21_REG_REFERENCE_DATACAPTURE    0x26
#define ACCEL21_REG_STATUS                   0x27
#define ACCEL21_REG_OUT_X_L                  0x28
#define ACCEL21_REG_OUT_X_H                  0x29
#define ACCEL21_REG_OUT_Y_L                  0x2A
#define ACCEL21_REG_OUT_Y_H                  0x2B
#define ACCEL21_REG_OUT_Z_L                  0x2C
#define ACCEL21_REG_OUT_Z_H                  0x2D
#define ACCEL21_REG_FIFO_CTRL                0x2E
#define ACCEL21_REG_FIFO_SRC                 0x2F
#define ACCEL21_REG_INT1_CFG                 0x30
#define ACCEL21_REG_INT1_SRC                 0x31
#define ACCEL21_REG_INT1_THS                 0x32
#define ACCEL21_REG_INT1_DURATION            0x33
#define ACCEL21_REG_INT2_CFG                 0x34
#define ACCEL21_REG_INT2_SRC                 0x35
#define ACCEL21_REG_INT2_THS                 0x36
#define ACCEL21_REG_INT2_DURATION            0x37
#define ACCEL21_REG_CLICK_CFG                0x38
#define ACCEL21_REG_CLICK_SRC                0x39
#define ACCEL21_REG_CLICK_THS                0x3A
#define ACCEL21_REG_TIME_LIMIT               0x3B
#define ACCEL21_REG_TIME_LATENCY             0x3C
#define ACCEL21_REG_ACT_THS                  0x3E
#define ACCEL21_REG_ACT_DUR                  0x3F
 
 // accel21_reg
 
#define ACCEL21_STATUS_AUX_TDA_BIT_MASK       0x04
#define ACCEL21_STATUS_AUX_TOR_BIT_MASK       0x40
 
#define ACCEL21_TEMP_CFG_TEMP_EN_BIT_MASK     0xC0
 
#define ACCEL21_WHO_AM_I                      0x33
 
#define ACCEL21_OP_MODE_NORMAL                0x00
#define ACCEL21_OP_MODE_HIGH_RESOLUTION       0x01
#define ACCEL21_OP_MODE_LOW_POWER             0x02
#define ACCEL21_OP_MODE_NOT_ALLOWED           0x02
#define ACCEL21_CTRL_OP_MODE_BIT_MASK         0x08
 
#define ACCEL21_STATUS_NEW_DATA_AVL_BIT_MASK  0x08
#define ACCEL21_STATUS_DATA_OVERRUN_BIT_MASK  0x80
 
#define ACCEL21_CTRL_REG1_ODR_PWR_DOWN_MODE   0x00
#define ACCEL21_CTRL_REG1_ODR_1_Hz            0x01
#define ACCEL21_CTRL_REG1_ODR_10_Hz           0x02
#define ACCEL21_CTRL_REG1_ODR_25_Hz           0x03
#define ACCEL21_CTRL_REG1_ODR_50_Hz           0x04
#define ACCEL21_CTRL_REG1_ODR_100_Hz          0x05
#define ACCEL21_CTRL_REG1_ODR_200_Hz          0x06
#define ACCEL21_CTRL_REG1_ODR_400_Hz          0x07
#define ACCEL21_CTRL_REG1_ODR_1_62_kHz        0x08
#define ACCEL21_CTRL_REG1_ODR_1_344_kHz       0x09
#define ACCEL21_CTRL_REG1_ODR_BIT_MASK        0xF0
 
#define ACCEL21_CTRL_REG1_LPEN_DISABLE        0x00
#define ACCEL21_CTRL_REG1_LPEN_ENABLE         0x01
#define ACCEL21_CTRL_REG1_LPEN_BIT_MASK       0x08
 
#define ACCEL21_CTRL_REG1_XYZEN_DISABLE       0x00
#define ACCEL21_CTRL_REG1_XYZEN_ENABLE        0x01
#define ACCEL21_CTRL_REG1_ZEN_BIT_MASK        0x04
#define ACCEL21_CTRL_REG1_YEN_BIT_MASK        0x02
#define ACCEL21_CTRL_REG1_XEN_BIT_MASK        0x01
 
#define ACCEL21_CTRL_REG4_BDU_CONTIN_UPDATE   0x00
#define ACCEL21_CTRL_REG4_BDU_NOT_UPDATE      0x01
#define ACCEL21_CTRL_REG4_BDU_BIT_MASK        0x80
 
#define ACCEL21_CTRL_REG4_FS_2_g              0x00
#define ACCEL21_CTRL_REG4_FS_4_g              0x01
#define ACCEL21_CTRL_REG4_FS_10_g             0x02
#define ACCEL21_CTRL_REG4_FS_16_g             0x03
#define ACCEL21_CTRL_REG4_FS_BIT_MASK         0x30
 
#define ACCEL21_CTRL_REG4_HR_DISABLE          0x00
#define ACCEL21_CTRL_REG4_HR_ENABLE           0x01
#define ACCEL21_CTRL_REG1_HR_BIT_MASK         0x08
 
#define ACCEL21_DEVICE_ADDRESS_GND            0x18
#define ACCEL21_DEVICE_ADDRESS_VCC            0x19
 
#define ACCEL21_SET_DATA_SAMPLE_EDGE      SET_SPI_DATA_SAMPLE_EDGE
#define ACCEL21_SET_DATA_SAMPLE_MIDDLE    SET_SPI_DATA_SAMPLE_MIDDLE
 
 // accel21_set
 
#define ACCEL21_MAP_MIKROBUS( cfg, mikrobus )       \
    cfg.scl  = MIKROBUS( mikrobus, MIKROBUS_SCL );  \
    cfg.sda  = MIKROBUS( mikrobus, MIKROBUS_SDA );  \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK );  \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS );   \
    cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST );   \
    cfg.in1 = MIKROBUS( mikrobus, MIKROBUS_PWM );   \
    cfg.in2 = MIKROBUS( mikrobus, MIKROBUS_INT )
#define ACCEL21_MAP_MIKROBUS( cfg, mikrobus )       \ …
 
 // accel21_map
 // accel21
 
typedef enum
{
    ACCEL21_DRV_SEL_SPI,      
    ACCEL21_DRV_SEL_I2C       
} accel21_drv_t;
typedef enum {…};
 
typedef err_t ( *accel21_master_io_t )( struct accel21_s*, uint8_t, uint8_t*, uint8_t ); 
typedef struct accel21_s
{
    digital_out_t rst;   
    digital_in_t in1;    
    digital_in_t in2;    
    i2c_master_t i2c;    
    spi_master_t spi;    
    uint8_t      slave_address;    
    pin_name_t   chip_select;      
    accel21_drv_t drv_sel;         
    accel21_master_io_t write_f;    
    accel21_master_io_t read_f;     
} accel21_t;
typedef struct accel21_s {…};
 
typedef struct
{
    pin_name_t scl;     
    pin_name_t sda;     
    pin_name_t miso;    
    pin_name_t mosi;    
    pin_name_t sck;     
    pin_name_t cs;      
    pin_name_t rst;     
    pin_name_t in1;     
    pin_name_t in2;     
    uint32_t   i2c_speed;       
    uint8_t    i2c_address;     
    uint32_t                          spi_speed;    
    spi_master_mode_t                 spi_mode;     
    spi_master_chip_select_polarity_t cs_polarity;  
    accel21_drv_t drv_sel;    
} accel21_cfg_t;
typedef struct {…};
 
typedef enum
{
    ACCEL21_OK = 0,
    ACCEL21_ERROR = -1
 
} accel21_return_value_t;
typedef enum {…};
 
typedef struct 
{
    int16_t x;
    int16_t y;
    int16_t z;
 
} accel21_axis_t;
typedef struct  {…};
 
typedef struct 
{
    uint8_t odr;
    uint8_t lpen;
    uint8_t zen;
    uint8_t yen;
    uint8_t xen;
    uint8_t bdu;
    uint8_t fs;
    uint8_t hr;
 
} accel21_config_t;
typedef struct  {…};
 
void accel21_cfg_setup ( accel21_cfg_t *cfg );
 
void accel21_drv_interface_selection ( accel21_cfg_t *cfg, accel21_drv_t drv_sel );
 
err_t accel21_init ( accel21_t *ctx, accel21_cfg_t *cfg );
 
err_t accel21_default_cfg ( accel21_t *ctx );
 
err_t accel21_generic_write ( accel21_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );
 
err_t accel21_generic_read ( accel21_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );
 
err_t accel21_get_temp_status ( accel21_t *ctx, uint8_t *temp_status );
 
err_t accel21_check_temp_data_ready ( accel21_t *ctx, uint8_t *temp_data_ready );
 
err_t accel21_enable_temp_data ( accel21_t *ctx );
 
err_t accel21_check_temp_data_ovr ( accel21_t *ctx, uint8_t *temp_data_ovr );
 
err_t accel21_get_temp_data ( accel21_t *ctx, int16_t *temp_data );
 
err_t accel21_get_temperature ( accel21_t *ctx, float *temperature );
 
err_t accel21_set_op_mode ( accel21_t *ctx, uint8_t op_mode );
 
err_t accel21_get_op_mode ( accel21_t *ctx, uint8_t *op_mode );
 
err_t accel21_get_device_id ( accel21_t *ctx, uint8_t *device_id );
 
err_t accel21_check_id ( accel21_t *ctx );
 
err_t accel21_get_status ( accel21_t *ctx, uint8_t *status );
 
err_t accel21_check_data_overrun ( accel21_t *ctx, uint8_t *data_overrun );
 
err_t accel21_check_new_data ( accel21_t *ctx, uint8_t *new_data_avl );
 
err_t accel21_set_config ( accel21_t *ctx, accel21_config_t config );
 
err_t accel21_get_axis ( accel21_t *ctx, accel21_axis_t *acc_axis );
 
uint8_t accel21_get_in1_pin ( accel21_t *ctx );
 
uint8_t accel21_get_in2_pin ( accel21_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif // ACCEL21_H
 
 // accel21
 
// ------------------------------------------------------------------------ END