adc9.h

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/*
 * MikroSDK - MikroE Software Development Kit
 * Copyright© 2020 MikroElektronika d.o.o.
 * 
 * Permission is hereby granted, free of charge, to any person 
 * obtaining a copy of this software and associated documentation 
 * files (the "Software"), to deal in the Software without restriction, 
 * including without limitation the rights to use, copy, modify, merge, 
 * publish, distribute, sublicense, and/or sell copies of the Software, 
 * and to permit persons to whom the Software is furnished to do so, 
 * subject to the following conditions:
 * 
 * The above copyright notice and this permission notice shall be 
 * included in all copies or substantial portions of the Software.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 
 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE 
 * OR OTHER DEALINGS IN THE SOFTWARE. 
 */
 
// ----------------------------------------------------------------------------
 
#ifndef ADC9_H
#define ADC9_H
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
 
 
// -------------------------------------------------------------- PUBLIC MACROS 
#define ADC9_MAP_MIKROBUS( cfg, mikrobus ) \
   cfg.miso    = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
   cfg.mosi    = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
   cfg.sck     = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
   cfg.cs      = MIKROBUS( mikrobus, MIKROBUS_CS ); \
   cfg.mck     = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
   cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
#define ADC9_RETVAL  uint8_t
 
#define ADC9_OK           0x00
#define ADC9_INIT_ERROR   0xFF
#define ADC9_DEVICE_ADR                   0x01
#define ADC9_CMD_DONT_CARE                0x00
#define ADC9_CMD_STAT_READ                0x01
#define ADC9_CMD_INC_WRITE                0x02
#define ADC9_CMD_INC_READ                 0x03
#define ADC9_REG_ADC_DATA                 0x00
#define ADC9_REG_CFG_0                    0x01
#define ADC9_REG_CFG_1                    0x02
#define ADC9_REG_CFG_2                    0x03
#define ADC9_REG_CFG_3                    0x04
#define ADC9_REG_IRQ                      0x05
#define ADC9_REG_MUX                      0x06
#define ADC9_REG_SCAN                     0x07
#define ADC9_REG_TIMER                    0x08
#define ADC9_REG_OFFSET_CAL               0x09
#define ADC9_REG_GAIN_CAL                 0x0A
#define ADC9_RSV_REG_W_A                  0x0B
#define ADC9_REG_LOCK                     0x0D
#define ADC9_RSV_REG                      0x0E
#define ADC9_REG_CRC_CFG                  0x0F
#define ADC9_CFG_0_VREF_SEL_0             0x00
#define ADC9_CFG_0_VREF_SEL_1             0x40
#define ADC9_CFG_0_VREF_SEL_2             0x80
#define ADC9_CFG_0_VREF_SEL_3             0xC0
 
#define ADC9_CFG_0_CLK_SEL_0              0x00
#define ADC9_CFG_0_CLK_SEL_1              0x10
#define ADC9_CFG_0_CLK_SEL_2              0x20
#define ADC9_CFG_0_CLK_SEL_3              0x30
 
#define ADC9_CFG_0_CS_SEL_0               0x00
#define ADC9_CFG_0_CS_SEL_1               0x04
#define ADC9_CFG_0_CS_SEL_2               0x08
#define ADC9_CFG_0_CS_SEL_3               0x0C
 
#define ADC9_CFG_0_MODE_SHD_DEF           0x00
#define ADC9_CFG_0_MODE_SHD               0x01
#define ADC9_CFG_0_MODE_STANDBY           0x02
#define ADC9_CFG_0_MODE_CONV              0x03
#define ADC9_CFG_1_PRE_1                  0x00
#define ADC9_CFG_1_PRE_2                  0x40
#define ADC9_CFG_1_PRE_4                  0x80
#define ADC9_CFG_1_PRE_8                  0xC0
#define ADC9_CFG_1_OSR_98304              0x3C
#define ADC9_CFG_1_OSR_81920              0x38
#define ADC9_CFG_1_OSR_49152              0x34
#define ADC9_CFG_1_OSR_40960              0x30
#define ADC9_CFG_1_OSR_24576              0x2C
#define ADC9_CFG_1_OSR_20480              0x28
#define ADC9_CFG_1_OSR_16384              0x24
#define ADC9_CFG_1_OSR_8192               0x20
#define ADC9_CFG_1_OSR_4096               0x1C
#define ADC9_CFG_1_OSR_2048               0x18
#define ADC9_CFG_1_OSR_1024               0x14
#define ADC9_CFG_1_OSR_512                0x10
#define ADC9_CFG_1_OSR_256                0x0C
#define ADC9_CFG_1_OSR_128                0x08
#define ADC9_CFG_1_OSR_64                 0x04
#define ADC9_CFG_1_OSR_32                 0x00
 
#define ADC9_CFG_1_DITHER_MAX             0x03
#define ADC9_CFG_1_DITHER_MED             0x02
#define ADC9_CFG_1_DITHER_MIN             0x01
#define ADC9_CFG_1_DITHER_DEF             0x00
#define ADC9_CFG_2_BOOST_X_2              0xC0
#define ADC9_CFG_2_BOOST_X_1              0x80
#define ADC9_CFG_2_BOOST_X_066            0x40
#define ADC9_CFG_2_BOOST_X_05             0x00
 
#define ADC9_CFG_2_GAIN_X_64              0x38
#define ADC9_CFG_2_GAIN_X_32              0x30
#define ADC9_CFG_2_GAIN_X_16              0x28
#define ADC9_CFG_2_GAIN_X_8               0x20
#define ADC9_CFG_2_GAIN_X_4               0x18
#define ADC9_CFG_2_GAIN_X_2               0x10
#define ADC9_CFG_2_GAIN_X_1               0x08
#define ADC9_CFG_2_GAIN_X_033             0x00
 
#define ADC9_CFG_2_AZ_MUX_EN              0x04
#define ADC9_CFG_2_AZ_MUX_DIS             0x00
#define ADC9_CFG_2_AZ_VREF_EN             0x02
#define ADC9_CFG_2_AZ_VREF_DIS            0x00
 
#define ADC9_CFG_2_AZ_FREQ_HIGH           0x01
#define ADC9_CFG_2_AZ_FREQ_LOW            0x00
#define ADC9_CFG_3_CONV_MODE_CONT         0xC0
#define ADC9_CFG_3_CONV_MODE_STANDBY      0x80
#define ADC9_CFG_3_CONV_MODE_SHD          0x40
#define ADC9_CFG_3_CONV_MODE_SHD0         0x00
 
#define ADC9_CFG_3_DATA_FORMAT_CH_ADC     0x30
#define ADC9_CFG_3_DATA_FORMAT_SIGN_ADC   0x20
#define ADC9_CFG_3_DATA_FORMAT_LEFT_JUST  0x10
#define ADC9_CFG_3_DATA_FORMAT_DEF        0x00
 
#define ADC9_CFG_3_CRC_FORMAT_32          0x08
#define ADC9_CFG_3_CRC_FORMAT_16          0x00
 
#define ADC9_CFG_3_CRC_COM_EN             0x04
#define ADC9_CFG_3_CRC_COM_DIS            0x00
 
#define ADC9_CFG_3_CRC_OFF_CAL_EN         0x02
#define ADC9_CFG_3_CRC_OFF_CAL_DIS        0x00
#define ADC9_CFG_3_CRC_GAIN_CAL_EN        0x01
#define ADC9_CFG_3_CRC_GAIN_CAL_DIS       0x00
#define ADC9_IRQ_MODE_MDAT                0x08
#define ADC9_IRQ_MODE_IRQ                 0x00
#define ADC9_IRQ_MODE_LOGIC_HIGH          0x04
#define ADC9_IRQ_MODE_HIGH_Z              0x00
#define ADC9_IRQ_FASTCMD_EN               0x02
#define ADC9_IRQ_FASTCMD_DIS              0x00
#define ADC9_IRQ_STP_EN                   0x01
#define ADC9_IRQ_STP_DIS                  0x00
#define ADC9_MUX_VIN_POS_NO_IN            0xF0
#define ADC9_MUX_VIN_POS_VCM              0xE0
#define ADC9_MUX_VIN_POS_TEMP             0xD0
#define ADC9_MUX_VIN_POS_VREF_EXT_MINUS   0xC0
#define ADC9_MUX_VIN_POS_VREF_EXT_PLUS    0xB0
#define ADC9_MUX_VIN_POS_VREF_INT         0xA0
#define ADC9_MUX_VIN_POS_AVDD             0x90
#define ADC9_MUX_VIN_POS_VSS              0x80
#define ADC9_MUX_VIN_POS_CH7              0x70
#define ADC9_MUX_VIN_POS_CH6              0x60
#define ADC9_MUX_VIN_POS_CH5              0x50
#define ADC9_MUX_VIN_POS_CH4              0x40
#define ADC9_MUX_VIN_POS_CH3              0x30
#define ADC9_MUX_VIN_POS_CH2              0x20
#define ADC9_MUX_VIN_POS_CH1              0x10
#define ADC9_MUX_VIN_POS_CH0              0x00
#define ADC9_MUX_VIN_NEG_NO_IN            0x0F
#define ADC9_MUX_VIN_NEG_VCM              0x0E
#define ADC9_MUX_VIN_NEG_TEMP             0x0D
#define ADC9_MUX_VIN_NEG_VREF_EXT_MINUS   0x0C
#define ADC9_MUX_VIN_NEG_VREF_EXT_PLUS    0x0B
#define ADC9_MUX_VIN_NEG_VREF_INT         0x0A
#define ADC9_MUX_VIN_NEG_AVDD             0x09
#define ADC9_MUX_VIN_NEG_VSS              0x08
#define ADC9_MUX_VIN_NEG_CH7              0x07
#define ADC9_MUX_VIN_NEG_CH6              0x06
#define ADC9_MUX_VIN_NEG_CH5              0x05
#define ADC9_MUX_VIN_NEG_CH4              0x04
#define ADC9_MUX_VIN_NEG_CH3              0x03
#define ADC9_MUX_VIN_NEG_CH2              0x02
#define ADC9_MUX_VIN_NEG_CH1              0x01
#define ADC9_MUX_VIN_NEG_CH0              0x00
#define ADC9_SCAN_DLY_DM_CLK_X_512        0x00E00000
#define ADC9_SCAN_DLY_DM_CLK_X_256        0x00C00000
#define ADC9_SCAN_DLY_DM_CLK_X_128        0x00A00000
#define ADC9_SCAN_DLY_DM_CLK_X_64         0x00800000
#define ADC9_SCAN_DLY_DM_CLK_X_32         0x00600000
#define ADC9_SCAN_DLY_DM_CLK_X_16         0x00400000
#define ADC9_SCAN_DLY_DM_CLK_X_8          0x00200000
#define ADC9_SCAN_DLY_NO_DELAY            0x00000000
 
#define ADC9_SCAN_PSAV_VREF_OFF           0x00100000
#define ADC9_SCAN_PSAV_VREF_ON            0x00000000
 
#define ADC9_SCAN_OFFSET                  0x00008000
#define ADC9_SCAN_VREF                    0x00004000
#define ADC9_SCAN_AVDD                    0x00002000
#define ADC9_SCAN_TEMP                    0x00001000
#define ADC9_SCAN_DIFF_D                  0x00000800
#define ADC9_SCAN_DIFF_C                  0x00000400
#define ADC9_SCAN_DIFF_B                  0x00000200
#define ADC9_SCAN_DIFF_A                  0x00000100
#define ADC9_SCAN_CH7                     0x00000080
#define ADC9_SCAN_CH6                     0x00000040
#define ADC9_SCAN_CH5                     0x00000020
#define ADC9_SCAN_CH4                     0x00000010
#define ADC9_SCAN_CH3                     0x00000008
#define ADC9_SCAN_CH2                     0x00000004
#define ADC9_SCAN_CH1                     0x00000002
#define ADC9_SCAN_CH0                     0x00000001
#define ADC9_TIMER_DLY_DMCLK_X_16777215   0x00FFFFFF
#define ADC9_TIMER_DLY_DMCLK_X_8388607    0x007FFFFF
#define ADC9_TIMER_DLY_DMCLK_X_4194303    0x003FFFFF
#define ADC9_TIMER_DLY_DMCLK_X_2097151    0x001FFFFF
#define ADC9_TIMER_DLY_DMCLK_X_1048575    0x000FFFFF
#define ADC9_TIMER_DLY_DMCLK_X_524287     0x0007FFFF
#define ADC9_TIMER_DLY_DMCLK_X_262143     0x0003FFFF
#define ADC9_TIMER_DLY_DMCLK_X_131071     0x0001FFFF
#define ADC9_TIMER_DLY_DMCLK_X_65535      0x0000FFFF
#define ADC9_TIMER_DLY_DMCLK_X_32767      0x00007FFF
#define ADC9_TIMER_DLY_DMCLK_X_16383      0x00003FFF
#define ADC9_TIMER_DLY_DMCLK_X_8191       0x00001FFF
#define ADC9_TIMER_DLY_DMCLK_X_4095       0x00000FFF
#define ADC9_TIMER_DLY_DMCLK_X_2047       0x000007FF
#define ADC9_TIMER_DLY_DMCLK_X_1023       0x000003FF
#define ADC9_TIMER_DLY_DMCLK_X_511        0x000001FF
#define ADC9_TIMER_DLY_DMCLK_X_255        0x000000FF
#define ADC9_TIMER_DLY_DMCLK_X_127        0x0000007F
#define ADC9_TIMER_DLY_DMCLK_X_63         0x0000003F
#define ADC9_TIMER_DLY_DMCLK_X_31         0x0000001F
#define ADC9_TIMER_DLY_DMCLK_X_15         0x0000000F
#define ADC9_TIMER_DLY_DMCLK_X_2          0x00000002
#define ADC9_TIMER_DLY_DMCLK_X_1          0x00000001
#define ADC9_TIMER_DLY_NO_DELAY           0x00000000
#define ADC9_FAST_CMD_ADC_CONV_START      0x28
#define ADC9_FAST_CMD_ADC_STANDBY_MODE    0x2C
#define ADC9_FAST_CMD_ADC_SHUTDOWN_MODE   0x30
#define ADC9_FAST_CMD_FULL_SHUTDOWN_MODE  0x34
#define ADC9_FAST_CMD_DEV_FULL_RESET      0x38
#define ADC9_CALC_COEF                    8388608
 // End group macro 
// --------------------------------------------------------------- PUBLIC TYPES
typedef struct
{
    // Output pins 
 
    digital_out_t mck;
    digital_out_t cs;
 
    // Input pins 
 
    digital_in_t int_pin;
    
    // Modules 
 
    spi_master_t spi;
    pin_name_t chip_select;
 
} adc9_t;
 
typedef struct
{
    // static variable 
    uint8_t dev_adr; 
    uint8_t reg;
    uint8_t cmd; 
 
} adc9_rw_t;
 
typedef struct
{
    // Communication gpio pins 
 
    pin_name_t miso;
    pin_name_t mosi;
    pin_name_t sck;
    pin_name_t cs;
 
    // Additional gpio pins 
 
    pin_name_t mck;
    pin_name_t int_pin;
 
    // static variable 
 
    uint32_t spi_speed;
    uint8_t spi_mode;
    spi_master_chip_select_polarity_t cs_polarity;
 
} adc9_cfg_t;
 
 // End types group
// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
 
#ifdef __cplusplus
extern "C"{
#endif
 
void adc9_cfg_setup ( adc9_cfg_t *cfg );
 
ADC9_RETVAL adc9_init ( adc9_t *ctx, adc9_cfg_t *cfg );
 
void adc9_default_cfg ( adc9_t *ctx, adc9_rw_t *rw );
 
void adc9_generic_transfer 
( 
    adc9_t *ctx, 
    uint8_t *wr_buf, 
    uint16_t wr_len, 
    uint8_t *rd_buf, 
    uint16_t rd_len 
);
 
uint8_t adc9_write_fast_cmd ( adc9_t *ctx, adc9_rw_t *rw );
 
uint8_t adc9_write_u8 (  adc9_t *ctx, adc9_rw_t *rw, uint8_t wr_data );
 
uint8_t adc9_read_u8 (  adc9_t *ctx, adc9_rw_t *rw, uint8_t *rd_data );
 
uint8_t adc9_write_u16 ( adc9_t *ctx, adc9_rw_t *rw, uint16_t wr_data );
 
uint8_t adc9_read_u16 ( adc9_t *ctx, adc9_rw_t *rw, uint16_t *rd_data );
 
uint8_t adc9_write_u24 ( adc9_t *ctx, adc9_rw_t *rw, uint32_t wr_data );
 
uint8_t adc9_read_u24 (  adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data );
 
uint8_t adc9_read_u32 (  adc9_t *ctx, adc9_rw_t *rw, uint32_t *rd_data );
 
uint8_t adc9_irq_pin_state ( adc9_t *ctx );
 
uint8_t adc9_read_def_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data );
 
uint8_t adc9_read_24_left_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *rd_data );
 
uint8_t adc9_read_sign_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val );
 
uint8_t adc9_read_chan_adc ( adc9_t *ctx, adc9_rw_t *rw, int32_t *adc_val, uint8_t *chan );
 
float adc9_volt_calc ( adc9_t *ctx, int32_t adc_val, uint16_t v_ref, uint8_t gain );
 
#ifdef __cplusplus
}
#endif
#endif  // _ADC9_H_
 
 // End public_function group
 
// ------------------------------------------------------------------------- END