42#ifdef PREINIT_SUPPORTED
46#ifdef MikroCCoreVersion
47 #if MikroCCoreVersion >= 1
52#include "drv_digital_out.h"
53#include "drv_digital_in.h"
54#include "drv_i2c_master.h"
55#include "drv_spi_master.h"
68#define C3DHALL7_MAP_MIKROBUS( cfg, mikrobus ) \
69 cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
70 cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
71 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
72 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
73 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
74 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
75 cfg.it2 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
76 cfg.rst = MIKROBUS( mikrobus, MIKROBUS_RST ); \
77 cfg.it1 = MIKROBUS( mikrobus, MIKROBUS_INT );
84#define C3DHALL7_MASTER_I2C 0
85#define C3DHALL7_MASTER_SPI 1
92#define C3DHALL7_RETVAL uint8_t
94#define C3DHALL7_OK 0x00
95#define C3DHALL7_INIT_ERROR 0xFF
102#define C3DHALL7_REG_DEVICE_ID 0x00
103#define C3DHALL7_REG_STATUS 0x10
104#define C3DHALL7_REG_ST_AXIS_X 0x11
105#define C3DHALL7_REG_ST_AXIS_Y 0x12
106#define C3DHALL7_REG_ST_AXIS_X_Y 0x13
107#define C3DHALL7_REG_ST_AXIS_Z 0x14
108#define C3DHALL7_REG_ST_AXIS_X_Z 0x15
109#define C3DHALL7_REG_ST_AXIS_Y_Z 0x16
110#define C3DHALL7_REG_ST_AXIS_X_Y_Z 0x17
111#define C3DHALL7_REG_STATUS_UP8 0x18
112#define C3DHALL7_REG_STUP8_AXIS_X 0x19
113#define C3DHALL7_REG_STUP8_AXIS_Y 0x1A
114#define C3DHALL7_REG_STUP8_AXIS_X_Y 0x1B
115#define C3DHALL7_REG_ST8UP_AXIS_Z 0x1C
116#define C3DHALL7_REG_STUP8_AXIS_X_Z 0x1D
117#define C3DHALL7_REG_STUP8_AXIS_Y_Z 0x1E
118#define C3DHALL7_REG_STUP8_AXIS_X_Y_Z 0x1F
119#define C3DHALL7_REG_INTERRUPT_SETTINGS 0x20
120#define C3DHALL7_REG_SENSOR_SETTINGS 0x21
121#define C3DHALL7_REG_THRESHOLD_1_AXIS_X 0x22
122#define C3DHALL7_REG_THRESHOLD_2_AXIS_X 0x23
123#define C3DHALL7_REG_THRESHOLD_1_AXIS_Y 0x24
124#define C3DHALL7_REG_THRESHOLD_2_AXIS_Y 0x25
125#define C3DHALL7_REG_THRESHOLD_1_AXIS_Z 0x26
126#define C3DHALL7_REG_THRESHOLD_2_AXIS_Z 0x27
127#define C3DHALL7_REG_SOFTWARE_RESET 0x30
128#define C3DHALL7_REG_I2C_DISABLE 0x31
135#define C3DHALL7_INT_DRDY_ENBALE 0x0001
136#define C3DHALL7_INT_DRDY_DISABLE 0x0000
137#define C3DHALL7_INT_SW_X1_ENABLE 0x0002
138#define C3DHALL7_INT_SW_X1_DISABLE 0x0000
139#define C3DHALL7_INT_SW_X2_ENABLE 0x0004
140#define C3DHALL7_INT_SW_X2_DISABLE 0x0000
141#define C3DHALL7_INT_SW_Y1_ENABLE 0x0008
142#define C3DHALL7_INT_SW_Y1_DISABLE 0x0000
143#define C3DHALL7_INT_SW_Y2_ENABLE 0x0010
144#define C3DHALL7_INT_SW_Y2_DISABLE 0x0000
145#define C3DHALL7_INT_SW_Z1_ENABLE 0x0020
146#define C3DHALL7_INT_SW_Z1_DISABLE 0x0000
147#define C3DHALL7_INT_SW_Z2_ENABLE 0x0040
148#define C3DHALL7_INT_SW_Z2_DISABLE 0x0000
149#define C3DHALL7_INT_ERROR_X_Y_ENABLE 0x0080
150#define C3DHALL7_INT_ERROR_X_Y_DISABLE 0x0000
151#define C3DHALL7_INT_ERROR_ADC_ENABLE 0x0100
152#define C3DHALL7_INT_ERROR_ADC_DISABLE 0x0000
153#define C3DHALL7_INT_INTERRUPT_ENABLE 0x0200
154#define C3DHALL7_INT_INTERRUPT_DISABLE 0x0000
155#define C3DHALL7_INT_ODINT_ENABLE 0x0400
156#define C3DHALL7_INT_ODINT_DISABLE 0x0000
163#define C3DHALL7_CTRL_MODE_POWER_DOWN 0x0000
164#define C3DHALL7_CTRL_MODE_SINGLE 0x0001
165#define C3DHALL7_CTRL_MODE_CONTINUOUS_0p25Hz 0x0002
166#define C3DHALL7_CTRL_MODE_CONTINUOUS_0p5Hz 0x0004
167#define C3DHALL7_CTRL_MODE_CONTINUOUS_1Hz 0x0006
168#define C3DHALL7_CTRL_MODE_CONTINUOUS_10Hz 0x0008
169#define C3DHALL7_CTRL_MODE_CONTINUOUS_20Hz 0x000A
170#define C3DHALL7_CTRL_MODE_CONTINUOUS_50Hz 0x000C
171#define C3DHALL7_CTRL_MODE_CONTINUOUS_100Hz 0x000E
172#define C3DHALL7_CTRL_SDR_LOW_NOISE_DRIVE 0x0000
173#define C3DHALL7_CTRL_SDR_LOW_POWER_DRIVE 0x0010
174#define C3DHALL7_CTRL_SMR_HIGH_SENSITIVITY 0x0000
175#define C3DHALL7_CTRL_SMR_WIDE_MEASUREMENT 0x0020
182#define C3DHALL7_DEVICE_ID 0xC0
183#define C3DHALL7_COMPANY_ID 0x48
190#define C3DHALL7_DEVICE_SLAVE_ADDR_VCC 0x0D
191#define C3DHALL7_DEVICE_SLAVE_ADDR_GND 0x0C
#define C3DHALL7_RETVAL
Definition c3dhall7.h:92
void c3dhall7_generic_read(c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic read function.
C3DHALL7_RETVAL c3dhall7_init(c3dhall7_t *ctx, c3dhall7_cfg_t *cfg)
Initialization function.
void c3dhall7_cfg_setup(c3dhall7_cfg_t *cfg)
Config Object Initialization function.
void c3dhall7_get_interrupt_state(c3dhall7_t *ctx, c3dhall7_int_state_t *state)
Interrupt state function.
void c3dhall7_default_cfg(c3dhall7_t *ctx)
Click Default Configuration function.
void c3dhall7_get_status(c3dhall7_t *ctx, c3dhall7_status_t *status)
Measurement status function.
void c3dhall7_configuration(c3dhall7_t *ctx, uint8_t reg, uint16_t data_in)
Configuration function (for ctrl register).
void c3dhall7_device_info(c3dhall7_t *ctx, c3dhall7_dev_info_t *info)
Device info function.
void c3dhall7_get_axis_data(c3dhall7_t *ctx, c3dhall7_axis_t *axis)
Get Axis data function.
void c3dhall7_device_reset(c3dhall7_t *ctx)
Hardware device reset.
void c3dhall7_generic_write(c3dhall7_t *ctx, uint8_t reg, uint8_t *data_buf, uint8_t len)
Generic write function.
void c3dhall7_software_reset(c3dhall7_t *ctx)
Software device reset.
uint8_t c3dhall7_select_t
Communication type.
Definition c3dhall7.h:204
void(* c3dhall7_master_io_t)(struct c3dhall7_s *, uint8_t, uint8_t *, uint8_t)
Master Input/Output type.
Definition c3dhall7.h:209
struct c3dhall7_s c3dhall7_t
Click ctx object definition.
Definition c3dhall7.h:289
c3dhall7_status_t status
Definition c3dhall7.h:293
int16_t z
Definition c3dhall7.h:292
int16_t x
Definition c3dhall7.h:290
int16_t y
Definition c3dhall7.h:291
Click configuration structure definition.
Definition c3dhall7.h:245
pin_name_t it2
Definition c3dhall7.h:257
uint8_t spi_mode
Definition c3dhall7.h:266
c3dhall7_select_t sel
Definition c3dhall7.h:268
uint32_t i2c_speed
Definition c3dhall7.h:263
pin_name_t it1
Definition c3dhall7.h:259
spi_master_chip_select_polarity_t cs_polarity
Definition c3dhall7.h:269
pin_name_t sck
Definition c3dhall7.h:252
pin_name_t mosi
Definition c3dhall7.h:251
uint32_t spi_speed
Definition c3dhall7.h:265
pin_name_t scl
Definition c3dhall7.h:248
pin_name_t miso
Definition c3dhall7.h:250
pin_name_t sda
Definition c3dhall7.h:249
pin_name_t rst
Definition c3dhall7.h:258
pin_name_t cs
Definition c3dhall7.h:253
uint8_t i2c_address
Definition c3dhall7.h:264
Definition c3dhall7.h:298
uint8_t company_id
Definition c3dhall7.h:299
uint8_t device_id
Definition c3dhall7.h:300
Definition c3dhall7.h:305
uint8_t interrupt_2
Definition c3dhall7.h:307
uint8_t interrupt_1
Definition c3dhall7.h:306
Click ctx object definition.
Definition c3dhall7.h:215
digital_out_t cs
Definition c3dhall7.h:219
spi_master_t spi
Definition c3dhall7.h:229
digital_in_t it2
Definition c3dhall7.h:223
c3dhall7_master_io_t write_f
Definition c3dhall7.h:235
c3dhall7_master_io_t read_f
Definition c3dhall7.h:236
i2c_master_t i2c
Definition c3dhall7.h:228
digital_out_t rst
Definition c3dhall7.h:218
uint8_t slave_address
Definition c3dhall7.h:233
c3dhall7_select_t master_sel
Definition c3dhall7.h:237
pin_name_t chip_select
Definition c3dhall7.h:234
digital_in_t it1
Definition c3dhall7.h:224
Definition c3dhall7.h:274
uint8_t err_adc
Definition c3dhall7.h:276
uint8_t sw_axis_y1
Definition c3dhall7.h:281
uint8_t sw_axis_x2
Definition c3dhall7.h:282
uint8_t err_axis_xy
Definition c3dhall7.h:277
uint8_t drdy
Definition c3dhall7.h:284
uint8_t sw_axis_y2
Definition c3dhall7.h:280
uint8_t data_overrun
Definition c3dhall7.h:275
uint8_t sw_axis_z2
Definition c3dhall7.h:278
uint8_t sw_axis_z1
Definition c3dhall7.h:279
uint8_t sw_axis_x1
Definition c3dhall7.h:283