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#define | C6DOFIMU17_REG_DEVICE_CONFIG 0x11 |
| 6DOF IMU 17 description user bank 0 register.
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#define | C6DOFIMU17_REG_DRIVE_CONFIG 0x13 |
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#define | C6DOFIMU17_REG_INT_CONFIG 0x14 |
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#define | C6DOFIMU17_REG_FIFO_CONFIG 0x16 |
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#define | C6DOFIMU17_REG_TEMP_DATA1_UI 0x1D |
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#define | C6DOFIMU17_REG_TEMP_DATA0_UI 0x1E |
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#define | C6DOFIMU17_REG_ACCEL_DATA_X1_UI 0x1F |
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#define | C6DOFIMU17_REG_ACCEL_DATA_X0_UI 0x20 |
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#define | C6DOFIMU17_REG_ACCEL_DATA_Y1_UI 0x21 |
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#define | C6DOFIMU17_REG_ACCEL_DATA_Y0_UI 0x22 |
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#define | C6DOFIMU17_REG_ACCEL_DATA_Z1_UI 0x23 |
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#define | C6DOFIMU17_REG_ACCEL_DATA_Z0_UI 0x24 |
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#define | C6DOFIMU17_REG_GYRO_DATA_X1_UI 0x25 |
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#define | C6DOFIMU17_REG_GYRO_DATA_X0_UI 0x26 |
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#define | C6DOFIMU17_REG_GYRO_DATA_Y1_UI 0x27 |
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#define | C6DOFIMU17_REG_GYRO_DATA_Y0_UI 0x28 |
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#define | C6DOFIMU17_REG_GYRO_DATA_Z1_UI 0x29 |
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#define | C6DOFIMU17_REG_GYRO_DATA_Z0_UI 0x2A |
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#define | C6DOFIMU17_REG_TMST_FSYNCH 0x2B |
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#define | C6DOFIMU17_REG_TMST_FSYNCL 0x2C |
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#define | C6DOFIMU17_REG_INT_STATUS 0x2D |
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#define | C6DOFIMU17_REG_FIFO_COUNTH 0x2E |
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#define | C6DOFIMU17_REG_FIFO_COUNTL 0x2F |
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#define | C6DOFIMU17_REG_FIFO_DATA 0x30 |
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#define | C6DOFIMU17_REG_APEX_DATA0 0x31 |
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#define | C6DOFIMU17_REG_APEX_DATA1 0x32 |
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#define | C6DOFIMU17_REG_APEX_DATA2 0x33 |
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#define | C6DOFIMU17_REG_APEX_DATA3 0x34 |
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#define | C6DOFIMU17_REG_APEX_DATA4 0x35 |
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#define | C6DOFIMU17_REG_APEX_DATA5 0x36 |
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#define | C6DOFIMU17_REG_INT_STATUS2 0x37 |
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#define | C6DOFIMU17_REG_INT_STATUS3 0x38 |
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#define | C6DOFIMU17_REG_SIGNAL_PATH_RESET 0x4B |
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#define | C6DOFIMU17_REG_INTF_CONFIG0 0x4C |
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#define | C6DOFIMU17_REG_INTF_CONFIG1 0x4D |
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#define | C6DOFIMU17_REG_PWR_MGMT0 0x4E |
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#define | C6DOFIMU17_REG_GYRO_CONFIG0 0x4F |
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#define | C6DOFIMU17_REG_ACCEL_CONFIG0 0x50 |
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#define | C6DOFIMU17_REG_GYRO_CONFIG1 0x51 |
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#define | C6DOFIMU17_REG_GYRO_ACCEL_CONFIG0 0x52 |
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#define | C6DOFIMU17_REG_ACCEL_CONFIG1 0x53 |
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#define | C6DOFIMU17_REG_TMST_CONFIG 0x54 |
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#define | C6DOFIMU17_REG_APEX_CONFIG0 0x55 |
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#define | C6DOFIMU17_REG_SMD_CONFIG 0x56 |
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#define | C6DOFIMU17_REG_FIFO_CONFIG1 0x5F |
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#define | C6DOFIMU17_REG_FIFO_CONFIG2 0x60 |
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#define | C6DOFIMU17_REG_FIFO_CONFIG3 0x61 |
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#define | C6DOFIMU17_REG_FSYNC_CONFIG 0x62 |
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#define | C6DOFIMU17_REG_INT_CONFIG0 0x63 |
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#define | C6DOFIMU17_REG_INT_CONFIG1 0x64 |
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#define | C6DOFIMU17_REG_INT_SOURCE0 0x65 |
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#define | C6DOFIMU17_REG_INT_SOURCE1 0x66 |
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#define | C6DOFIMU17_REG_INT_SOURCE3 0x68 |
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#define | C6DOFIMU17_REG_INT_SOURCE4 0x69 |
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#define | C6DOFIMU17_REG_FIFO_LOST_PKT0 0x6C |
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#define | C6DOFIMU17_REG_FIFO_LOST_PKT1 0x6D |
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#define | C6DOFIMU17_REG_SELF_TEST_CONFIG 0x70 |
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#define | C6DOFIMU17_REG_WHO_AM_I 0x75 |
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#define | C6DOFIMU17_REG_BANK_SEL 0x76 |
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#define | C6DOFIMU17_CHIP_ID 0x6F |
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#define | C6DOFIMU17_REG_SENSOR_CONFIG0 0x03 |
| 6DOF IMU 17 description user bank 1 register.
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC2 0x0B |
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC3 0x0C |
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC4 0x0D |
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC5 0x0E |
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC6 0x0F |
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC7 0x10 |
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC8 0x11 |
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC9 0x12 |
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#define | C6DOFIMU17_REG_GYRO_CONFIG_STATIC10 0x13 |
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#define | C6DOFIMU17_REG_XG_ST_DATA 0x5F |
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#define | C6DOFIMU17_REG_YG_ST_DATA 0x60 |
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#define | C6DOFIMU17_REG_ZG_ST_DATA 0x61 |
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#define | C6DOFIMU17_REG_TMSTVAL0 0x62 |
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#define | C6DOFIMU17_REG_TMSTVAL1 0x63 |
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#define | C6DOFIMU17_REG_TMSTVAL2 0x64 |
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#define | C6DOFIMU17_REG_INTF_CONFIG4 0x7A |
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#define | C6DOFIMU17_REG_INTF_CONFIG5 0x7B |
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#define | C6DOFIMU17_REG_INTF_CONFIG6 0x7C |
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#define | C6DOFIMU17_REG_ACCEL_CONFIG_STATIC2 0x03 |
| 6DOF IMU 17 description user bank 2 register.
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#define | C6DOFIMU17_REG_ACCEL_CONFIG_STATIC3 0x04 |
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#define | C6DOFIMU17_REG_ACCEL_CONFIG_STATIC4 0x05 |
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#define | C6DOFIMU17_REG_XA_ST_DATA 0x3B |
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#define | C6DOFIMU17_REG_YA_ST_DATA 0x3C |
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#define | C6DOFIMU17_REG_ZA_ST_DATA 0x3D |
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#define | C6DOFIMU17_REG_PU_PD_CONFIG1 0x06 |
| 6DOF IMU 17 description user bank 3 register.
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#define | C6DOFIMU17_REG_PU_PD_CONFIG2 0x0E |
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#define | C6DOFIMU17_REG_FDR_CONFIG 0x09 |
| 6DOF IMU 17 description user bank 4 register.
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#define | C6DOFIMU17_REG_APEX_CONFIG1 0x40 |
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#define | C6DOFIMU17_REG_APEX_CONFIG2 0x41 |
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#define | C6DOFIMU17_REG_APEX_CONFIG3 0x42 |
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#define | C6DOFIMU17_REG_APEX_CONFIG4 0x43 |
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#define | C6DOFIMU17_REG_APEX_CONFIG5 0x44 |
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#define | C6DOFIMU17_REG_APEX_CONFIG6 0x45 |
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#define | C6DOFIMU17_REG_APEX_CONFIG7 0x46 |
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#define | C6DOFIMU17_REG_APEX_CONFIG8 0x47 |
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#define | C6DOFIMU17_REG_APEX_CONFIG9 0x48 |
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#define | C6DOFIMU17_REG_APEX_CONFIG10 0x49 |
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#define | C6DOFIMU17_REG_ACCEL_WOM_X_THR 0x4A |
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#define | C6DOFIMU17_REG_ACCEL_WOM_Y_THR 0x4B |
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#define | C6DOFIMU17_REG_ACCEL_WOM_Z_THR 0x4C |
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#define | C6DOFIMU17_REG_INT_SOURCE6 0x4D |
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#define | C6DOFIMU17_REG_INT_SOURCE7 0x4E |
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#define | C6DOFIMU17_REG_INT_SOURCE8 0x4F |
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#define | C6DOFIMU17_REG_INT_SOURCE9 0x50 |
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#define | C6DOFIMU17_REG_INT_SOURCE10 0x51 |
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#define | C6DOFIMU17_REG_OFFSET_USER0 0x77 |
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#define | C6DOFIMU17_REG_OFFSET_USER1 0x78 |
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#define | C6DOFIMU17_REG_OFFSET_USER2 0x79 |
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#define | C6DOFIMU17_REG_OFFSET_USER3 0x7A |
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#define | C6DOFIMU17_REG_OFFSET_USER4 0x7B |
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#define | C6DOFIMU17_REG_OFFSET_USER5 0x7C |
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#define | C6DOFIMU17_REG_OFFSET_USER6 0x7D |
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#define | C6DOFIMU17_REG_OFFSET_USER7 0x7E |
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#define | C6DOFIMU17_REG_OFFSET_USER8 0x7F |
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#define | C6DOFIMU17_SET_TEMPERATURE_ENABLED 0xDF |
| 6DOF IMU 17 description setting.
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#define | C6DOFIMU17_SET_TEMPERATURE_DISABLED 0x20 |
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#define | C6DOFIMU17_SET_GYRO_OFF_MODE 0x00 |
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#define | C6DOFIMU17_SET_GYRO_STANDBY_MODE 0x04 |
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#define | C6DOFIMU17_SET_GYRO_TLOW_NOISE_MODE 0x0C |
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#define | C6DOFIMU17_SET_ACCEL_OFF_MODE 0x00 |
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#define | C6DOFIMU17_SET_ACCEL_LOW_POWER_MODE 0x02 |
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#define | C6DOFIMU17_SET_ACCEL_LOW_NOISE_MODE 0x03 |
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#define | C6DOFIMU17_SET_GYRO_FS_SEL_2000_dps 0x00 |
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#define | C6DOFIMU17_SET_GYRO_FS_SEL_1000_dps 0x01 |
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#define | C6DOFIMU17_SET_GYRO_FS_SEL_500_dps 0x02 |
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#define | C6DOFIMU17_SET_GYRO_FS_SEL_250_dps 0x03 |
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#define | C6DOFIMU17_SET_GYRO_FS_SEL_125_dps 0x04 |
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#define | C6DOFIMU17_SET_GYRO_FS_SEL_62_5_dps 0x05 |
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#define | C6DOFIMU17_SET_GYRO_FS_SEL_31_25_dps 0x06 |
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#define | C6DOFIMU17_SET_GYRO_FS_SEL_16_625_dps 0x07 |
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#define | C6DOFIMU17_SET_GYRO_ODR_32kHz 0x01 |
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#define | C6DOFIMU17_SET_GYRO_ODR_16kHz 0x02 |
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#define | C6DOFIMU17_SET_GYRO_ODR_8kHz 0x03 |
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#define | C6DOFIMU17_SET_GYRO_ODR_4kHz 0x04 |
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#define | C6DOFIMU17_SET_GYRO_ODR_2kHz 0x05 |
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#define | C6DOFIMU17_SET_GYRO_ODR_1kHz 0x06 |
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#define | C6DOFIMU17_SET_GYRO_ODR_200Hz 0x07 |
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#define | C6DOFIMU17_SET_GYRO_ODR_100Hz 0x08 |
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#define | C6DOFIMU17_SET_GYRO_ODR_50Hz 0x09 |
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#define | C6DOFIMU17_SET_GYRO_ODR_25Hz 0x0A |
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#define | C6DOFIMU17_SET_GYRO_ODR_12_5Hz 0x0B |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_ORD_1st 0x00 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_ORD_2st 0x01 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_ORD_3st 0x02 |
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#define | C6DOFIMU17_SET_GYRO_DEC2_M2_ORD_3st 0x02 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_ODR_2 0x00 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_ODR_4 0x01 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_ODR_5 0x02 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_ODR_8 0x03 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_ODR_10 0x04 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_ODR_16 0x05 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_ODR_20 0x06 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_ODR_40 0x07 |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_LOW_LATENCY_0 0x0E |
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#define | C6DOFIMU17_SET_GYRO_UI_FILT_BW_LOW_LATENCY_1 0x0F |
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#define | C6DOFIMU17_SET_ACCEL_FS_SEL_16g 0x00 |
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#define | C6DOFIMU17_SET_ACCEL_FS_SEL_8g 0x01 |
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#define | C6DOFIMU17_SET_ACCEL_FS_SEL_4g 0x02 |
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#define | C6DOFIMU17_SET_ACCEL_FS_SEL_2g 0x03 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_32kHz 0x01 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_16kHz 0x02 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_8kHz 0x03 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_4kHz 0x04 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_2kHz 0x05 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_1kHz 0x06 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_200Hz 0x07 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_100Hz 0x08 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_50Hz 0x09 |
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#define | C6DOFIMU17_SET_ACCEL_ODR_25Hz 0x0A |
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#define | C6DOFIMU17_SET_ACCEL_ODR_12_5Hz 0x0B |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_ODR_2 0x00 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_ODR_4 0x01 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_ODR_5 0x02 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_ODR_8 0x03 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_ODR_10 0x04 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_ODR_16 0x05 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_ODR_20 0x06 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_ODR_40 0x07 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_LOW_LATENCY_0 0x0E |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_BW_LOW_LATENCY_1 0x0F |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_ORD_1st 0x00 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_ORD_2st 0x01 |
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#define | C6DOFIMU17_SET_ACCEL_UI_FILT_ORD_3st 0x02 |
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#define | C6DOFIMU17_SET_ACCEL_DEC2_M2_ORD_3st 0x02 |
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#define | C6DOFIMU17_SET_BANK_0 0x00 |
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#define | C6DOFIMU17_SET_BANK_1 0x01 |
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#define | C6DOFIMU17_SET_BANK_2 0x02 |
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#define | C6DOFIMU17_SET_BANK_3 0x03 |
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#define | C6DOFIMU17_SET_BANK_4 0x04 |
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#define | C6DOFIMU17_SET_DEV_ADDR 0x68 |
| 6DOF IMU 17 device address setting.
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#define | C6DOFIMU17_SET_DATA_SAMPLE_EDGE SET_SPI_DATA_SAMPLE_EDGE |
| Data sample selection.
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#define | C6DOFIMU17_SET_DATA_SAMPLE_MIDDLE SET_SPI_DATA_SAMPLE_MIDDLE |
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#define | C6DOFIMU17_MAP_MIKROBUS(cfg, mikrobus) |
| MikroBUS pin mapping.
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