daq 2.0.0.0
Data Structures | Macros | Enumerations | Functions
daq.h File Reference

This file contains API for DAQ Click Driver. More...

#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"

Go to the source code of this file.

Data Structures

struct  daq_t
 DAQ Click context object. More...
 
struct  daq_cfg_t
 DAQ Click configuration object. More...
 

Macros

#define DAQ_REG_CHIP_TYPE   0x03
 DAQ description register.
 
#define DAQ_REG_PRODUCT_ID_L   0x04
 
#define DAQ_REG_PRODUCT_ID_H   0x05
 
#define DAQ_REG_CHIP_GRADE   0x06
 
#define DAQ_REG_SCRATCH_PAD   0x0A
 
#define DAQ_REG_VENDOR_L   0x0C
 
#define DAQ_REG_VENDOR_H   0x0D
 
#define DAQ_REG_INTERFACE_FORMAT   0x14
 
#define DAQ_REG_POWER_CLOCK   0x15
 
#define DAQ_REG_ANALOG   0x16
 
#define DAQ_REG_ANALOG2   0x17
 
#define DAQ_REG_CONVERSION   0x18
 
#define DAQ_REG_DIGITAL_FILTER   0x19
 
#define DAQ_REG_SINC3_DEC_RATE_MSB   0x1A
 
#define DAQ_REG_SINC3_DEC_RATE_LSB   0x1B
 
#define DAQ_REG_DUTY_CYCLE_RATION   0x1C
 
#define DAQ_REG_SYNC_RESET   0x1D
 
#define DAQ_REG_GPIO_CONTROL   0x1E
 
#define DAQ_REG_GPIO_WRITE   0x1F
 
#define DAQ_REG_GPIO_READ   0x20
 
#define DAQ_REG_OFFSET_HI   0x21
 
#define DAQ_REG_OFFSET_MID   0x22
 
#define DAQ_REG_OFFSET_LO   0x23
 
#define DAQ_REG_GAIN_HI   0x24
 
#define DAQ_REG_GAIN_MID   0x25
 
#define DAQ_REG_GAIN_LO   0x26
 
#define DAQ_REG_BIST_CONTROL   0x27
 
#define DAQ_REG_SPI_DIAG_ENABLE   0x28
 
#define DAQ_REG_ADC_DIAG_ENABLE   0x29
 
#define DAQ_REG_DIG_DIAG_ENABLE   0x2A
 
#define DAQ_REG_ADC_DATA   0x2C
 
#define DAQ_REG_MASTER_STATUS   0x2D
 
#define DAQ_REG_SPI_DIAG_STATUS   0x2E
 
#define DAQ_REG_ADC_DIAG_STATUS   0x2F
 
#define DAQ_REG_DIG_DIAG_STATUS   0x30
 
#define DAQ_REG_MCLK_COUNTER   0x31
 
#define DAQ_REG_COEFF_CONTROL   0x32
 
#define DAQ_REG_COEFF_DATA   0x33
 
#define DAQ_REG_ACCESS_KEY   0x34
 
#define DAQ_INTERFACE_CRC_EN_MSK   (0x1 << 6)
 DAQ inteface format settings.
 
#define DAQ_INTERFACE_CRC_EN(x)   (((x) & 0x1) << 6)
 
#define DAQ_INTERFACE_CRC_TYPE_MSK   (0x1 << 5)
 
#define DAQ_INTERFACE_CRC_TYPE(x)   (((x) & 0x1) << 5)
 
#define DAQ_INTERFACE_STATUS_EN_MSK   (0x1 << 4)
 
#define DAQ_INTERFACE_STATUS_EN(x)   (((x) & 0x1) << 4)
 
#define DAQ_INTERFACE_CONVLEN_MSK   (0x1 << 3)
 
#define DAQ_INTERFACE_CONVLEN(x)   (((x) & 0x1) << 3)
 
#define DAQ_INTERFACE_RDY_EN_MSK   (0x1 << 2)
 
#define DAQ_INTERFACE_RDY_EN(x)   (((x) & 0x1) << 3)
 
#define DAQ_INTERFACE_CONT_READ_MSK   (0x1 << 0)
 
#define DAQ_INTERFACE_CONT_READ_EN(x)   (((x) & 0x1) << 0)
 
#define DAQ_REG_COEFF_CONTROL   0x32
 
#define DAQ_REG_COEFF_DATA   0x33
 
#define DAQ_REG_ACCESS_KEY   0x34
 
#define DAQ_POWER_CLK_PWRMODE_MSK   0x3
 DAQ power clock settings.
 
#define DAQ_POWER_CLK_PWRMODE(x)   (((x) & 0x3) << 0)
 
#define DAQ_POWER_CLK_MOD_OUT_MSK   (0x1 << 2)
 
#define DAQ_POWER_CLK_MOD_OUT(x)   (((x) & 0x1) << 2)
 
#define DAQ_POWER_CLK_POWER_DOWN   0x08
 
#define DAQ_POWER_CLK_MCLK_DIV_MSK   (0x3 << 4)
 
#define DAQ_POWER_CLK_MCLK_DIV(x)   (((x) & 0x3) << 4)
 
#define DAQ_POWER_CLK_CLOCK_SEL_MSK   (0x3 << 6)
 
#define DAQ_POWER_CLK_CLOCK_SEL(x)   (((x) & 0x3) << 6)
 
#define DAQ_CONVERSION_DIAG_MUX_MSK   (0xF << 4)
 DAQ conversion settings.
 
#define DAQ_CONVERSION_DIAG_MUX_SEL(x)   (((x) & 0xF) << 4)
 
#define DAQ_CONVERSION_DIAG_SEL_MSK   (0x1 << 3)
 
#define DAQ_CONVERSION_DIAG_SEL(x)   (((x) & 0x1) << 3)
 
#define DAQ_CONVERSION_MODE_MSK   (0x7 << 0)
 
#define DAQ_CONVERSION_MODE(x)   (((x) & 0x7) << 0)
 
#define DAQ_ANALOG_REF_BUF_POS_MSK   (0x3 << 6)
 DAQ analog settings.
 
#define DAQ_ANALOG_REF_BUF_POS(x)   (((x) & 0x3) << 6)
 
#define DAQ_ANALOG_REF_BUF_NEG_MSK   (0x3 << 4)
 
#define DAQ_ANALOG_REF_BUF_NEG(x)   (((x) & 0x3) << 4)
 
#define DAQ_ANALOG_AIN_BUF_POS_OFF_MSK   (0x1 << 1)
 
#define DAQ_ANALOG_AIN_BUF_POS_OFF(x)   (((x) & 0x1) << 1)
 
#define DAQ_ANALOG_AIN_BUF_NEG_OFF_MSK   (0x1 << 0)
 
#define DAQ_ANALOG_AIN_BUF_NEG_OFF(x)   (((x) & 0x1) << 0)
 
#define DAQ_ANALOG2_VCM_MSK   (0x7 << 0)
 
#define DAQ_ANALOG2_VCM(x)   (((x) & 0x7) << 0)
 
#define DAQ_DIGI_FILTER_60HZ_REJ_EN_MSK   (0x1 << 7)
 DAQ digital filter settings.
 
#define DAQ_DIGI_FILTER_60HZ_REJ_EN(x)   (((x) & 0x1) << 7)
 
#define DAQ_DIGI_FILTER_FILTER_MSK   (0x7 << 4)
 
#define DAQ_DIGI_FILTER_FILTER(x)   (((x) & 0x7) << 4)
 
#define DAQ_DIGI_FILTER_DEC_RATE_MSK   (0x7 << 0)
 
#define DAQ_DIGI_FILTER_DEC_RATE(x)   (((x) & 0x7) << 0)
 
#define DAQ_SINC3_DEC_RATE_MSB_MSK   (0x0F << 0)
 DAQ sinc3 decimal rate settings.
 
#define DAQ_SINC3_DEC_RATE_MSB(x)   (((x) & 0x0F) << 0)
 
#define DAQ_SINC3_DEC_RATE_LSB_MSK   (0xFF << 0)
 
#define DAQ_SINC3_DEC_RATE_LSB(x)   (((x) & 0xFF) << 0)
 
#define DAQ_DC_RATIO_IDLE_TIME_MSK   (0xFF << 0)
 DAQ duty cycle ratio settings.
 
#define DAQ_DC_RATIO_IDLE_TIME(x)   (((x) & 0xFF) << 0)
 
#define DAQ_SYNC_RST_SPI_STARTB_MSK   (0x1 << 7)
 DAQ sync reset settings.
 
#define DAQ_SYNC_RST_SPI_STARTB(x)   (((x) & 0x1) << 7)
 
#define DAQ_SYNC_RST_SYNCOUT_EDGE_MSK   (0x1 << 6)
 
#define DAQ_SYNC_RST_SYNCOUT_EDGE(x)   (((x) & 0x1) << 6)
 
#define DAQ_SYNC_RST_GPIO_START_EN_MSK   (0x1 << 3)
 
#define DAQ_SYNC_RST_GPIO_START_EN(x)   (((x) & 0x1) << 3)
 
#define DAQ_SYNC_RST_SPI_RESET_MSK   (0x3 << 0)
 
#define DAQ_SYNC_RST_SPI_RESET(x)   (((x) & 0x3) << 0)
 
#define DAQ_GPIO_CNTRL_UGPIO_EN_MSK   (0x1 << 7)
 DAQ gpio control settings.
 
#define DAQ_GPIO_CNTRL_UGPIO_EN(x)   (((x) & 0x1) << 7)
 
#define DAQ_GPIO_CNTRL_GPIO2_OD_EN_MSK   (0x1 << 6)
 
#define DAQ_GPIO_CNTRL_GPIO2_OD_EN(x)   (((x) & 0x1) << 6)
 
#define DAQ_GPIO_CNTRL_GPIO1_OD_EN_MSK   (0x1 << 5)
 
#define DAQ_GPIO_CNTRL_GPIO1_OD_EN(x)   (((x) & 0x1) << 5)
 
#define DAQ_GPIO_CNTRL_GPIO0_OD_EN_MSK   (0x1 << 4)
 
#define DAQ_GPIO_CNTRL_GPIO0_OD_EN(x)   (((x) & 0x1) << 4)
 
#define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN_MSK   (0x7 << 4)
 
#define DAQ_GPIO_CNTRL_ALL_GPIOS_OD_EN(x)   (((x) & 0x7) << 4)
 
#define DAQ_GPIO_CNTRL_GPIO3_OP_EN_MSK   (0x1 << 3)
 
#define DAQ_GPIO_CNTRL_GPIO3_OP_EN(x)   (((x) & 0x1) << 3)
 
#define DAQ_GPIO_CNTRL_GPIO2_OP_EN_MSK   (0x1 << 2)
 
#define DAQ_GPIO_CNTRL_GPIO2_OP_EN(x)   (((x) & 0x1) << 2)
 
#define DAQ_GPIO_CNTRL_GPIO1_OP_EN_MSK   (0x1 << 1)
 
#define DAQ_GPIO_CNTRL_GPIO1_OP_EN(x)   (((x) & 0x1) << 1)
 
#define DAQ_GPIO_CNTRL_GPIO0_OP_EN_MSK   (0x1 << 0)
 
#define DAQ_GPIO_CNTRL_GPIO0_OP_EN(x)   (((x) & 0x1) << 0)
 
#define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN_MSK   (0xF << 0)
 
#define DAQ_GPIO_CNTRL_ALL_GPIOS_OP_EN(x)   (((x) & 0xF) << 0)
 
#define DAQ_GPIO_WRITE_3_MSK   (0x1 << 3)
 
#define DAQ_GPIO_WRITE_3(x)   (((x) & 0x1) << 3)
 
#define DAQ_GPIO_WRITE_2_MSK   (0x1 << 2)
 
#define DAQ_GPIO_WRITE_2(x)   (((x) & 0x1) << 2)
 
#define DAQ_GPIO_WRITE_1_MSK   (0x1 << 1)
 
#define DAQ_GPIO_WRITE_1(x)   (((x) & 0x1) << 1)
 
#define DAQ_GPIO_WRITE_0_MSK   (0x1 << 0)
 
#define DAQ_GPIO_WRITE_0(x)   (((x) & 0x1) << 0)
 
#define DAQ_GPIO_WRITE_ALL_MSK   (0xF << 0)
 
#define DAQ_GPIO_WRITE_ALL(x)   (((x) & 0xF))
 
#define DAQ_GPIO_READ_3_MSK   (0x1 << 3)
 
#define DAQ_GPIO_READ_2_MSK   (0x1 << 2)
 
#define DAQ_GPIO_READ_1_MSK   (0x1 << 1)
 
#define DAQ_GPIO_READ_0_MSK   (0x1 << 0)
 
#define DAQ_GPIO_READ_ALL_MSK   (0xF << 0)
 
#define DAQ_OFFSET_HI_MSK   (0xFF << 0)
 DAQ offset settings.
 
#define DAQ_OFFSET_HI(x)   (((x) & 0xFF) << 0)
 
#define DAQ_OFFSET_MID_MSK   (0xFF << 0)
 
#define DAQ_OFFSET_MID(x)   (((x) & 0xFF) << 0)
 
#define DAQ_OFFSET_LO_MSK   (0xFF << 0)
 
#define DAQ_OFFSET_LO(x)   (((x) & 0xFF) << 0)
 
#define DAQ_GAIN_HI_MSK   (0xFF << 0)
 DAQ gain settings.
 
#define DAQ_GAIN_HI(x)   (((x) & 0xFF) << 0)
 
#define DAQ_GAIN_MID_MSK   (0xFF << 0)
 
#define DAQ_GAIN_MID(x)   (((x) & 0xFF) << 0)
 
#define DAQ_GAIN_LOW_MSK   (0xFF << 0)
 
#define DAQ_GAIN_LOW(x)   (((x) & 0xFF) << 0)
 
#define DAQ_SPI_DIAG_ERR_SPI_IGNORE_MSK   (0x1 << 4)
 DAQ spi diagnostic enable settings.
 
#define DAQ_SPI_DIAG_ERR_SPI_IGNORE(x)   (((x) & 0x1) << 4)
 
#define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT_MSK   (0x1 << 3)
 
#define DAQ_SPI_DIAG_ERR_SPI_CLK_CNT(x)   (((x) & 0x1) << 3)
 
#define DAQ_SPI_DIAG_ERR_SPI_RD_MSK   (0x1 << 2)
 
#define DAQ_SPI_DIAG_ERR_SPI_RD(x)   (((x) & 0x1) << 2)
 
#define DAQ_SPI_DIAG_ERR_SPI_WR_MSK   (0x1 << 1)
 
#define DAQ_SPI_DIAG_ERR_SPI_WR(x)   (((x) & 0x1) << 1)
 
#define DAQ_ADC_DIAG_ERR_DLDO_PSM_MSK   (0x1 << 5)
 DAQ adc diagnostic enable settings.
 
#define DAQ_ADC_DIAG_ERR_DLDO_PSM(x)   (((x) & 0x1) << 5)
 
#define DAQ_ADC_DIAG_ERR_ALDO_PSM_MSK   (0x1 << 4)
 
#define DAQ_ADC_DIAG_ERR_ALDO_PSM(x)   (((x) & 0x1) << 4)
 
#define DAQ_ADC_DIAG_ERR_FILT_SAT_MSK   (0x1 << 2)
 
#define DAQ_ADC_DIAG_ERR_FILT_SAT(x)   (((x) & 0x1) << 2)
 
#define DAQ_ADC_DIAG_ERR_FILT_NOT_SET_MSK   (0x1 << 1)
 
#define DAQ_ADC_DIAG_ERR_FILT_NOT_SET(x)   (((x) & 0x1) << 1)
 
#define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL_MSK   (0x1 << 0)
 
#define DAQ_ADC_DIAG_ERR_EXT_CLK_QUAL(x)   (((x) & 0x1) << 0)
 
#define DAQ_DIG_DIAG_ERR_MEMMAP_CRC_MSK   (0x1 << 4)
 DAQ diagnostic enable settings.
 
#define DAQ_DIG_DIAG_ERR_MEMMAP_CRC(x)   (((x) & 0x1) << 4)
 
#define DAQ_DIG_DIAG_ERR_RAM_CRC_MSK   (0x1 << 3)
 
#define DAQ_DIG_DIAG_ERR_RAM_CRC(x)   (((x) & 0x1) << 3)
 
#define DAQ_DIG_DIAG_ERR_FUSE_CRC_MSK   (0x1 << 2)
 
#define DAQ_DIG_DIAG_ERR_FUSE_CRC(x)   (((x) & 0x1) << 2)
 
#define DAQ_DIG_DIAG_FREQ_COUNT_EN_MSK   (0x1 << 0)
 
#define DAQ_DIG_DIAG_FREQ_COUNT_EN(x)   (((x) & 0x1) << 0)
 
#define DAQ_MASTER_ERROR_MSK   (0x1 << 7)
 DAQ master status.
 
#define DAQ_MASTER_ADC_ERROR_MSK   (0x1 << 6)
 
#define DAQ_MASTER_DIG_ERROR_MSK   (0x1 << 5)
 
#define DAQ_MASTER_DIG_ERR_EXT_CLK_MSK   (0x1 << 4)
 
#define DAQ_MASTER_FILT_SAT_MSK   (0x1 << 3)
 
#define DAQ_MASTER_FILT_NOT_SET_MSK   (0x1 << 2)
 
#define DAQ_MASTER_SPI_ERROR_MSK   (0x1 << 1)
 
#define DAQ_MASTER_POR_FLAG_MSK   (0x1 << 0)
 
#define DAQ_SPI_IGNORE_ERROR_MSK   (0x1 << 4)
 DAQ spi status.
 
#define DAQ_SPI_IGNORE_ERROR_CLR(x)   (((x) & 0x1) << 4)
 
#define DAQ_SPI_CLK_CNT_ERROR_MSK   (0x1 << 3)
 
#define DAQ_SPI_READ_ERROR_MSK   (0x1 << 2)
 
#define DAQ_SPI_READ_ERROR_CLR(x)   (((x) & 0x1) << 2)
 
#define DAQ_SPI_WRITE_ERROR_MSK   (0x1 << 1)
 
#define DAQ_SPI_WRITE_ERROR_CLR(x)   (((x) & 0x1) << 1)
 
#define DAQ_SPI_CRC_ERROR_MSK   (0x1 << 0)
 
#define DAQ_SPI_CRC_ERROR_CLR(x)   (((x) & 0x1) << 0)
 
#define DAQ_ADC_DLDO_PSM_ERROR_MSK   (0x1 << 5)
 DAQ adc status.
 
#define DAQ_ADC_ALDO_PSM_ERROR_MSK   (0x1 << 4)
 
#define DAQ_ADC_REF_DET_ERROR_MSK   (0x1 << 3)
 
#define DAQ_ADC_FILT_SAT_MSK   (0x1 << 2)
 
#define DAQ_ADC_FILT_NOT_SET_MSK   (0x1 << 1)
 
#define DAQ_ADC_DIG_ERR_EXT_CLK_MSK   (0x1 << 0)
 
#define DAQ_DIG_MEMMAP_CRC_ERROR_MSK   (0x1 << 4)
 DAQ diagnostic status.
 
#define DAQ_DIG_RAM_CRC_ERROR_MSK   (0x1 << 3)
 
#define DAQ_DIG_FUS_CRC_ERROR_MSK   (0x1 << 2)
 
#define DAQ_MCLK_COUNTER_MSK   (0xFF << 0)
 DAQ mclk counter settings.
 
#define DAQ_MCLK_COUNTER(x)   (((x) & 0xFF) << 0)
 
#define DAQ_COEF_CONTROL_COEFFACCESSEN_MSK   (0x1 << 7)
 DAQ coefficient control settings.
 
#define DAQ_COEF_CONTROL_COEFFACCESSEN(x)   (((x) & 0x1) << 7)
 
#define DAQ_COEF_CONTROL_COEFFWRITEEN_MSK   (0x1 << 6)
 
#define DAQ_COEF_CONTROL_COEFFWRITEEN(x)   (((x) & 0x1) << 6)
 
#define DAQ_COEF_CONTROL_COEFFADDR_MSK   (0x3F << 5)
 
#define DAQ_COEF_CONTROL_COEFFADDR(x)   (((x) & 0x3F) << 5)
 
#define DAQ_COEFF_DATA_USERCOEFFEN_MSK   (0x1 << 23)
 DAQ coefficient data settings.
 
#define DAQ_COEFF_DATA_USERCOEFFEN(x)   (((x) & 0x1) << 23)
 
#define DAQ_COEFF_DATA_COEFFDATA_MSK   (0x7FFFFF << 22)
 
#define DAQ_COEFF_DATA_COEFFDATA(x)   (((x) & 0x7FFFFF) << 22)
 
#define DAQ_ACCESS_KEY_MSK   (0xFF << 0)
 DAQ access settings.
 
#define DAQ_ACCESS_KEY(x)   (((x) & 0xFF) << 0)
 
#define DAQ_ACCESS_KEY_CHECK_MSK   (0x1 << 0)
 
#define DAQ_RESOLUTION   8388608
 DAQ resolution settings.
 
#define DAQ_MAP_MIKROBUS(cfg, mikrobus)
 MikroBUS pin mapping.
 

Enumerations

enum  daq_power_mode { DAQ_ECO = 0 , DAQ_MEDIAN = 2 , DAQ_FAST = 3 }
 DAQ power clock values. More...
 
enum  daq_mclk_div { DAQ_MCLK_DIV_16 = 0 , DAQ_MCLK_DIV_8 = 1 , DAQ_MCLK_DIV_4 = 2 , DAQ_MCLK_DIV_2 = 3 }
 DAQ mclk divider values. More...
 
enum  daq_conv_mode {
  DAQ_CONV_CONTINUOUS = 0 , DAQ_CONV_ONE_SHOT = 1 , DAQ_CONV_SINGLE = 2 , DAQ_CONV_PERIODIC = 3 ,
  DAQ_CONV_STANDBY = 4
}
 DAQ conversion mode values. More...
 
enum  daq_conv_len { DAQ_CONV_24BIT = 0 , DAQ_CONV_16BIT = 1 }
 DAQ conversion length values. More...
 
enum  daq_rdy_dout { DAQ_RDY_DOUT_EN , DAQ_RDY_DOUT_DIS }
 DAQ data ready enable values. More...
 
enum  daq_conv_diag_mux { DAQ_TEMP_SENSOR = 0x0 , DAQ_AIN_SHORT = 0x8 , DAQ_POSITIVE_FS = 0x9 , DAQ_NEGATIVE_FS = 0xA }
 DAQ conversion mux values. More...
 
enum  daq_crc_sel { DAQ_CRC , DAQ_XOR , DAQ_NO_CRC }
 DAQ crc selection values. More...
 
enum  daq_filter_type {
  DAQ_SINC5 = 0 , DAQ_SINC5_DECx8 = 1 , DAQ_SINC5_DECx16 = 2 , DAQ_SINC3 = 3 ,
  DAQ_FIR = 4
}
 DAQ filter type selection values. More...
 
enum  daq_sinc5_fir_decimate {
  DAQ_SINC5_FIR_DECx32 = 0 , DAQ_SINC5_FIR_DECx64 = 1 , DAQ_SINC5_FIR_DECx128 = 2 , DAQ_SINC5_FIR_DECx256 = 3 ,
  DAQ_SINC5_FIR_DECx512 = 4 , DAQ_SINC5_FIR_DECx1024 = 5
}
 DAQ Decimation ratios for SINC5 and FIR values. More...
 
enum  daq_sleep_wake { DAQ_SLEEP = 1 , DAQ_WAKE = 0 }
 DAQ power values. More...
 
enum  daq_ain_precharge { DAQ_AIN_ENABLED = 0 , DAQ_AIN_DISABLED = 1 }
 DAQ AIN precharge values. More...
 
enum  daq_ref_buffer { DAQ_BUF_ENABLED = 0 , DAQ_BUF_DISABLED = 1 , DAQ_BUF_FULL_BUFFER_ON = 2 }
 DAQ REF buffer values. More...
 
enum  daq_vcm_out {
  DAQ_VCM_HALF_VCC = 0 , DAQ_VCM_2_5V = 1 , DAQ_VCM_2_05V = 2 , DAQ_VCM_1_9V = 3 ,
  DAQ_VCM_1_65V = 4 , DAQ_VCM_1_1V = 5 , DAQ_VCM_0_9V = 6 , DAQ_VCM_OFF = 7
}
 DAQ VCM output voltage values. More...
 
enum  daq_gobal_gpio_enable { DAQ_GLOBAL_GPIO_ENABLE = 1 , DAQ_GLOBAL_GPIO_DISABLE = 0 }
 DAQ global gpio values. More...
 
enum  daq_gpios {
  DAQ_GPIO0 = 0 , DAQ_GPIO1 = 1 , DAQ_GPIO2 = 2 , DAQ_GPIO3 = 3 ,
  DAQ_ALL_GPIOS = 4
}
 DAQ global gpio numbering values. More...
 
enum  daq_gpio_write { DAQ_GPIO_LOW = 0 , DAQ_GPIO_HIGH = 1 }
 DAQ gpio state values. More...
 
enum  daq_gpio_output_type { DAQ_GPIO_STRONG_DRIVER = 0 , DAQ_GPIO_OPEN_DRAIN = 1 }
 DAQ gpio output type values. More...
 
enum  daq_continuous_read { DAQ_CONTINUOUS_READ_ENABLE = 1 , DAQ_CONTINUOUS_READ_DISABLE = 0 }
 DAQ continuous adc read enable values. More...
 
enum  daq_gain {
  DAQ_GAIN_12p603 = 6 , DAQ_GAIN_6p302 = 5 , DAQ_GAIN_3p151 = 4 , DAQ_GAIN_1p575 = 3 ,
  DAQ_GAIN_p788 = 2 , DAQ_GAIN_p394 = 1 , DAQ_GAIN_p197 = 0
}
 DAQ GAIN configuration values. More...
 
enum  daq_return_value_t { DAQ_OK = 0 , DAQ_ERROR = -1 }
 DAQ Click return value data. More...
 

Functions

void daq_cfg_setup (daq_cfg_t *cfg)
 DAQ configuration object setup function.
 
err_t daq_init (daq_t *ctx, daq_cfg_t *cfg)
 DAQ initialization function.
 
err_t daq_default_cfg (daq_t *ctx)
 DAQ default configuration function.
 
err_t daq_generic_write (daq_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len)
 DAQ data writing function.
 
err_t daq_byte_write (daq_t *ctx, uint8_t reg, uint8_t data_in)
 DAQ byte writing function.
 
err_t daq_mask_write (daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t data_in)
 DAQ byte writing function with mask.
 
err_t daq_generic_read (daq_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len)
 DAQ data reading function.
 
err_t daq_byte_read (daq_t *ctx, uint8_t reg, uint8_t *data_out)
 DAQ byte reading function.
 
err_t daq_mask_read (daq_t *ctx, uint8_t reg, uint8_t mask, uint8_t *data_out)
 DAQ byte reading function with mask.
 
err_t daq_raw_read (daq_t *ctx, uint8_t *data_out, uint8_t len)
 DAQ reading function.
 
void daq_reset (daq_t *ctx)
 Reset function.
 
uint8_t daq_data_ready (daq_t *ctx)
 Get data ready pin.
 
void daq_set_io3 (daq_t *ctx, uint8_t state)
 Set io3 pin.
 
uint8_t daq_get_iot3 (daq_t *ctx)
 Get io3 pin.
 
err_t daq_set_gain (daq_t *ctx, daq_gain gain)
 Set gain range.
 
err_t daq_read_data (daq_t *ctx, int32_t *adc_data)
 Reading adc data.
 
void daq_calculate_voltage (daq_t *ctx, int32_t adc_data, float *voltage)
 Convert data from raw ADC to voltage.
 

Detailed Description

This file contains API for DAQ Click Driver.

Enumeration Type Documentation

◆ daq_return_value_t

enum daq_return_value_t

DAQ Click return value data.

Predefined enum values for driver return values.

Enumerator
DAQ_OK 
DAQ_ERROR