hbridge11.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/
 
#ifndef HBRIDGE11_H
#define HBRIDGE11_H
 
#ifdef __cplusplus
extern "C"{
#endif
 
#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
 
#define HBRIDGE11_REG_STATUS                0x00
#define HBRIDGE11_REG_CFG_CH0               0x01
#define HBRIDGE11_REG_CFG_CH1               0x02
#define HBRIDGE11_REG_CFG_CH2               0x03
#define HBRIDGE11_REG_CFG_CH3               0x04
#define HBRIDGE11_REG_CFG_CH4               0x05
#define HBRIDGE11_REG_CFG_CH5               0x06
#define HBRIDGE11_REG_CFG_CH6               0x07
#define HBRIDGE11_REG_CFG_CH7               0x08
#define HBRIDGE11_REG_FAULT                 0x09
#define HBRIDGE11_REG_CFG_DPM               0x0A
 
 // hbridge11_reg
 
#define HBRIDGE11_CMD_WRITE                 0x80
#define HBRIDGE11_CMD_ADDRESS_MASK          0x1E
#define HBRIDGE11_CMD_8BIT_REG              0x01
 
#define HBRIDGE11_STATUS_ONCH_ALL_OFF       0x00000000ul
#define HBRIDGE11_STATUS_ONCH_ALL_ON        0xFF000000ul
#define HBRIDGE11_STATUS_ONCH_MASK          0xFF000000ul
#define HBRIDGE11_STATUS_M_OVT              0x00800000ul
#define HBRIDGE11_STATUS_M_OCP              0x00400000ul
#define HBRIDGE11_STATUS_M_OLF              0x00200000ul
#define HBRIDGE11_STATUS_M_HHF              0x00100000ul
#define HBRIDGE11_STATUS_M_DPM              0x00080000ul
#define HBRIDGE11_STATUS_M_COMF             0x00040000ul
#define HBRIDGE11_STATUS_M_UVM              0x00020000ul
#define HBRIDGE11_STATUS_FREQM_100KHZ       0x00000000ul
#define HBRIDGE11_STATUS_FREQM_80KHZ        0x00010000ul
#define HBRIDGE11_STATUS_FREQM_MASK         0x00010000ul
#define HBRIDGE11_STATUS_CM76_INDEPEND      0x00000000ul
#define HBRIDGE11_STATUS_CM76_PARALLEL      0x00004000ul
#define HBRIDGE11_STATUS_CM76_HBRIDGE       0x00008000ul
#define HBRIDGE11_STATUS_CM76_MASK          0x0000C000ul
#define HBRIDGE11_STATUS_CM54_INDEPEND      0x00000000ul
#define HBRIDGE11_STATUS_CM54_PARALLEL      0x00001000ul
#define HBRIDGE11_STATUS_CM54_HBRIDGE       0x00002000ul
#define HBRIDGE11_STATUS_CM54_MASK          0x00003000ul
#define HBRIDGE11_STATUS_CM32_INDEPEND      0x00000000ul
#define HBRIDGE11_STATUS_CM32_PARALLEL      0x00000400ul
#define HBRIDGE11_STATUS_CM32_HBRIDGE       0x00000800ul
#define HBRIDGE11_STATUS_CM32_MASK          0x00000C00ul
#define HBRIDGE11_STATUS_CM10_INDEPEND      0x00000000ul
#define HBRIDGE11_STATUS_CM10_PARALLEL      0x00000100ul
#define HBRIDGE11_STATUS_CM10_HBRIDGE       0x00000200ul
#define HBRIDGE11_STATUS_CM10_MASK          0x00000300ul
#define HBRIDGE11_STATUS_OVT                0x00000080ul
#define HBRIDGE11_STATUS_OCP                0x00000040ul
#define HBRIDGE11_STATUS_OLF                0x00000020ul
#define HBRIDGE11_STATUS_HHF                0x00000010ul
#define HBRIDGE11_STATUS_DPM                0x00000008ul
#define HBRIDGE11_STATUS_COMF               0x00000004ul
#define HBRIDGE11_STATUS_UVM                0x00000002ul
#define HBRIDGE11_STATUS_ACTIVE             0x00000001ul
 
#define HBRIDGE11_CFG_CH_HFS_FULL_SCALE     0x00000000ul
#define HBRIDGE11_CFG_CH_HFS_HALF_SCALE     0x80000000ul
#define HBRIDGE11_CFG_CH_HFS_MASK           0x80000000ul
#define HBRIDGE11_CFG_CH_HOLD_HS_OFF_LS_ON  0x00000000ul
#define HBRIDGE11_CFG_CH_HOLD_DUTY_MIN      0x01000000ul
#define HBRIDGE11_CFG_CH_HOLD_DUTY_MAX      0x7E000000ul
#define HBRIDGE11_CFG_CH_HOLD_HS_ON_LS_OFF  0x7F000000ul
#define HBRIDGE11_CFG_CH_HOLD_MASK          0x7F000000ul
#define HBRIDGE11_CFG_CH_TRGNSPI_ONCH       0x00000000ul
#define HBRIDGE11_CFG_CH_TRGNSPI_TRIG       0x00800000ul
#define HBRIDGE11_CFG_CH_TRGNSPI_MASK       0x00800000ul
#define HBRIDGE11_CFG_CH_HIT_HS_OFF_LS_ON   0x00000000ul
#define HBRIDGE11_CFG_CH_HIT_DUTY_MIN       0x00010000ul
#define HBRIDGE11_CFG_CH_HIT_DUTY_MAX       0x007E0000ul
#define HBRIDGE11_CFG_CH_HIT_HS_ON_LS_OFF   0x007F0000ul
#define HBRIDGE11_CFG_CH_HIT_MASK           0x007F0000ul
#define HBRIDGE11_CFG_CH_HIT_T_MASK         0x0000FF00ul
#define HBRIDGE11_CFG_CH_VDRNCDR_CDR        0x00000000ul
#define HBRIDGE11_CFG_CH_VDRNCDR_VDR        0x00000080ul
#define HBRIDGE11_CFG_CH_VDRNCDR_MASK       0x00000080ul
#define HBRIDGE11_CFG_CH_HSNLS_LS           0x00000000ul
#define HBRIDGE11_CFG_CH_HSNLS_HS           0x00000040ul
#define HBRIDGE11_CFG_CH_HSNLS_MASK         0x00000040ul
#define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_4    0x00000000ul
#define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_3    0x00000010ul
#define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN_2    0x00000020ul
#define HBRIDGE11_CFG_CH_FREQ_CFG_MAIN      0x00000030ul
#define HBRIDGE11_CFG_CH_FREQ_CFG_MASK      0x00000030ul
#define HBRIDGE11_CFG_CH_SRC_MASK           0x00000008ul
#define HBRIDGE11_CFG_CH_OL_EN_MASK         0x00000004ul
#define HBRIDGE11_CFG_CH_DPM_EN_MASK        0x00000002ul
#define HBRIDGE11_CFG_CH_HHF_EN_MASK        0x00000001ul
 
#define HBRIDGE11_FAULT_OCP_MASK            0xFF000000ul
#define HBRIDGE11_FAULT_HHF_MASK            0x00FF0000ul
#define HBRIDGE11_FAULT_OLF_MASK            0x0000FF00ul
#define HBRIDGE11_FAULT_DPM_MASK            0x000000FFul
 
#define HBRIDGE11_CFG_DPM_ISTART_MASK       0x00007F00ul
#define HBRIDGE11_CFG_DPM_TDEB_MASK         0x000000F0ul
#define HBRIDGE11_CFG_DPM_IPTH_MASK         0x0000000Ful
 
#define HBRIDGE11_MOTOR_SEL_0               0
#define HBRIDGE11_MOTOR_SEL_1               1
#define HBRIDGE11_MOTOR_SEL_2               2
#define HBRIDGE11_MOTOR_SEL_3               3
 
#define HBRIDGE11_MOTOR_STATE_HI_Z          0
#define HBRIDGE11_MOTOR_STATE_FORWARD       1
#define HBRIDGE11_MOTOR_STATE_REVERSE       2
#define HBRIDGE11_MOTOR_STATE_BRAKE         3    
 
#define HBRIDGE11_SET_DATA_SAMPLE_EDGE      SET_SPI_DATA_SAMPLE_EDGE
#define HBRIDGE11_SET_DATA_SAMPLE_MIDDLE    SET_SPI_DATA_SAMPLE_MIDDLE
 
 // hbridge11_set
 
#define HBRIDGE11_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck  = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
    cfg.cs   = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.cmd  = MIKROBUS( mikrobus, MIKROBUS_AN ); \
    cfg.en   = MIKROBUS( mikrobus, MIKROBUS_RST ); \
    cfg.flt  = MIKROBUS( mikrobus, MIKROBUS_INT )
 
 // hbridge11_map
 // hbridge11
 
typedef struct
{
    // Output pins
    digital_out_t cmd;          
    digital_out_t en;           
    // Input pins
    digital_in_t flt;           
    // Modules
    spi_master_t spi;           
    pin_name_t   chip_select;   
} hbridge11_t;
 
typedef struct
{
    // Communication gpio pins
    pin_name_t miso;            
    pin_name_t mosi;            
    pin_name_t sck;             
    pin_name_t cs;              
    // Additional gpio pins
    pin_name_t cmd;             
    pin_name_t en;              
    pin_name_t flt;             
    // static variable
    uint32_t                          spi_speed;    
    spi_master_mode_t                 spi_mode;     
    spi_master_chip_select_polarity_t cs_polarity;  
} hbridge11_cfg_t;
 
typedef enum
{
    HBRIDGE11_OK = 0,
    HBRIDGE11_ERROR = -1
 
} hbridge11_return_value_t;
 
void hbridge11_cfg_setup ( hbridge11_cfg_t *cfg );
 
err_t hbridge11_init ( hbridge11_t *ctx, hbridge11_cfg_t *cfg );
 
err_t hbridge11_default_cfg ( hbridge11_t *ctx );
 
err_t hbridge11_write_8bit_register ( hbridge11_t *ctx, uint8_t reg, uint8_t data_in );
 
err_t hbridge11_read_8bit_register ( hbridge11_t *ctx, uint8_t reg, uint8_t *data_out );
 
err_t hbridge11_write_32bit_register ( hbridge11_t *ctx, uint8_t reg, uint32_t data_in );
 
err_t hbridge11_read_32bit_register ( hbridge11_t *ctx, uint8_t reg, uint32_t *data_out );
 
void hbridge11_enable_device ( hbridge11_t *ctx );
 
void hbridge11_disable_device ( hbridge11_t *ctx );
 
uint8_t hbridge11_get_fault_pin ( hbridge11_t *ctx );
 
err_t hbridge11_read_flags ( hbridge11_t *ctx, uint8_t *fault_flags );
 
err_t hbridge11_set_motor_state ( hbridge11_t *ctx, uint8_t motor, uint8_t state );
 
#ifdef __cplusplus
}
#endif
#endif // HBRIDGE11_H
 
 // hbridge11
 
// ------------------------------------------------------------------------ END