This file contains API for I2C MUX 5 Click Driver. More...

#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"

Data Structures
struct	i2cmux5_t
	I2C MUX 5 Click context object. More...

struct	i2cmux5_cfg_t
	I2C MUX 5 Click configuration object. More...

Macros
#define	I2CMUX5_REGISTER_0 0x00
	I2C MUX 5 description register.

#define	I2CMUX5_REGISTER_1 0x01

#define	I2CMUX5_REGISTER_2 0x02

#define	I2CMUX5_REGISTER_3 0x03

#define	I2CMUX5_SET_REG_0_US_BUS_DISCONNECTED 0x00
	I2C MUX 5 description setting.

#define	I2CMUX5_SET_REG_0_US_BUS_CONNECTED 0x80

#define	I2CMUX5_SET_REG_0_ALERT1_STATE_LOW 0x00

#define	I2CMUX5_SET_REG_0_ALERT1_STATE_HIGH 0x40

#define	I2CMUX5_SET_REG_0_ALERT2_STATE_LOW 0x00

#define	I2CMUX5_SET_REG_0_ALERT2_STATE_HIGH 0x20

#define	I2CMUX5_SET_REG_0_ALERT3_STATE_LOW 0x00

#define	I2CMUX5_SET_REG_0_ALERT3_STATE_HIGH 0x10

#define	I2CMUX5_SET_REG_0_ALERT4_STATE_LOW 0x00

#define	I2CMUX5_SET_REG_0_ALERT5_STATE_HIGH 0x08

#define	I2CMUX5_SET_REG_0_ATTEMPT_CONN_FAILED 0x00

#define	I2CMUX5_SET_REG_0_ATTEMPT_CONN_OK 0x04

#define	I2CMUX5_SET_REG_0_NO_LATCHED_TIMEOUT 0x00

#define	I2CMUX5_SET_REG_0_LATCHED_TIMEOUT 0x02

#define	I2CMUX5_SET_REG_0_NO_TIMEOUT_OCCURRING 0x00

#define	I2CMUX5_SET_REG_0_TIMEOUT_OCCURRING 0x01

#define	I2CMUX5_SET_REG_1_URTAC_INACTIVE 0x00
	I2C MUX 5 Register 1 setting.

#define	I2CMUX5_SET_REG_1_URTAC_ACTIVE 0x80

#define	I2CMUX5_SET_REG_1_DRTAC_INACTIVE 0x00

#define	I2CMUX5_SET_REG_1_DRTAC_ACTIVE 0x40

#define	I2CMUX5_SET_REG_1_GPIO_1_LOW 0x00

#define	I2CMUX5_SET_REG_1_GPIO_1_HIGH 0x20

#define	I2CMUX5_SET_REG_1_GPIO_2_LOW 0x00

#define	I2CMUX5_SET_REG_1_GPIO_2_HIGH 0x10

#define	I2CMUX5_SET_REG_2_CFG_GPIO_1_OUTPUT 0x00
	I2C MUX 5 Register 2 setting.

#define	I2CMUX5_SET_REG_2_CFG_GPIO_1_INPUT 0x80

#define	I2CMUX5_SET_REG_2_CFG_GPIO_2_OUTPUT 0x00

#define	I2CMUX5_SET_REG_2_CFG_GPIO_2_INPUT 0x40

#define	I2CMUX5_SET_REG_2_BUS_LOGIC_STATE_BITS 0x00

#define	I2CMUX5_SET_REG_2_CONN_RGL_LOGIC_STATE 0x20

#define	I2CMUX5_SET_REG_2_CFG_GPIO_1_OD_PULL_DOWN 0x00

#define	I2CMUX5_SET_REG_2_CFG_GPIO_1_PUSH_PULL 0x10

#define	I2CMUX5_SET_REG_2_CFG_GPIO_2_OD_PULL_DOWN 0x00

#define	I2CMUX5_SET_REG_2_CFG_GPIO_2_PUSH_PULL 0x08

#define	I2CMUX5_SET_REG_2_MASS_WRITE_DISABLE 0x00

#define	I2CMUX5_SET_REG_2_MASS_WRITE_ENABLE 0x04

#define	I2CMUX5_SET_REG_2_TIMEOUT_DISABLED 0x00

#define	I2CMUX5_SET_REG_2_TIMEOUT_MODE_30_MS 0x01

#define	I2CMUX5_SET_REG_2_TIMEOUT_MODE_15_MS 0x02

#define	I2CMUX5_SET_REG_2_TIMEOUT_MODE_7_5_MS 0x03

#define	I2CMUX5_SET_REG_3_BUS_1_SWITCH_OPEN 0x00
	I2C MUX 5 Register 3 setting.

#define	I2CMUX5_SET_REG_3_BUS_1_SWITCH_CLOSED 0x80

#define	I2CMUX5_SET_REG_3_BUS_2_SWITCH_OPEN 0x00

#define	I2CMUX5_SET_REG_3_BUS_2_SWITCH_CLOSED 0x40

#define	I2CMUX5_SET_REG_3_BUS_3_SWITCH_OPEN 0x00

#define	I2CMUX5_SET_REG_3_BUS_3_SWITCH_CLOSED 0x20

#define	I2CMUX5_SET_REG_3_BUS_4_SWITCH_OPEN 0x00

#define	I2CMUX5_SET_REG_3_BUS_4_SWITCH_CLOSED 0x10

#define	I2CMUX5_CH_SEL_ERROR 0xFF
	I2C MUX 5 Channel Selection Status.

#define	I2CMUX5_SET_DEV_ADDR 0x44
	I2C MUX 5 device address setting.

#define	I2CMUX5_SET_6DOF_IMU_9_ADDR 0x69
	I2C MUX 5 channel slave address setting.

#define	I2CMUX5_SET_6DOF_IMU_11_ADDR 0x0E

#define	I2CMUX5_SET_RTC_10_ADDR 0x68

#define	I2CMUX5_SET_ACCEL_10_ADDR 0x18

#define	I2CMUX5_CH_1 0x01
	I2C MUX 5 channel selection setting.

#define	I2CMUX5_CH_2 0x02

#define	I2CMUX5_CH_3 0x03

#define	I2CMUX5_CH_4 0x04

#define	I2CMUX5_PIN_STATE_LOW 0
	I2C MUX 5 channel selection setting.

#define	I2CMUX5_PIN_STATE_HIGH 1

#define	I2CMUX5_MAP_MIKROBUS(cfg, mikrobus)
	MikroBUS pin mapping.

Functions
void	i2cmux5_cfg_setup (i2cmux5_cfg_t *cfg)
	I2C MUX 5 configuration object setup function.

err_t	i2cmux5_init (i2cmux5_t ctx, i2cmux5_cfg_t cfg)
	I2C MUX 5 initialization function.

void	i2cmux5_default_cfg (i2cmux5_t *ctx)
	I2C MUX 5 default configuration function.

void	i2cmux5_hw_reset (i2cmux5_t *ctx)
	I2C MUX 5 HW reset function.

void	i2cmux5_dev_enable (i2cmux5_t *ctx)
	I2C MUX 5 enable the device function.

uint8_t	i2cmux5_check_rdy (i2cmux5_t *ctx)
	I2C MUX 5 check rdy function.

uint8_t	i2cmux5_check_alert (i2cmux5_t *ctx)
	I2C MUX 5 check alert function.

err_t	i2cmux5_generic_write (i2cmux5_t ctx, uint8_t reg, uint8_t tx_buf, uint8_t tx_len)
	I2C MUX 5 I2C writing function.

err_t	i2cmux5_generic_read (i2cmux5_t ctx, uint8_t reg, uint8_t rx_buf, uint8_t rx_len)
	I2C MUX 5 I2C reading function.

uint8_t	i2cmux5_check_ch_alert (i2cmux5_t *ctx, uint8_t n_channel)
	I2C MUX 5 check channel alert function.

void	i2cmux5_channel_write_byte (i2cmux5_t *ctx, uint8_t sel_ch, uint8_t ch_slave_addr, uint8_t reg, uint8_t tx_data)
	I2C MUX 5 I2C channel writing function.

uint8_t	i2cmux5_channel_read_byte (i2cmux5_t *ctx, uint8_t sel_ch, uint8_t ch_slave_addr, uint8_t reg)
	I2C MUX 5 I2C channel reading function.

Detailed Description

This file contains API for I2C MUX 5 Click Driver.

Data Structures

Macros

Functions

Detailed Description