mram3.h File Reference

This file contains API for MRAM 3 Click Driver. More...

#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"

Go to the source code of this file.

Data Structures
struct	mram3_t
	MRAM 3 Click context object. More...
struct	mram3_cfg_t
	MRAM 3 Click configuration object. More...

Macros
#define	MRAM3_CMD_NOP   0x00
	MRAM 3 control instruction set.
#define	MRAM3_CMD_WRITE_ENABLE   0x06
#define	MRAM3_CMD_WRITE_DISABLE   0x04
#define	MRAM3_CMD_ENABLE_DPI   0x37
#define	MRAM3_CMD_ENABLE_QPI   0x38
#define	MRAM3_CMD_ENABLE_SPI   0xFF
#define	MRAM3_CMD_ENTER_DEEP_POWER_DOWN   0xB9
#define	MRAM3_CMD_ENTER_HIBERNATE   0xBA
#define	MRAM3_CMD_SOFT_RESET_ENABLE   0x66
#define	MRAM3_CMD_SOFT_RESET   0x99
#define	MRAM3_CMD_EXIT_DEEP_POWER_DOWN   0xAB
#define	MRAM3_CMD_READ_STATUS   0x05
	MRAM 3 read register instruction set.
#define	MRAM3_CMD_READ_CONFIG_1   0x35
#define	MRAM3_CMD_READ_CONFIG_2   0x3F
#define	MRAM3_CMD_READ_CONFIG_3   0x44
#define	MRAM3_CMD_READ_CONFIG_4   0x45
#define	MRAM3_CMD_READ_CONFIG_ALL   0x46
#define	MRAM3_CMD_READ_DEVICE_ID   0x9F
#define	MRAM3_CMD_READ_UNIQUE_ID   0x4C
#define	MRAM3_CMD_READ_SERIAL_NUMBER   0xC3
#define	MRAM3_CMD_READ_AUG_ARRAY_PROTECT   0x14
#define	MRAM3_CMD_READ_ADDRESS_BASED   0x65
#define	MRAM3_CMD_WRITE_STATUS   0x01
	MRAM 3 write register instruction set.
#define	MRAM3_CMD_WRITE_CONFIG_ALL   0x87
#define	MRAM3_CMD_WRITE_SERIAL_NUMBER   0xC2
#define	MRAM3_CMD_WRITE_AUG_ARRAY_PROTECT   0x1A
#define	MRAM3_CMD_WRITE_ADDRESS_BASED   0x71
#define	MRAM3_CMD_READ_MEMORY_SDR   0x03
	MRAM 3 read memory array instruction set.
#define	MRAM3_CMD_FAST_READ_MEMORY_SDR   0x0B
#define	MRAM3_CMD_FAST_READ_MEMORY_DDR   0x0D
#define	MRAM3_CMD_READ_DUAL_OUT_MEMORY_SDR   0x3B
#define	MRAM3_CMD_READ_QUAD_OUT_MEMORY_SDR   0x6B
#define	MRAM3_CMD_READ_DUAL_IO_MEMORY_SDR   0xBB
#define	MRAM3_CMD_READ_DUAL_IO_MEMORY_DDR   0xBD
#define	MRAM3_CMD_READ_QUAD_IO_MEMORY_SDR   0xEB
#define	MRAM3_CMD_READ_QUAD_IO_MEMORY_DDR   0xED
#define	MRAM3_CMD_WRITE_MEMORY_SDR   0x02
	MRAM 3 write memory array instruction set.
#define	MRAM3_CMD_FAST_WRITE_MEMORY_SDR   0xDA
#define	MRAM3_CMD_FAST_WRITE_MEMORY_DDR   0xDE
#define	MRAM3_CMD_WRITE_DUAL_IN_MEMORY_SDR   0xA2
#define	MRAM3_CMD_WRITE_QUAD_IN_MEMORY_SDR   0x32
#define	MRAM3_CMD_WRITE_QUAD_IN_MEMORY_DDR   0x31
#define	MRAM3_CMD_WRITE_DUAL_IO_MEMORY_SDR   0xA1
#define	MRAM3_CMD_WRITE_QUAD_IO_MEMORY_SDR   0xD2
#define	MRAM3_CMD_WRITE_QUAD_IO_MEMORY_DDR   0xD1
#define	MRAM3_CMD_READ_AUG_STORAGE_SDR   0x4B
	MRAM 3 augmented storage array instruction set.
#define	MRAM3_CMD_WRITE_AUG_STORAGE_SDR   0x42
#define	MRAM3_STATUS_WPEN   0x80
	MRAM 3 status register settings.
#define	MRAM3_STATUS_SNPEN   0x40
#define	MRAM3_STATUS_TBSEL_BOTTOM   0x20
#define	MRAM3_STATUS_TBSEL_TOP   0x00
#define	MRAM3_STATUS_BPSEL_NONE   0x00
#define	MRAM3_STATUS_BPSEL_UPPER_1_64   0x04
#define	MRAM3_STATUS_BPSEL_UPPER_1_32   0x08
#define	MRAM3_STATUS_BPSEL_UPPER_1_16   0x0C
#define	MRAM3_STATUS_BPSEL_UPPER_1_8   0x10
#define	MRAM3_STATUS_BPSEL_UPPER_QUARTER   0x14
#define	MRAM3_STATUS_BPSEL_UPPER_HALF   0x18
#define	MRAM3_STATUS_BPSEL_ALL   0x1C
#define	MRAM3_STATUS_WREN   0x02
#define	MRAM3_CONFIG1_MAPLK_LOCK   0x04
	MRAM 3 config registers settings.
#define	MRAM3_CONFIG1_MAPLK_UNLOCK   0x00
#define	MRAM3_CONFIG1_ASPLK_LOCK   0x01
#define	MRAM3_CONFIG1_ASPLK_UNLOCK   0x00
#define	MRAM3_CONFIG2_QUAD_SPI   0x40
#define	MRAM3_CONFIG2_DUAL_SPI   0x10
#define	MRAM3_CONFIG2_MLATS_0_CYCLES   0x00
#define	MRAM3_CONFIG2_MLATS_1_CYCLE   0x01
#define	MRAM3_CONFIG2_MLATS_2_CYCLES   0x02
#define	MRAM3_CONFIG2_MLATS_3_CYCLES   0x03
#define	MRAM3_CONFIG2_MLATS_4_CYCLES   0x04
#define	MRAM3_CONFIG2_MLATS_5_CYCLES   0x05
#define	MRAM3_CONFIG2_MLATS_6_CYCLES   0x06
#define	MRAM3_CONFIG2_MLATS_7_CYCLES   0x07
#define	MRAM3_CONFIG2_MLATS_8_CYCLES   0x08
#define	MRAM3_CONFIG2_MLATS_9_CYCLES   0x09
#define	MRAM3_CONFIG2_MLATS_10_CYCLES   0x0A
#define	MRAM3_CONFIG2_MLATS_11_CYCLES   0x0B
#define	MRAM3_CONFIG2_MLATS_12_CYCLES   0x0C
#define	MRAM3_CONFIG2_MLATS_13_CYCLES   0x0D
#define	MRAM3_CONFIG2_MLATS_14_CYCLES   0x0E
#define	MRAM3_CONFIG2_MLATS_15_CYCLES   0x0F
#define	MRAM3_CONFIG3_ODSEL_35OHM   0x00
#define	MRAM3_CONFIG3_ODSEL_75OHM   0x20
#define	MRAM3_CONFIG3_ODSEL_60OHM   0x40
#define	MRAM3_CONFIG3_ODSEL_45OHM   0x60
#define	MRAM3_CONFIG3_ODSEL_40OHM   0xA0
#define	MRAM3_CONFIG3_ODSEL_20OHM   0xC0
#define	MRAM3_CONFIG3_ODSEL_15OHM   0xE0
#define	MRAM3_CONFIG3_WRAPS_ENABLE   0x10
#define	MRAM3_CONFIG3_WRPLS_16BYTE   0x00
#define	MRAM3_CONFIG3_WRPLS_32BYTE   0x01
#define	MRAM3_CONFIG3_WRPLS_64BYTE   0x02
#define	MRAM3_CONFIG3_WRPLS_128BYTE   0x03
#define	MRAM3_CONFIG3_WRPLS_256BYTE   0x04
#define	MRAM3_CONFIG4_WRENS_NORMAL   0x04
#define	MRAM3_CONFIG4_WRENS_SRAM   0x05
#define	MRAM3_CONFIG4_WRENS_BACK_TO_BACK   0x06
#define	MRAM3_MIN_ADDRESS   0x000000
	MRAM 3 memory address range.
#define	MRAM3_MAX_ADDRESS   0x01FFFFul
#define	MRAM3_DEVICE_ID   0xE6010102ul
	MRAM 3 device ID.
#define	MRAM3_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
	Data sample selection.
#define	MRAM3_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE
#define	MRAM3_MAP_MIKROBUS(cfg, mikrobus)
	MikroBUS pin mapping.

Enumerations
enum	mram3_return_value_t { MRAM3_OK = 0 , MRAM3_ERROR = -1 }
	MRAM 3 Click return value data. More...

Functions
void	mram3_cfg_setup (mram3_cfg_t *cfg)
	MRAM 3 configuration object setup function.
err_t	mram3_init (mram3_t *ctx, mram3_cfg_t *cfg)
	MRAM 3 initialization function.
err_t	mram3_default_cfg (mram3_t *ctx)
	MRAM 3 default configuration function.
err_t	mram3_write_cmd (mram3_t *ctx, uint8_t cmd)
	MRAM 3 write cmd function.
err_t	mram3_write_cmd_data (mram3_t *ctx, uint8_t cmd, uint8_t *data_in, uint8_t len)
	MRAM 3 write cmd data function.
err_t	mram3_read_cmd_data (mram3_t *ctx, uint8_t cmd, uint8_t *data_out, uint8_t len)
	MRAM 3 read cmd data function.
err_t	mram3_write_cmd_address_data (mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_in, uint32_t len)
	MRAM 3 write cmd address data function.
err_t	mram3_read_cmd_address_data (mram3_t *ctx, uint8_t cmd, uint32_t address, uint8_t *data_out, uint32_t len)
	MRAM 3 read cmd address data function.
err_t	mram3_memory_write (mram3_t *ctx, uint32_t address, uint8_t *data_in, uint32_t len)
	MRAM 3 memory write function.
err_t	mram3_memory_read (mram3_t *ctx, uint32_t address, uint8_t *data_out, uint32_t len)
	MRAM 3 memory read function.
err_t	mram3_aug_memory_write (mram3_t *ctx, uint8_t address, uint8_t *data_in, uint8_t len)
	MRAM 3 aug memory write function.
err_t	mram3_aug_memory_read (mram3_t *ctx, uint8_t address, uint8_t *data_out, uint8_t len)
	MRAM 3 aug memory read function.
err_t	mram3_check_communication (mram3_t *ctx)
	MRAM 3 check communication function.
err_t	mram3_write_protect (mram3_t *ctx)
	MRAM 3 write protect function.
err_t	mram3_write_enable (mram3_t *ctx)
	MRAM 3 write enable function.
err_t	mram3_soft_reset (mram3_t *ctx)
	MRAM 3 soft reset function.
err_t	mram3_write_status (mram3_t *ctx, uint8_t status)
	MRAM 3 write status function.
err_t	mram3_read_status (mram3_t *ctx, uint8_t *status)
	MRAM 3 read status function.

Detailed Description

This file contains API for MRAM 3 Click Driver.

Enumeration Type Documentation

mram3_return_value_t

enum mram3_return_value_t

MRAM 3 Click return value data.

Predefined enum values for driver return values.

Enumerator
MRAM3_OK
MRAM3_ERROR