ultrasonic5 2.1.0.0
ultrasonic5.h File Reference

This file contains API for Ultrasonic 5 Click Driver. More...

#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"
#include "drv_analog_in.h"
#include "drv_pwm.h"

Go to the source code of this file.

Data Structures

struct  ultrasonic5_t
 Ultrasonic 5 Click context object. More...
 
struct  ultrasonic5_cfg_t
 Ultrasonic 5 Click configuration object. More...
 

Macros

#define ULTRASONIC5_REG_BPF_CONFIG_1   0x10
 Ultrasonic 5 registers list.
 
#define ULTRASONIC5_REG_BPF_CONFIG_2   0x11
 
#define ULTRASONIC5_REG_DEV_CTRL_1   0x12
 
#define ULTRASONIC5_REG_DEV_CTRL_2   0x13
 
#define ULTRASONIC5_REG_DEV_CTRL_3   0x14
 
#define ULTRASONIC5_REG_VDRV_CTRL   0x16
 
#define ULTRASONIC5_REG_ECHO_INT_CONFIG   0x17
 
#define ULTRASONIC5_REG_ZC_CONFIG   0x18
 
#define ULTRASONIC5_REG_BURST_PULSE   0x1A
 
#define ULTRASONIC5_REG_TOF_CONFIG   0x1B
 
#define ULTRASONIC5_REG_DEV_STAT   0x1C
 
#define ULTRASONIC5_REG_DEVICE_ID   0x1D
 
#define ULTRASONIC5_REG_REV_ID   0x1E
 
#define ULTRASONIC5_BPF_CONFIG_1_FC_TRIM_FRC   0x80
 Ultrasonic 5 BPF_CONFIG_1 register settings.
 
#define ULTRASONIC5_BPF_CONFIG_1_BYPASS   0x40
 
#define ULTRASONIC5_BPF_CONFIG_1_HPF_FREQ_MASK   0x3F
 
#define ULTRASONIC5_BPF_CONFIG_1_RESET   0x00
 
#define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_4   0x00
 Ultrasonic 5 BPF_CONFIG_2 register settings.
 
#define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_5   0x10
 
#define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_2   0x20
 
#define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_3   0x30
 
#define ULTRASONIC5_BPF_CONFIG_2_Q_SEL_MASK   0x30
 
#define ULTRASONIC5_BPF_CONFIG_2_FC_TRIM_MASK   0x0F
 
#define ULTRASONIC5_BPF_CONFIG_2_RESET   0x00
 
#define ULTRASONIC5_DEV_CTRL_1_LOGAMP_FRC   0x80
 Ultrasonic 5 DEV_CTRL_1 register settings.
 
#define ULTRASONIC5_DEV_CTRL_1_LOGAMP_SLP_ADJ_MASK   0x70
 
#define ULTRASONIC5_DEV_CTRL_1_LOGAMP_INT_ADJ_MASK   0x0F
 
#define ULTRASONIC5_DEV_CTRL_1_RESET   0x00
 
#define ULTRASONIC5_DEV_CTRL_2_LOGAMP_DIS_FIRST   0x80
 Ultrasonic 5 DEV_CTRL_2 register settings.
 
#define ULTRASONIC5_DEV_CTRL_2_LOGAMP_DIS_LAST   0x40
 
#define ULTRASONIC5_DEV_CTRL_2_VOUT_SCALE_SEL_5V   0x04
 
#define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_15V   0x00
 
#define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_10V   0x01
 
#define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_20V   0x02
 
#define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_12_5V   0x03
 
#define ULTRASONIC5_DEV_CTRL_2_LNA_GAIN_MASK   0x03
 
#define ULTRASONIC5_DEV_CTRL_2_RESET   0x00
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_64US   0x00
 Ultrasonic 5 DEV_CTRL_3 register settings.
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_48US   0x04
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_32US   0x08
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_24US   0x0C
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_16US   0x10
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_8US   0x14
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_4US   0x18
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_DIS   0x1C
 
#define ULTRASONIC5_DEV_CTRL_3_DRV_PLS_FLT_DT_MASK   0x1C
 
#define ULTRASONIC5_DEV_CTRL_3_IO_MODE_0   0x00
 
#define ULTRASONIC5_DEV_CTRL_3_IO_MODE_1   0x01
 
#define ULTRASONIC5_DEV_CTRL_3_IO_MODE_2   0x02
 
#define ULTRASONIC5_DEV_CTRL_3_IO_MODE_3   0x03
 
#define ULTRASONIC5_DEV_CTRL_3_IO_MODE_MASK   0x03
 
#define ULTRASONIC5_DEV_CTRL_3_RESET   0x00
 
#define ULTRASONIC5_VDRV_CTRL_DIS_VDRV_REG_LSTN   0x40
 Ultrasonic 5 VDRV_CTRL register settings.
 
#define ULTRASONIC5_VDRV_CTRL_VDRV_HI_Z   0x20
 
#define ULTRASONIC5_VDRV_CTRL_VDRV_CURR_LVL_20MA   0x10
 
#define ULTRASONIC5_VDRV_CTRL_VDRV_VOLT_LVL_5V   0x00
 
#define ULTRASONIC5_VDRV_CTRL_VDRV_VOLT_LVL_MASK   0x0F
 
#define ULTRASONIC5_VDRV_CTRL_RESET   0x20
 
#define ULTRASONIC5_ECHO_INT_CONFIG_CMP_EN   0x10
 Ultrasonic 5 ECHO_INT_CONFIG register settings.
 
#define ULTRASONIC5_ECHO_INT_CONFIG_THR_SEL_MASK   0x0F
 
#define ULTRASONIC5_ECHO_INT_CONFIG_RESET   0x07
 
#define ULTRASONIC5_ZC_CONFIG_CMP_EN   0x80
 Ultrasonic 5 ZC_CONFIG register settings.
 
#define ULTRASONIC5_ZC_CONFIG_EN_ECHO_INT   0x40
 
#define ULTRASONIC5_ZC_CONFIG_CMP_IN_SEL   0x20
 
#define ULTRASONIC5_ZC_CONFIG_CMP_STG_SEL_MASK   0x18
 
#define ULTRASONIC5_ZC_CONFIG_CMP_HYST_MASK   0x07
 
#define ULTRASONIC5_ZC_CONFIG_RESET   0x14
 
#define ULTRASONIC5_BURST_PULSE_HALF_BRG_MODE   0x80
 Ultrasonic 5 BURST_PULSE register settings.
 
#define ULTRASONIC5_BURST_PULSE_PRE_DRIVER_MODE   0x40
 
#define ULTRASONIC5_BURST_PULSE_BURST_PULSE_16   0x0F
 
#define ULTRASONIC5_BURST_PULSE_BURST_PULSE_MASK   0x3F
 
#define ULTRASONIC5_BURST_PULSE_RESET   0x00
 
#define ULTRASONIC5_TOF_CONFIG_SLEEP_MODE_EN   0x80
 Ultrasonic 5 TOF_CONFIG register settings.
 
#define ULTRASONIC5_TOF_CONFIG_STDBY_MODE_EN   0x40
 
#define ULTRASONIC5_TOF_CONFIG_VDRV_TRIGGER   0x02
 
#define ULTRASONIC5_TOF_CONFIG_CMD_TRIGGER   0x01
 
#define ULTRASONIC5_TOF_CONFIG_RESET   0x00
 
#define ULTRASONIC5_DEF_FREQ   40000
 Ultrasonic 5 default PWM settings.
 
#define ULTRASONIC5_DEF_DYTY   0.5f
 
#define ULTRASONIC5_DEVICE_ID   0xB9
 Ultrasonic 5 device ID.
 
#define ULTRASONIC5_ODD_PARITY   0x01
 Ultrasonic 5 ODD parity flag.
 
#define ULTRASONIC5_SET_DATA_SAMPLE_EDGE   SET_SPI_DATA_SAMPLE_EDGE
 Data sample selection.
 
#define ULTRASONIC5_SET_DATA_SAMPLE_MIDDLE   SET_SPI_DATA_SAMPLE_MIDDLE
 
#define ULTRASONIC5_MAP_MIKROBUS(cfg, mikrobus)
 MikroBUS pin mapping.
 

Enumerations

enum  ultrasonic5_return_value_t { ULTRASONIC5_OK = 0 , ULTRASONIC5_ERROR = -1 }
 Ultrasonic 5 Click return value data. More...
 

Functions

void ultrasonic5_cfg_setup (ultrasonic5_cfg_t *cfg)
 Ultrasonic 5 configuration object setup function.
 
err_t ultrasonic5_init (ultrasonic5_t *ctx, ultrasonic5_cfg_t *cfg)
 Ultrasonic 5 initialization function.
 
err_t ultrasonic5_default_cfg (ultrasonic5_t *ctx)
 Ultrasonic 5 default configuration function.
 
err_t ultrasonic5_write_register (ultrasonic5_t *ctx, uint8_t reg, uint8_t data_in)
 Ultrasonic 5 data writing function.
 
err_t ultrasonic5_read_register (ultrasonic5_t *ctx, uint8_t reg, uint8_t *data_out)
 Ultrasonic 5 data reading function.
 
err_t ultrasonic5_check_communication (ultrasonic5_t *ctx)
 Ultrasonic 5 check communication function.
 
void ultrasonic5_set_io1_pin (ultrasonic5_t *ctx)
 Ultrasonic 5 set io1 pin function.
 
void ultrasonic5_clear_io1_pin (ultrasonic5_t *ctx)
 Ultrasonic 5 clear io1 pin function.
 
uint8_t ultrasonic5_get_out4_pin (ultrasonic5_t *ctx)
 Ultrasonic 5 get out4 pin function.
 
err_t ultrasonic5_read_an_pin_value (ultrasonic5_t *ctx, uint16_t *data_out)
 Ultrasonic 5 read AN pin value function.
 
err_t ultrasonic5_read_an_pin_voltage (ultrasonic5_t *ctx, float *data_out)
 Ultrasonic 5 read AN pin voltage level function.
 
err_t ultrasonic5_set_duty_cycle (ultrasonic5_t *ctx, float duty_cycle)
 Ultrasonic 5 sets PWM duty cycle.
 
err_t ultrasonic5_pwm_stop (ultrasonic5_t *ctx)
 Ultrasonic 5 stop PWM module.
 
err_t ultrasonic5_pwm_start (ultrasonic5_t *ctx)
 Ultrasonic 5 start PWM module.
 

Detailed Description

This file contains API for Ultrasonic 5 Click Driver.

Enumeration Type Documentation

◆ ultrasonic5_return_value_t

Ultrasonic 5 Click return value data.

Predefined enum values for driver return values.

Enumerator
ULTRASONIC5_OK 
ULTRASONIC5_ERROR