adc4 2.0.0.0
adc4.h
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1/*
2 * MikroSDK - MikroE Software Development Kit
3 * Copyright© 2020 MikroElektronika d.o.o.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without restriction,
8 * including without limitation the rights to use, copy, modify, merge,
9 * publish, distribute, sublicense, and/or sell copies of the Software,
10 * and to permit persons to whom the Software is furnished to do so,
11 * subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
22 * OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
33// ----------------------------------------------------------------------------
34
35#ifndef ADC4_H
36#define ADC4_H
37
42#ifdef PREINIT_SUPPORTED
43#include "preinit.h"
44#endif
45
46#ifdef MikroCCoreVersion
47 #if MikroCCoreVersion >= 1
48 #include "delays.h"
49 #endif
50#endif
51
52#include "drv_digital_out.h"
53#include "drv_digital_in.h"
54#include "drv_spi_master.h"
55
56// -------------------------------------------------------------- PUBLIC MACROS
67#define ADC4_MAP_MIKROBUS( cfg, mikrobus ) \
68 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
69 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
70 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
71 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
72 cfg.err = MIKROBUS( mikrobus, MIKROBUS_INT )
79#define ADC4_RETVAL uint8_t
80
81#define ADC4_OK 0x00
82#define ADC4_INIT_ERROR 0xFF
89#define ADC4_RESOLUTION 8388607
96#define ADC4_VREF_4000MV 4.096
97#define ADC4_VREF_2500MV 2.5
104#define ADC4_STATUS_REG 0x00
105#define ADC4_MODE_REG 0x01
106#define ADC4_IFACE_MODE_REG 0x02
107#define ADC4_CHECK_REG 0x03
108#define ADC4_DATA_REG 0x04
109#define ADC4_GPIO_CONFIG_REG 0x06
110#define ADC4_ID_REG 0x07
111#define ADC4_SETUP_CONFIGURATION_REG 0x20
118#define ADC4_CH_REG_BASE 0x10
119#define ADC4_CON_REG_BASE 0x20
120#define ADC4_FILCON_REG_BASE 0x28
121#define ADC4_OFFSET_REG_BASE 0x30
122#define ADC4_GAIN_REG_BASE 0x38
129#define ADC4_STATUS_RDY 0x80
130#define ADC4_STATUS_ERR 0x40
131#define ADC4_STATUS_CRC_ERR 0x20
132#define ADC4_STATUS_REG_ERR 0x10
133#define ADC4_STATUS_CH_ACTIVE 0x0F
140#define ADC4_MODE_INT_REF_AND_SING_CYC_EN 0xA000
141#define ADC4_MODE_INT_REF_EN 0x8000
142#define ADC4_MODE_HIDE_RELAY_DIS 0x4000
143#define ADC4_MODE_SING_CYC_EN 0x2000
144#define ADC4_MODE_DELAY_0 0x0000
145#define ADC4_MODE_DELAY_4 0x0100
146#define ADC4_MODE_DELAY_16 0x0200
147#define ADC4_MODE_DELAY_40 0x0300
148#define ADC4_MODE_DELAY_100 0x0400
149#define ADC4_MODE_DELAY_200 0x0500
150#define ADC4_MODE_DELAY_500 0x0600
151#define ADC4_MODE_DELAY_1000 0x0700
152#define ADC4_MODE_CONTINUOUS 0x0000
153#define ADC4_MODE_SINGLE 0x0010
154#define ADC4_MODE_STBY 0x0020
155#define ADC4_MODE_POWER_DOWN 0x0030
156#define ADC4_MODE_INTERNAL_OFFSET 0x0040
157#define ADC4_MODE_SYSTEM_OFFSET 0x0060
158#define ADC4_MODE_GAIN_OFFSET 0x0070
159#define ADC4_MODE_CLK_INTOSC 0x0000
160#define ADC4_MODE_CLK_INTOSC_XT2 0x0002
161#define ADC4_MODE_CLK_EXTOSC_XT2 0x0004
162#define ADC4_MODE_CLK_EXTOSC 0x0006
169#define ADC4_IFACE_MODE_ALTSYNC_EN 0x1000
170#define ADC4_IFACE_MODE_IOSTREN_EN 0x0800
171#define ADC4_IFACE_MODE_DOUTRES_EN 0x0100
172#define ADC4_IFACE_MODE_CONTRD_EN 0x0080
173#define ADC4_IFACE_MODE_DATASTA_EN 0x0040
174#define ADC4_IFACE_MODE_REGCHK_EN 0x0020
175#define ADC4_IFACE_MODE_CRC_DIS 0x0000
176#define ADC4_IFACE_MODE_CRC_RD_EN 0x0002
177#define ADC4_IFACE_MODE_CRC_RW_EN 0x0004
184#define ADC4_CFG_PDSW 0x4000
185#define ADC4_CFG_OP_EN2_3 0x2000
186#define ADC4_CFG_MUX_IO 0x1000
187#define ADC4_CFG_SYNC_EN 0x0800
188#define ADC4_CFG_ERR_DISABLE 0x0000
189#define ADC4_CFG_ERR_INPUT 0x0400
190#define ADC4_CFG_ERR_OPENDRAIN 0x0200
191#define ADC4_CFG_ERR_OUTPUT 0x0600
192#define ADC4_CFG_ERR_DAT 0x0010
199#define ADC4_CH_EN 0x8000
200#define ADC4_CH_SETUP_0 0x0001 << 12
201#define ADC4_CH_SETUP_1 0x0002 << 12
202#define ADC4_CH_SETUP_2 0x0003 << 12
203#define ADC4_CH_SETUP_3 0x0004 << 12
204#define ADC4_CH_SETUP_4 0x0005 << 12
205#define ADC4_CH_SETUP_5 0x0006 << 12
206#define ADC4_CH_SETUP_6 0x0007 << 12
207#define ADC4_CH_SETUP_7 0x0008 << 12
208#define ADC4_CH_AINPOS_0 0x0000 << 5
209#define ADC4_CH_AINPOS_1 0x0001 << 5
210#define ADC4_CH_AINPOS_2 0x0002 << 5
211#define ADC4_CH_AINPOS_3 0x0003 << 5
212#define ADC4_CH_AINPOS_4 0x0004 << 5
213#define ADC4_CH_AINPOS_5 0x0005 << 5
214#define ADC4_CH_AINPOS_6 0x0006 << 5
215#define ADC4_CH_AINPOS_7 0x0007 << 5
216#define ADC4_CH_AINPOS_8 0x0008 << 5
217#define ADC4_CH_AINPOS_9 0x0009 << 5
218#define ADC4_CH_AINPOS_10 0x000A << 5
219#define ADC4_CH_AINPOS_11 0x000B << 5
220#define ADC4_CH_AINPOS_12 0x000C << 5
221#define ADC4_CH_AINPOS_13 0x000D << 5
222#define ADC4_CH_AINPOS_14 0x000E << 5
223#define ADC4_CH_AINPOS_15 0x000F << 5
224#define ADC4_CH_AINPOS_16 0x0010 << 5
225#define ADC4_CH_AINPOS_TEMP_P 0x0011 << 5
226#define ADC4_CH_AINPOS_TEMP_N 0x0012 << 5
227#define ADC4_CH_AINPOS_AV_P 0x0013 << 5
228#define ADC4_CH_AINPOS_AV_N 0x0014 << 5
229#define ADC4_CH_AINPOS_REF_P 0x0015 << 5
230#define ADC4_CH_AINPOS_REF_N 0x0016 << 5
231#define ADC4_CH_AINNEG_0 0x0000
232#define ADC4_CH_AINNEG_1 0x0001
233#define ADC4_CH_AINNEG_2 0x0002
234#define ADC4_CH_AINNEG_3 0x0003
235#define ADC4_CH_AINNEG_4 0x0004
236#define ADC4_CH_AINNEG_5 0x0005
237#define ADC4_CH_AINNEG_6 0x0006
238#define ADC4_CH_AINNEG_7 0x0007
239#define ADC4_CH_AINNEG_8 0x0008
240#define ADC4_CH_AINNEG_9 0x0009
241#define ADC4_CH_AINNEG_10 0x000A
242#define ADC4_CH_AINNEG_11 0x000B
243#define ADC4_CH_AINNEG_12 0x000C
244#define ADC4_CH_AINNEG_13 0x000D
245#define ADC4_CH_AINNEG_14 0x000E
246#define ADC4_CH_AINNEG_15 0x000F
247#define ADC4_CH_AINNEG_16 0x0010
248#define ADC4_CH_AINNEG_TEMP_P 0x0011
249#define ADC4_CH_AINNEG_TEMP_N 0x0012
250#define ADC4_CH_AINNEG_AV_P 0x0013
251#define ADC4_CH_AINNEG_AV_N 0x0014
252#define ADC4_CH_AINNEG_REF_P 0x0015
253#define ADC4_CH_AINNEG_REF_N 0x0016
260#define ADC4_CON_UNIPOL 0x0000
261#define ADC4_CON_BIPOL 0x0001 << 12
262#define ADC4_CON_REFBUF_P_EN 0x0001 << 11
263#define ADC4_CON_REFBUF_N_EN 0x0001 << 10
264#define ADC4_CON_AINBUF_P_EN 0x0001 << 9
265#define ADC4_CON_AINBUF_N_EN 0x0001 << 8
266#define ADC4_CON_BURNOUT_EN 0x0001 << 7
267#define ADC4_CON_EXTREF 0x0000
268#define ADC4_CON_EXTREF_SUPP 0x0001 << 4
269#define ADC4_CON_EXTREF_INT 0x0002 << 4
270#define ADC4_CON_EXTREF_AV 0x0003 << 4
277#define ADC4_FILCON_SINC_MAP0 0x8000
278#define ADC4_FILCON_ENHFILEN 0x0001 << 11
279#define ADC4_FILCON_ENHFIL_SET1 0x0002 << 8
280#define ADC4_FILCON_EHFFIL_SET2 0x0003 << 8
281#define ADC4_FILCON_ENHFIL_SET3 0x0005 << 8
282#define ADC4_FILCON_ENHFIL_SET4 0x0006 << 8
283#define ADC4_FILCON_ORD_SINC5 0x0000
284#define ADC4_FILCON_ORD_SINC3 0x0003 << 5
285#define ADC4_FILCON_ODR_250000 0x0000
286#define ADC4_FILCON_ODR_125000 0x0001
287#define ADC4_FILCON_ODR_62500 0x0002
288#define ADC4_FILCON_ODR_50000 0x0003
289#define ADC4_FILCON_ODR_31250 0x0004
290#define ADC4_FILCON_ODR_25000 0x0005
291#define ADC4_FILCON_ODR_15625 0x0006
292#define ADC4_FILCON_ODR_10000 0x0007
293#define ADC4_FILCON_ODR_5000 0x0008
294#define ADC4_FILCON_ODR_2500 0x0009
295#define ADC4_FILCON_ODR_1000 0x000A
296#define ADC4_FILCON_ODR_500 0x000B
297#define ADC4_FILCON_ODR_397_5 0x000C
298#define ADC4_FILCON_ODR_200 0x000D
299#define ADC4_FILCON_ODR_100 0x000E
300#define ADC4_FILCON_ODR_59_92 0x000F
301#define ADC4_FILCON_ODR_49_96 0x0010
302#define ADC4_FILCON_ODR_20 0x0011
303#define ADC4_FILCON_ODR_16_66 0x0012
304#define ADC4_FILCON_ODR_10 0x0013
305#define ADC4_FILCON_ODR_5 0x0014
308 // End group macro
309// --------------------------------------------------------------- PUBLIC TYPES
318typedef struct
319{
320 digital_out_t cs;
321
322 // Input pins
323
324 digital_in_t err;
325
326 // Modules
327
328 spi_master_t spi;
329 pin_name_t chip_select;
330
331 uint16_t w_dog;
332 uint8_t sing_bit;
333
334} adc4_t;
335
339typedef struct
340{
341 // Communication gpio pins
342
343 pin_name_t miso;
344 pin_name_t mosi;
345 pin_name_t sck;
346 pin_name_t cs;
347
348 // Additional gpio pins
349
350 pin_name_t err;
351
352 // static variable
353
354 uint32_t spi_speed;
355 spi_master_mode_t spi_mode;
356 spi_master_chip_select_polarity_t cs_polarity;
357
358} adc4_cfg_t;
359
360 // End types group
361// ----------------------------------------------- PUBLIC FUNCTION DECLARATIONS
362
367#ifdef __cplusplus
368extern "C"{
369#endif
370
380
390
399
424void adc4_generic_transfer ( adc4_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len );
425
437uint8_t adc4_write_reg ( adc4_t *ctx, const uint8_t reg_address, uint8_t *value );
438
450uint8_t adc4_read_reg ( adc4_t *ctx, const uint8_t reg_address, uint8_t *value );
451
459void adc4_reset ( adc4_t *ctx );
460
470uint8_t adc4_get_err_pin ( adc4_t *ctx );
471
481void adc4_get_config ( adc4_t *ctx, uint8_t reg_address, uint16_t *value );
482
492void adc4_set_config ( adc4_t *ctx, const uint8_t reg_address, uint16_t value );
493
503uint32_t adc4_get_data ( adc4_t *ctx );
504
515uint16_t adc4_get_voltage ( adc4_t *ctx, const float ref_voltage );
516
517#ifdef __cplusplus
518}
519#endif
520#endif // _ADC4_H_
521
522 // End public_function group
524
525// ------------------------------------------------------------------------- END
#define ADC4_RETVAL
Definition adc4.h:79
uint32_t adc4_get_data(adc4_t *ctx)
Get data function.
uint8_t adc4_read_reg(adc4_t *ctx, const uint8_t reg_address, uint8_t *value)
Generic Write Function.
void adc4_default_cfg(adc4_t *ctx)
Click Default Configuration function.
void adc4_set_config(adc4_t *ctx, const uint8_t reg_address, uint16_t value)
Set configuration function.
void adc4_get_config(adc4_t *ctx, uint8_t reg_address, uint16_t *value)
Get configuration function.
void adc4_generic_transfer(adc4_t *ctx, uint8_t *wr_buf, uint16_t wr_len, uint8_t *rd_buf, uint16_t rd_len)
Generic transfer function.
uint16_t adc4_get_voltage(adc4_t *ctx, const float ref_voltage)
Get voltage function.
uint8_t adc4_get_err_pin(adc4_t *ctx)
Error check function.
void adc4_reset(adc4_t *ctx)
Reset function.
void adc4_cfg_setup(adc4_cfg_t *cfg)
Config Object Initialization function.
ADC4_RETVAL adc4_init(adc4_t *ctx, adc4_cfg_t *cfg)
Initialization function.
uint8_t adc4_write_reg(adc4_t *ctx, const uint8_t reg_address, uint8_t *value)
Generic Write Function.
Click configuration structure definition.
Definition adc4.h:340
spi_master_chip_select_polarity_t cs_polarity
Definition adc4.h:356
pin_name_t sck
Definition adc4.h:345
pin_name_t err
Definition adc4.h:350
spi_master_mode_t spi_mode
Definition adc4.h:355
pin_name_t mosi
Definition adc4.h:344
uint32_t spi_speed
Definition adc4.h:354
pin_name_t miso
Definition adc4.h:343
pin_name_t cs
Definition adc4.h:346
Click ctx object definition.
Definition adc4.h:319
digital_out_t cs
Definition adc4.h:320
spi_master_t spi
Definition adc4.h:328
uint8_t sing_bit
Definition adc4.h:332
uint16_t w_dog
Definition adc4.h:331
digital_in_t err
Definition adc4.h:324
pin_name_t chip_select
Definition adc4.h:329