42#ifdef PREINIT_SUPPORTED
46#ifdef MikroCCoreVersion
47 #if MikroCCoreVersion >= 1
52#include "drv_digital_out.h"
53#include "drv_digital_in.h"
54#include "drv_spi_master.h"
68#define C9DOF2_MAP_MIKROBUS( cfg, mikrobus ) \
69 cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
70 cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
71 cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
72 cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
73 cfg.snc = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
74 cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
81#define C9DOF2_RETVAL uint8_t
84#define C9DOF2_INIT_ERROR 0xFF
91#define C9DOF2_AK09916_ADR 0x0C
92#define C9DOF2_WHO_AM_I_AK09916 0x01
93#define C9DOF2_AK09916_ST1 0x10
94#define C9DOF2_AK09916_XOUT_L 0x11
95#define C9DOF2_AK09916_XOUT_H 0x12
96#define C9DOF2_AK09916_YOUT_L 0x13
97#define C9DOF2_AK09916_YOUT_H 0x14
98#define C9DOF2_AK09916_ZOUT_L 0x15
99#define C9DOF2_AK09916_ZOUT_H 0x16
100#define C9DOF2_AK09916_ST2 0x18
101#define C9DOF2_AK09916_CNTL 0x30
102#define C9DOF2_AK09916_CNTL2 0x31
109#define C9DOF2_WHO_AM_I_ICM20948 0x00
110#define C9DOF2_USER_CTRL 0x03
111#define C9DOF2_LP_CCFG 0x05
112#define C9DOF2_PWR_MGMT_1 0x06
113#define C9DOF2_PWR_MGMT_2 0x07
114#define C9DOF2_INT_PIN_CFG 0x0F
115#define C9DOF2_INT_EN 0x10
116#define C9DOF2_INT_EN_1 0x11
117#define C9DOF2_INT_EN_2 0x12
118#define C9DOF2_INT_EN_3 0x13
119#define C9DOF2_I2C_MST_STAT 0x17
120#define C9DOF2_INT_STAT 0x19
121#define C9DOF2_INT_STAT_1 0x1A
122#define C9DOF2_INT_STAT_2 0x1B
123#define C9DOF2_INT_STAT_3 0x1C
124#define C9DOF2_DELAY_TIMEH 0x28
125#define C9DOF2_DELAY_TIMEL 0x29
126#define C9DOF2_ACCEL_XOUT_H 0x2D
127#define C9DOF2_ACCEL_XOUT_L 0x2E
128#define C9DOF2_ACCEL_YOUT_H 0x2F
129#define C9DOF2_ACCEL_YOUT_L 0x30
130#define C9DOF2_ACCEL_ZOUT_H 0x31
131#define C9DOF2_ACCEL_ZOUT_L 0x32
132#define C9DOF2_GYRO_XOUT_H 0x33
133#define C9DOF2_GYRO_XOUT_L 0x34
134#define C9DOF2_GYRO_YOUT_H 0x35
135#define C9DOF2_GYRO_YOUT_L 0x36
136#define C9DOF2_GYRO_ZOUT_H 0x37
137#define C9DOF2_GYRO_ZOUT_L 0x38
138#define C9DOF2_TEMP_OUT_H 0x39
139#define C9DOF2_TEMP_OUT_L 0x3A
140#define C9DOF2_EXT_SENS_DATA_00 0x3B
141#define C9DOF2_EXT_SENS_DATA_01 0x3C
142#define C9DOF2_EXT_SENS_DATA_02 0x3D
143#define C9DOF2_EXT_SENS_DATA_03 0x3E
144#define C9DOF2_EXT_SENS_DATA_04 0x3F
145#define C9DOF2_EXT_SENS_DATA_05 0x40
146#define C9DOF2_EXT_SENS_DATA_06 0x41
147#define C9DOF2_EXT_SENS_DATA_07 0x42
148#define C9DOF2_EXT_SENS_DATA_08 0x43
149#define C9DOF2_EXT_SENS_DATA_09 0x44
150#define C9DOF2_EXT_SENS_DATA_10 0x45
151#define C9DOF2_EXT_SENS_DATA_11 0x46
152#define C9DOF2_EXT_SENS_DATA_12 0x47
153#define C9DOF2_EXT_SENS_DATA_13 0x48
154#define C9DOF2_EXT_SENS_DATA_14 0x49
155#define C9DOF2_EXT_SENS_DATA_15 0x4A
156#define C9DOF2_EXT_SENS_DATA_16 0x4B
157#define C9DOF2_EXT_SENS_DATA_17 0x4C
158#define C9DOF2_EXT_SENS_DATA_18 0x4D
159#define C9DOF2_EXT_SENS_DATA_19 0x4E
160#define C9DOF2_EXT_SENS_DATA_20 0x4F
161#define C9DOF2_EXT_SENS_DATA_21 0x50
162#define C9DOF2_EXT_SENS_DATA_22 0x51
163#define C9DOF2_EXT_SENS_DATA_23 0x52
164#define C9DOF2_FIFO_EN_1 0x66
165#define C9DOF2_FIFO_EN_2 0x67
166#define C9DOF2_FIFO_RST 0x68
167#define C9DOF2_FIFO_MODE 0x69
168#define C9DOF2_FIFO_CNT_H 0x70
169#define C9DOF2_FIFO_CNT_L 0x71
170#define C9DOF2_FIFO_R_W 0x72
171#define C9DOF2_DATA_RDY_STAT 0x74
172#define C9DOF2_FIFO_CFG 0x76
173#define C9DOF2_REG_BANK_SEL 0x7F
180#define C9DOF2_SELF_TEST_X_GYRO 0x02
181#define C9DOF2_SELF_TEST_Y_GYRO 0x03
182#define C9DOF2_SELF_TEST_Z_GYRO 0x04
183#define C9DOF2_SELF_TEST_X_ACCEL 0x0E
184#define C9DOF2_SELF_TEST_Y_ACCEL 0x0F
185#define C9DOF2_SELF_TEST_Z_ACCEL 0x10
186#define C9DOF2_XA_OFFSET_H 0x14
187#define C9DOF2_XA_OFFSET_L 0x15
188#define C9DOF2_YA_OFFSET_H 0x17
189#define C9DOF2_YA_OFFSET_L 0x18
190#define C9DOF2_ZA_OFFSET_H 0x1A
191#define C9DOF2_ZA_OFFSET_L 0x1B
192#define C9DOF2_TIMEBASE_CORREC_PLL 0x28
199#define C9DOF2_GYRO_SMPLRT_DIV 0x00
200#define C9DOF2_GYRO_CFG_1 0x01
201#define C9DOF2_GYRO_CFG_2 0x02
202#define C9DOF2_XG_OFFSET_H 0x03
203#define C9DOF2_XG_OFFSET_L 0x04
204#define C9DOF2_YG_OFFSET_H 0x05
205#define C9DOF2_YG_OFFSET_L 0x06
206#define C9DOF2_ZG_OFFSET_H 0x07
207#define C9DOF2_ZG_OFFSET_L 0x08
208#define C9DOF2_ODR_ALIGN_EN 0x09
209#define C9DOF2_ACCEL_SMPLRT_DIV_1 0x10
210#define C9DOF2_ACCEL_SMPLRT_DIV_2 0x11
211#define C9DOF2_ACCEL_INTEL_CTRL 0x12
212#define C9DOF2_ACCEL_WOM_THR 0x13
213#define C9DOF2_ACCEL_CFG 0x14
214#define C9DOF2_ACCEL_CFG_2 0x15
215#define C9DOF2_FSYNC_CFG 0x52
216#define C9DOF2_TEMP_CFG 0x53
217#define C9DOF2_MOD_CTRL_USR 0x54
224#define C9DOF2_I2C_MST_ODR_CFG 0x00
225#define C9DOF2_I2C_MST_CTRL 0x01
226#define C9DOF2_I2C_MST_DELAY_CTRL 0x02
227#define C9DOF2_I2C_SLV0_ADR 0x03
228#define C9DOF2_I2C_SLV0_REG 0x04
229#define C9DOF2_I2C_SLV0_CTRL 0x05
230#define C9DOF2_I2C_SLV0_DO 0x06
231#define C9DOF2_I2C_SLV1_ADR 0x07
232#define C9DOF2_I2C_SLV1_REG 0x08
233#define C9DOF2_I2C_SLV1_CTRL 0x09
234#define C9DOF2_I2C_SLV1_DO 0x0A
235#define C9DOF2_I2C_SLV2_ADR 0x0B
236#define C9DOF2_I2C_SLV2_REG 0x0C
237#define C9DOF2_I2C_SLV2_CTRL 0x0D
238#define C9DOF2_I2C_SLV2_DO 0x0E
239#define C9DOF2_I2C_SLV3_ADR 0x0F
240#define C9DOF2_I2C_SLV3_REG 0x10
241#define C9DOF2_I2C_SLV3_CTRL 0x11
242#define C9DOF2_I2C_SLV3_DO 0x12
243#define C9DOF2_I2C_SLV4_ADR 0x13
244#define C9DOF2_I2C_SLV4_REG 0x14
245#define C9DOF2_I2C_SLV4_CTRL 0x15
246#define C9DOF2_I2C_SLV4_DO 0x16
247#define C9DOF2_I2C_SLV4_DI 0x17
254#define C9DOF2_REG_BANK_0 0x00
255#define C9DOF2_REG_BANK_1 0x10
256#define C9DOF2_REG_BANK_2 0x20
257#define C9DOF2_REG_BANK_3 0x30
264#define C9DOF2_USER_CTL_DMP_EN 0x80
265#define C9DOF2_USER_CTL_FIFO_EN 0x40
266#define C9DOF2_USER_CTL_I2C_MST_EN 0x20
267#define C9DOF2_USER_CTL_I2C_IF_DIS 0x10
268#define C9DOF2_USER_CTL_DMP_RST 0x08
269#define C9DOF2_USER_CTL_SRAM_RST 0x04
270#define C9DOF2_USER_CTL_I2C_MST_RST 0x02
277#define C9DOF2_LP_CFG_I2C_MST_CYC 0x80
278#define C9DOF2_LP_CFG_ACCEL_CYC 0x40
279#define C9DOF2_LP_CFG_GYRO_CYC 0x20
286#define C9DOF2_PWR_MGMT_1_DEV_RST 0x80
287#define C9DOF2_PWR_MGMT_1_SLP 0x40
288#define C9DOF2_PWR_MGMT_1_LP_EN 0x20
289#define C9DOF2_PWR_MGMT_1_TEMP_DIS 0x08
290#define C9DOF2_PWR_MGMT_1_CLKSEL_7 0x07
291#define C9DOF2_PWR_MGMT_1_CLKSEL_6 0x06
292#define C9DOF2_PWR_MGMT_1_CLKSEL_5 0x05
293#define C9DOF2_PWR_MGMT_1_CLKSEL_4 0x04
294#define C9DOF2_PWR_MGMT_1_CLKSEL_3 0x03
295#define C9DOF2_PWR_MGMT_1_CLKSEL_2 0x02
296#define C9DOF2_PWR_MGMT_1_CLKSEL_1 0x01
297#define C9DOF2_PWR_MGMT_1_CLKSEL_0 0x00
304#define C9DOF2_PWR_MGMT_2_DIS_XA 0x20
305#define C9DOF2_PWR_MGMT_2_DIS_YA 0x10
306#define C9DOF2_PWR_MGMT_2_DIS_ZA 0x08
307#define C9DOF2_PWR_MGMT_2_DIS_XG 0x04
308#define C9DOF2_PWR_MGMT_2_DIS_YG 0x02
309#define C9DOF2_PWR_MGMT_2_DIS_ZG 0x01
316#define C9DOF2_INT_PIN_CFG_ACTL 0x80
317#define C9DOF2_INT_PIN_CFG_OPEN 0x40
318#define C9DOF2_INT_PIN_CFG_LATCH_INT_EN 0x20
319#define C9DOF2_INT_PIN_CFG_INT_ANYRD_2CLR 0x10
320#define C9DOF2_INT_PIN_CFG_ACTL_FSYNC 0x08
321#define C9DOF2_INT_PIN_CFG_FSYNC_INT_MODE_EN 0x04
322#define C9DOF2_INT_PIN_CFG_BYPASS_EN 0x02
329#define C9DOF2_INT_ENABLE_REG_WOF_EN 0x80
330#define C9DOF2_INT_ENABLE_WOM_INT_EN 0x08
331#define C9DOF2_INT_ENABLE_PLL_RDY_EN 0x04
332#define C9DOF2_INT_ENABLE_FIFO_OVF_EN 0x10
333#define C9DOF2_INT_ENABLE_DMP_INT1_EN 0x04
334#define C9DOF2_INT_ENABLE_I2C_MST_INT_EN 0x01
341#define C9DOF2_INT_EN_1_RAW_DATA_0_RDY_EN 0x01
348#define C9DOF2_INT_EN_2_FIFO_OVERFLOW_EN 0x1F
355#define C9DOF2_INT_ENABLE_3_FIFO_WM_EN 0x1F
362#define C9DOF2_I2C_MST_STAT_PASS_THROUGH 0x80
363#define C9DOF2_I2C_MST_STAT_I2C_SLV4_DONE 0x40
364#define C9DOF2_I2C_MST_STAT_I2C_LOST_ARB 0x20
365#define C9DOF2_I2C_MST_STAT_I2C_SLV4_NACK 0x10
366#define C9DOF2_I2C_MST_STAT_I2C_SLV3_NACK 0x08
367#define C9DOF2_I2C_MST_STAT_I2C_SLV2_NACK 0x04
368#define C9DOF2_I2C_MST_STAT_I2C_SLV1_NACK 0x02
369#define C9DOF2_I2C_MST_STAT_I2C_SLV0_NACK 0x01
376#define C9DOF2_INT_STAT_WOM_INT 0x80
377#define C9DOF2_INT_STAT_PLL_RDY_INT 0x40
378#define C9DOF2_INT_STAT_DMP_INT1 0x20
379#define C9DOF2_INT_STAT_I2C_MST_INT 0x10
386#define C9DOF2_INT_STAT_1_RAW_DATA_0_RDY_EN 0x01
393#define C9DOF2_INT_STAT_2_FIFO_OWF_EN 0x1F
400#define C9DOF2_INT_STAT_3_FIFO_WM_EN 0x1F
407#define C9DOF2_FIFO_EN_1_SLV_3_FIFO_EN 0x08
408#define C9DOF2_FIFO_EN_1_SLV_2_FIFO_EN 0x04
409#define C9DOF2_FIFO_EN_1_SLV_1_FIFO_EN 0x02
410#define C9DOF2_FIFO_EN_1_SLV_0_FIFO_EN 0x01
417#define C9DOF2_FIFO_EN_2_ACCEL_FIFO_EN 0x10
418#define C9DOF2_FIFO_EN_2_GYRO_Z_FIFO_EN 0x08
419#define C9DOF2_FIFO_EN_2_GYRO_Y_FIFO_EN 0x04
420#define C9DOF2_FIFO_EN_2_GYRO_X_FIFO_EN 0x02
421#define C9DOF2_FIFO_EN_2_TEMP_FIFO_EN 0x01
428#define C9DOF2_FIFO_CFG_CMD 0x01
435#define C9DOF2_GYRO_CFG_1_DLPFCFG_7 0x38
436#define C9DOF2_GYRO_CFG_1_DLPFCFG_6 0x30
437#define C9DOF2_GYRO_CFG_1_DLPFCFG_5 0x28
438#define C9DOF2_GYRO_CFG_1_DLPFCFG_4 0x20
439#define C9DOF2_GYRO_CFG_1_DLPFCFG_3 0x18
440#define C9DOF2_GYRO_CFG_1_DLPFCFG_2 0x10
441#define C9DOF2_GYRO_CFG_1_DLPFCFG_1 0x08
442#define C9DOF2_GYRO_CFG_1_DLPFCFG_0 0x00
443#define C9DOF2_GYRO_CFG_1_FS_SEL_2000 0x06
444#define C9DOF2_GYRO_CFG_1_FS_SEL_1000 0x04
445#define C9DOF2_GYRO_CFG_1_FS_SEL_500 0x02
446#define C9DOF2_GYRO_CFG_1_FS_SEL_250 0x00
447#define C9DOF2_GYRO_CFG_1_FCHOICE_EN 0x01
448#define C9DOF2_GYRO_CFG_1_FCHOICE_BP 0x00
455#define C9DOF2_GYRO_CFG_2_XGYRO_CTEN 0x20
456#define C9DOF2_GYRO_CFG_2_YGYRO_CTEN 0x10
457#define C9DOF2_GYRO_CFG_2_ZGYRO_CTEN 0x08
458#define C9DOF2_GYRO_CFG_2_AVGCFG_7 0x07
459#define C9DOF2_GYRO_CFG_2_AVGCFG_6 0x06
460#define C9DOF2_GYRO_CFG_2_AVGCFG_5 0x05
461#define C9DOF2_GYRO_CFG_2_AVGCFG_4 0x04
462#define C9DOF2_GYRO_CFG_2_AVGCFG_3 0x03
463#define C9DOF2_GYRO_CFG_2_AVGCFG_2 0x02
464#define C9DOF2_GYRO_CFG_2_AVGCFG_1 0x01
465#define C9DOF2_GYRO_CFG_2_AVGCFG_0 0x00
472#define C9DOF2_ODR_ALIGN_CMD_EN 0x01
473#define C9DOF2_ODR_ALIGN_CMD_DIS 0x00
480#define C9DOF2_ACCEL_INTEL_CTL_INTEL_EN 0x02
481#define C9DOF2_ACCEL_INTEL_CTL_INTEL_MODE_INT_CURR 0x01
482#define C9DOF2_ACCEL_INTEL_CTL_INTEL_MODE_INT_INIT 0x00
489#define C9DOF2_ACCEL_CFG_DLPFCFG_7 0x38
490#define C9DOF2_ACCEL_CFG_DLPFCFG_6 0x30
491#define C9DOF2_ACCEL_CFG_DLPFCFG_5 0x28
492#define C9DOF2_ACCEL_CFG_DLPFCFG_4 0x20
493#define C9DOF2_ACCEL_CFG_DLPFCFG_3 0x18
494#define C9DOF2_ACCEL_CFG_DLPFCFG_2 0x10
495#define C9DOF2_ACCEL_CFG_DLPFCFG_1 0x08
496#define C9DOF2_ACCEL_CFG_DLPFCFG_0 0x00
497#define C9DOF2_ACCEL_CFG_FS_SEL_16G 0x06
498#define C9DOF2_ACCEL_CFG_FS_SEL_8G 0x04
499#define C9DOF2_ACCEL_CFG_FS_SEL_4G 0x02
500#define C9DOF2_ACCEL_CFG_FS_SEL_2G 0x00
501#define C9DOF2_ACCEL_CFG_FCHOICE_EN 0x01
502#define C9DOF2_ACCEL_CFG_FCHOICE_BP 0x00
509#define C9DOF2_ACCEL_2_CFG_AX_ST_EN_REG 0x10
510#define C9DOF2_ACCEL_2_CFG_AY_ST_EN_REG 0x08
511#define C9DOF2_ACCEL_2_CFG_AZ_ST_EN_REG 0x04
512#define C9DOF2_ACCEL_2_CFG_DEC3_CFG_32 0x03
513#define C9DOF2_ACCEL_2_CFG_DEC3_CFG_16 0x02
514#define C9DOF2_ACCEL_2_CFG_DEC3_CFG_8 0x01
515#define C9DOF2_ACCEL_2_CFG_DEC3_CFG_4 0x00
516#define C9DOF2_ACCEL_2_CFG_DEC3_CFG_1 0x00
523#define C9DOF2_FSYNC_CFG_DELAY_TIME_EN 0x80
524#define C9DOF2_FSYNC_CFG_WOF_DEGLITCH_EN 0x40
525#define C9DOF2_FSYNC_CFG_WOF_EDGE_INT 0x20
526#define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_ACCEL_ZOUT_L 0x07
527#define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_ACCEL_YOUT_L 0x06
528#define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_ACCEL_XOUT_L 0x05
529#define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_GYRO_ZOUT_L 0x04
530#define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_GYRO_YOUT_L 0x03
531#define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_GYRO_XOUT_L 0x02
532#define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_TEMP_OUT_L 0x01
533#define C9DOF2_FSYNC_CFG_EXT_SYNC_SET_DIS 0x00
540#define C9DOF2_TEMP_CFG_DLPFCFG_7 0x07
541#define C9DOF2_TEMP_CFG_DLPFCFG_6 0x06
542#define C9DOF2_TEMP_CFG_DLPFCFG_5 0x05
543#define C9DOF2_TEMP_CFG_DLPFCFG_4 0x04
544#define C9DOF2_TEMP_CFG_DLPFCFG_3 0x03
545#define C9DOF2_TEMP_CFG_DLPFCFG_2 0x02
546#define C9DOF2_TEMP_CFG_DLPFCFG_1 0x01
547#define C9DOF2_TEMP_CFG_DLPFCFG_0 0x00
554#define C9DOF2_MOD_CTRL_USR_REG_LP_DMP_EN 0x01
555#define C9DOF2_MOD_CTRL_USR_REG_LP_DMP_DIS 0x00
562#define C9DOF2_CNTL2_MODE_SELF_TEST 0x10
563#define C9DOF2_CNTL2_MODE_CONT_MEAS_4 0x08
564#define C9DOF2_CNTL2_MODE_CONT_MEAS_3 0x06
565#define C9DOF2_CNTL2_MODE_CONT_MEAS_2 0x04
566#define C9DOF2_CNTL2_MODE_CONT_MEAS_1 0x02
567#define C9DOF2_CNTL2_MODE_ONE_SHOT 0x01
568#define C9DOF2_CNTL2_MODE_POW_DOWN 0x00
575#define C9DOF2_CNTL3_SOFT_RST 0x01
582#define C9DOF2_WHO_AM_I_ICM20948_VAL 0xEA
589#define C9DOF2_GYRO_SENS_FS_SEL_2000 16.4
590#define C9DOF2_GYRO_SENS_FS_SEL_1000 32.8
591#define C9DOF2_GYRO_SENS_FS_SEL_500 65.5
592#define C9DOF2_GYRO_SENS_FS_SEL_250 131.0
593#define C9DOF2_ACCEL_SENS_FS_SEL_16G 2048.0
594#define C9DOF2_ACCEL_SENS_FS_SEL_8G 4096.0
595#define C9DOF2_ACCEL_SENS_FS_SEL_4G 8192.0
596#define C9DOF2_ACCEL_SENS_FS_SEL_2G 16384.0
603#define C9DOF2_POWER_ON 0x01
604#define C9DOF2_POWER_OFF 0x00
611#define C9DOF2_SNC_LOW 0x00
612#define C9DOF2_SNC_HIGH 0x01
619#define C9DOF2_READ_BIT_MASK 0x80
620#define C9DOF2_WRITE_BIT_MASK 0x7F
#define C9DOF2_RETVAL
Definition c9dof2.h:81
uint8_t c9dof2_check_int(c9dof2_t *ctx)
Check Interrupt state function.
void c9dof2_angular_rate(c9dof2_t *ctx, float *x_ang_rte, float *y_ang_rte, float *z_ang_rte)
Read Angular Rate function.
C9DOF2_RETVAL c9dof2_init(c9dof2_t *ctx, c9dof2_cfg_t *cfg)
Initialization function.
void c9dof2_def_settings(c9dof2_t *ctx)
Default settings function.
void c9dof2_acceleration_rate(c9dof2_t *ctx, float *x_accel_rte, float *y_accel_rte, float *z_accel_rte)
Read acceleration Rate function.
void c9dof2_snc_pin(c9dof2_t *ctx, uint8_t state)
FSYNC Pin State function.
void c9dof2_read_accelerometer(c9dof2_t *ctx, int16_t *accel_x, int16_t *accel_y, int16_t *accel_z)
Read accelerometer data function.
void c9dof2_read_gyroscope(c9dof2_t *ctx, int16_t *gyro_x, int16_t *gyro_y, int16_t *gyro_z)
Read gyroscope data function.
void c9dof2_cfg_setup(c9dof2_cfg_t *cfg)
Config Object Initialization function.
void c9dof2_dev_rst(c9dof2_t *ctx)
Device Reset function.
int16_t c9dof2_read_data(c9dof2_t *ctx, uint8_t reg)
Read Data function.
void c9dof2_write_data(c9dof2_t *ctx, uint8_t reg, int16_t wr_data)
Write Data function.
float c9dof2_read_temperature(c9dof2_t *ctx, float temp_offs)
Read temperture function.
void c9dof2_power(c9dof2_t *ctx, uint8_t on_off)
Power up function.
uint8_t c9dof2_read_byte(c9dof2_t *ctx, uint8_t reg)
Read Byte function.
void c9dof2_write_byte(c9dof2_t *ctx, uint8_t reg, uint8_t wr_data)
Write Byte function.
Click configuration structure definition.
Definition c9dof2.h:654
spi_master_chip_select_polarity_t cs_polarity
Definition c9dof2.h:671
pin_name_t sck
Definition c9dof2.h:659
spi_master_mode_t spi_mode
Definition c9dof2.h:670
pin_name_t mosi
Definition c9dof2.h:658
uint32_t spi_speed
Definition c9dof2.h:669
pin_name_t snc
Definition c9dof2.h:664
pin_name_t int_pin
Definition c9dof2.h:665
pin_name_t miso
Definition c9dof2.h:657
pin_name_t cs
Definition c9dof2.h:660
Click ctx object definition.
Definition c9dof2.h:633
digital_out_t cs
Definition c9dof2.h:637
spi_master_t spi
Definition c9dof2.h:645
digital_in_t int_pin
Definition c9dof2.h:641
digital_out_t snc
Definition c9dof2.h:636
pin_name_t chip_select
Definition c9dof2.h:646