hw_eth.h

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#ifndef _HW_ETH_H_
#define _HW_ETH_H_
 
#ifdef __cplusplus
extern "C"{
#endif
 
#include "mcu.h"
#include "net.h"
#ifdef STM32F4
#include "stm32f4xx_hal_rcc.h"
#include "stm32f4xx_hal_gpio.h"
#elif defined STM32F7
#include "stm32f7xx_hal_rcc.h"
#include "stm32f7xx_hal_gpio.h"
#endif
 
static inline void hw_eth_init(void);
 
void stm32f4xxEthInitGpio(NetInterface *interface) {
    hw_eth_init();
}
 
void stm32f7xxEthInitGpio(NetInterface *interface) {
    hw_eth_init();
}
 
static inline void hw_eth_init(void) {
    GPIO_InitTypeDef GPIO_InitStructure;
 
    //Enable SYSCFG clock
    __HAL_RCC_SYSCFG_CLK_ENABLE();
 
    //Enable GPIO clocks
    __HAL_RCC_GPIOA_CLK_ENABLE();
    __HAL_RCC_GPIOC_CLK_ENABLE();
    __HAL_RCC_GPIOG_CLK_ENABLE();
 
    //Configure MCO (PA8) as an output
    GPIO_InitStructure.Pin = GPIO_PIN_8;
    GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStructure.Pull = GPIO_NOPULL;
    GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_HIGH;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
 
    //Select RMII interface mode
    SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;
 
    //Configure RMII pins
    GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStructure.Pull = GPIO_NOPULL;
    GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
    GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
 
    //Configure ETH_RMII_REF_CLK (PA1), ETH_MDIO (PA2) and ETH_RMII_CRS_DV (PA7)
    GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
    HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
 
    //Configure ETH_RMII_TX_EN (PG11), ETH_RMII_TXD0 (PG13) and ETH_RMII_TXD1 (PG14)
    GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
    HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
 
    //Configure ETH_MDC (PC1), ETH_RMII_RXD0 (PC4) and ETH_RMII_RXD1 (PC5)
    GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
    HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
 
    #ifdef STM32F4
    //Configure MCO1 pin to output the PLL clock divided by 3 (150/3=50MHz)
    HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_PLLCLK, RCC_MCODIV_3);
    #elif defined STM32F7
    //Configure MCO1 pin to output the PLL clock divided by 4 (200/4=50MHz)
    HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_PLLCLK, RCC_MCODIV_4);
    #endif
}
 
 // ethernet
 // middleware
 
#ifdef __cplusplus
}
#endif
 
#endif // _HW_ETH_H_
// ------------------------------------------------------------------------- END