mikroSDK Reference Manual
usb_hw.h
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45#ifndef _USB_HW_H_
46#define _USB_HW_H_
47
48#ifdef __cplusplus
49extern "C"{
50#endif
51
52#include "mcu.h"
53#include "interrupts.h"
54// Note: Added for MikroE implementation.
55// MikroE interrupt source uses NVIC -> (IRQx + 16).
56#define NVIC_EnableIRQ(_x) interrupt_enable(_x + 16)
57#define NVIC_DisableIRQ(_x) interrupt_disable(_x + 16)
58
73// Clock value in Hz provided externally.
74extern volatile uint32_t SystemCoreClock;
75
83static inline void usb_hw_init(void) {
84 // Enable clock for PORT_A.
85 RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN;
86 // System Clock Configuration Clock enable.
87 RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
88 // Enable access to the backup domain.
89 PWR->CR1 |= PWR_CR1_DBP;
97 GPIOA->PUPDR = 0x64000000UL;
98 GPIOA->OSPEEDR = 0xFC00000UL;
99 GPIOA->OTYPER = 0UL;
100 GPIOA->AFR[1] = 0xAA000;
101 GPIOA->MODER = 0xAAB3FFFFUL;
102 // Enable VDDUSB.
103 if (!(RCC->APB1ENR1 & RCC_APB1ENR1_PWREN)) {
104 RCC->APB1ENR1 |= RCC_APB1ENR1_PWREN;
105 PWR->CR2 |= PWR_CR2_USV;
106 RCC->APB1ENR1 &= ~RCC_APB1ENR1_PWREN;
107 } else {
108 PWR->CR2 |= PWR_CR2_USV;
109 }
110 #ifdef RCC_CRRCR_HSI48ON
111 // Turn HSI48 on. Only for L496/L4A6 devices.
112 RCC->CRRCR |= RCC_CRRCR_HSI48ON;
113 // Wait for HSI48 to stabilize.
114 while(!(RCC->CRRCR & RCC_CRRCR_HSI48RDY));
115 // Select HSI48 as USB clock source.
116 RCC->CCIPR &= ~RCC_CCIPR_CLK48SEL;
117 #endif
118 // USB_OTG_FS Clock enable.
119 #ifdef RCC_AHB2ENR_OTGFSEN
120 RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
121 #else
122 RCC->APB1ENR1 |= RCC_APB1ENR1_USBFSEN;
123 #endif
124}
125
126 // usb
127 // middleware
128
129#ifdef __cplusplus
130}
131#endif
132
133#endif // _USB_HW_H_
134// ------------------------------------------------------------------------- END
#define GPIOA
Definition MK60D10.h:6910
#define PWR_CR1_DBP
Definition stm32f745xx.h:9512