27#ifndef _TUSB_CDC_HOST_H_
28#define _TUSB_CDC_HOST_H_
41#ifndef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
42#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM 0
51#ifndef CFG_TUH_CDC_RX_BUFSIZE
52#define CFG_TUH_CDC_RX_BUFSIZE USBH_EPSIZE_BULK_MAX
56#ifndef CFG_TUH_CDC_RX_EPSIZE
57#define CFG_TUH_CDC_RX_EPSIZE USBH_EPSIZE_BULK_MAX
61#ifndef CFG_TUH_CDC_TX_BUFSIZE
62#define CFG_TUH_CDC_TX_BUFSIZE USBH_EPSIZE_BULK_MAX
66#ifndef CFG_TUH_CDC_TX_EPSIZE
67#define CFG_TUH_CDC_TX_EPSIZE USBH_EPSIZE_BULK_MAX
76uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num);
83bool tuh_cdc_mounted(uint8_t idx);
86bool tuh_cdc_get_dtr(uint8_t idx);
89bool tuh_cdc_get_rts(uint8_t idx);
92TU_ATTR_ALWAYS_INLINE
static inline bool tuh_cdc_connected(uint8_t idx)
94 return tuh_cdc_get_dtr(idx);
108uint32_t tuh_cdc_write_available(uint8_t idx);
111uint32_t tuh_cdc_write(uint8_t idx,
void const* buffer, uint32_t bufsize);
114uint32_t tuh_cdc_write_flush(uint8_t idx);
117bool tuh_cdc_write_clear(uint8_t idx);
124uint32_t tuh_cdc_read_available(uint8_t idx);
127uint32_t tuh_cdc_read (uint8_t idx,
void* buffer, uint32_t bufsize);
130bool tuh_cdc_peek(uint8_t idx, uint8_t* ch);
133bool tuh_cdc_read_clear (uint8_t idx);
146bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
149bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
153bool tuh_cdc_set_line_coding(uint8_t idx,
cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
161TU_ATTR_ALWAYS_INLINE
static inline
162bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
164 return tuh_cdc_set_control_line_state(idx, CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS, complete_cb, user_data);
168TU_ATTR_ALWAYS_INLINE
static inline
169bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
171 return tuh_cdc_set_control_line_state(idx, 0x00, complete_cb, user_data);
180TU_ATTR_WEAK
extern void tuh_cdc_mount_cb(uint8_t idx);
183TU_ATTR_WEAK
extern void tuh_cdc_umount_cb(uint8_t idx);
186TU_ATTR_WEAK
extern void tuh_cdc_rx_cb(uint8_t idx);
189TU_ATTR_WEAK
extern void tuh_cdc_tx_complete_cb(uint8_t idx);
194void cdch_init (
void);
195bool cdch_open (uint8_t rhport, uint8_t dev_addr,
tusb_desc_interface_t const *itf_desc, uint16_t max_len);
196bool cdch_set_config (uint8_t dev_addr, uint8_t itf_num);
197bool cdch_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
198void cdch_close (uint8_t dev_addr);
AUDIO Channel Cluster Descriptor (4.1)
Definition audio.h:647