27#ifndef _TUSB_DWC2_BCM_H_
28#define _TUSB_DWC2_BCM_H_
34#include "broadcom/defines.h"
35#include "broadcom/interrupts.h"
36#include "broadcom/caches.h"
42 { .reg_base = USB_OTG_GLOBAL_BASE, .irqnum = USB_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 4096 }
45#define dcache_clean(_addr, _size) data_clean(_addr, _size)
46#define dcache_invalidate(_addr, _size) data_invalidate(_addr, _size)
47#define dcache_clean_invalidate(_addr, _size) data_clean_and_invalidate(_addr, _size)
50static inline void dwc2_dcd_int_enable(uint8_t rhport)
52 BP_EnableIRQ(_dwc2_controller[rhport].irqnum);
56static inline void dwc2_dcd_int_disable (uint8_t rhport)
58 BP_DisableIRQ(_dwc2_controller[rhport].irqnum);
61static inline void dwc2_remote_wakeup_delay(
void)
68static inline void dwc2_phy_init(
dwc2_regs_t * dwc2, uint8_t hs_phy_type)
77static inline void dwc2_phy_update(
dwc2_regs_t * dwc2, uint8_t hs_phy_type)
Definition dwc2_type.h:28
Definition dwc2_type.h:191