mikroSDK Reference Manual
dwc2_bcm.h
1/*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2021, Ha Thach (tinyusb.org)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 * This file is part of the TinyUSB stack.
25 */
26
27#ifndef _TUSB_DWC2_BCM_H_
28#define _TUSB_DWC2_BCM_H_
29
30#ifdef __cplusplus
31 extern "C" {
32#endif
33
34#include "broadcom/defines.h"
35#include "broadcom/interrupts.h"
36#include "broadcom/caches.h"
37
38#define DWC2_EP_MAX 8
39
40static const dwc2_controller_t _dwc2_controller[] =
41{
42 { .reg_base = USB_OTG_GLOBAL_BASE, .irqnum = USB_IRQn, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 4096 }
43};
44
45#define dcache_clean(_addr, _size) data_clean(_addr, _size)
46#define dcache_invalidate(_addr, _size) data_invalidate(_addr, _size)
47#define dcache_clean_invalidate(_addr, _size) data_clean_and_invalidate(_addr, _size)
48
49TU_ATTR_ALWAYS_INLINE
50static inline void dwc2_dcd_int_enable(uint8_t rhport)
51{
52 BP_EnableIRQ(_dwc2_controller[rhport].irqnum);
53}
54
55TU_ATTR_ALWAYS_INLINE
56static inline void dwc2_dcd_int_disable (uint8_t rhport)
57{
58 BP_DisableIRQ(_dwc2_controller[rhport].irqnum);
59}
60
61static inline void dwc2_remote_wakeup_delay(void)
62{
63 // try to delay for 1 ms
64 // TODO implement later
65}
66
67// MCU specific PHY init, called BEFORE core reset
68static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
69{
70 (void) dwc2;
71 (void) hs_phy_type;
72
73 // nothing to do
74}
75
76// MCU specific PHY update, it is called AFTER init() and core reset
77static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
78{
79 (void) dwc2;
80 (void) hs_phy_type;
81
82 // nothing to do
83}
84
85#ifdef __cplusplus
86 }
87#endif
88
89#endif
Definition dwc2_type.h:28
Definition dwc2_type.h:191