mikroSDK Reference Manual

Topics

 Freeze Unfreeze Peripherals in Debug mode
 Freeze/Unfreeze Peripherals in Debug mode Note: On devices STM32F10xx8 and STM32F10xxB, STM32F101xC/D/E and STM32F103xC/D/E, STM32F101xF/G and STM32F103xF/G STM32F10xx4 and STM32F10xx6 Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in debug mode (not accessible by the user software in normal mode). Refer to errata sheet of these devices for more details.
 
 HAL Private Macros
 
 HAL_Exported_Functions
 

Macros

#define __HAL_DBGMCU_FREEZE_TIM2()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
 Freeze/Unfreeze Peripherals in Debug mode.
 
#define __HAL_DBGMCU_FREEZE_TIM3()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM4()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM5()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM6()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM7()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM12()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM13()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM14()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
 
#define __HAL_DBGMCU_FREEZE_RTC()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
 
#define __HAL_DBGMCU_FREEZE_WWDG()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
 
#define __HAL_DBGMCU_FREEZE_IWDG()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
 
#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_CAN1()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
 
#define __HAL_DBGMCU_FREEZE_CAN2()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM1()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM8()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM9()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM10()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM11()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM2()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM3()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM4()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM5()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM6()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM7()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM12()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM13()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM14()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_RTC()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_WWDG()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_IWDG()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_CAN1()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_CAN2()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM1()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM8()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM9()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM10()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM11()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
 
#define __HAL_SYSCFG_REMAPMEMORY_FLASH()   (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
 Main Flash memory mapped at 0x00000000.
 
#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH()
 System Flash memory mapped at 0x00000000.
 
#define __HAL_SYSCFG_REMAPMEMORY_SRAM()
 Embedded SRAM mapped at 0x00000000.
 
#define __HAL_SYSCFG_REMAPMEMORY_FSMC()
 FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000.
 
#define __HAL_DBGMCU_FREEZE_TIM2()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
 Freeze/Unfreeze Peripherals in Debug mode.
 
#define __HAL_DBGMCU_FREEZE_TIM3()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM4()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM5()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM6()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM7()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM12()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM13()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM14()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
 
#define __HAL_DBGMCU_FREEZE_RTC()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
 
#define __HAL_DBGMCU_FREEZE_WWDG()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
 
#define __HAL_DBGMCU_FREEZE_IWDG()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
 
#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_CAN1()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
 
#define __HAL_DBGMCU_FREEZE_CAN2()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM1()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM8()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM9()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM10()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM11()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM2()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM3()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM4()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM5()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM6()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM7()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM12()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM13()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM14()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_RTC()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_WWDG()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_IWDG()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_CAN1()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_CAN2()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM1()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM8()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM9()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM10()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM11()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
 
#define __HAL_SYSCFG_REMAPMEMORY_FLASH()   (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
 Main Flash memory mapped at 0x00000000.
 
#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH()
 System Flash memory mapped at 0x00000000.
 
#define __HAL_SYSCFG_REMAPMEMORY_SRAM()
 Embedded SRAM mapped at 0x00000000.
 
#define __HAL_DBGMCU_FREEZE_TIM2()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
 Freeze/Unfreeze Peripherals in Debug mode.
 
#define __HAL_DBGMCU_FREEZE_TIM3()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM4()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM5()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM6()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM7()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM12()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM13()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM14()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
 
#define __HAL_DBGMCU_FREEZE_LPTIM1()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))
 
#define __HAL_DBGMCU_FREEZE_RTC()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
 
#define __HAL_DBGMCU_FREEZE_WWDG()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
 
#define __HAL_DBGMCU_FREEZE_IWDG()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
 
#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_I2C4_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_FREEZE_CAN1()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
 
#define __HAL_DBGMCU_FREEZE_CAN2()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM1()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM8()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM9()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM10()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
 
#define __HAL_DBGMCU_FREEZE_TIM11()   (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM2()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM3()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM4()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM5()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM6()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM7()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM12()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM13()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM14()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_LPTIM1()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_RTC()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_WWDG()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_IWDG()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_I2C4_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))
 
#define __HAL_DBGMCU_UNFREEZE_CAN1()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_CAN2()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM1()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM8()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM9()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM10()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
 
#define __HAL_DBGMCU_UNFREEZE_TIM11()   (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
 
#define __HAL_SYSCFG_REMAPMEMORY_FMC()   (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC))
 FMC (NOR/RAM) mapped at 0x60000000 and SDRAM mapped at 0xC0000000.
 
#define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM()
 FMC/SDRAM mapped at 0x60000000 (NOR/RAM) mapped at 0xC0000000.
 
#define __HAL_SYSCFG_GET_BOOT_MODE()   READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_BOOT)
 Return the memory boot mapping as configured by user.
 

Macro Definition Documentation

◆ __HAL_SYSCFG_GET_BOOT_MODE

#define __HAL_SYSCFG_GET_BOOT_MODE ( )    READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_BOOT)
Return values
Theboot mode as configured by user. The returned value can be one of the following values:
  • SYSCFG_MEM_BOOT_ADD0
  • SYSCFG_MEM_BOOT_ADD1

◆ __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM

#define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM ( )
Value:
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC);\
SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_SWP_FMC_0);\
}while(0);
#define SYSCFG_MEMRMP_SWP_FMC_0
Definition stm32f427xx.h:12783
#define SYSCFG_MEMRMP_SWP_FMC
Definition stm32f427xx.h:12782

◆ __HAL_SYSCFG_REMAPMEMORY_FSMC

#define __HAL_SYSCFG_REMAPMEMORY_FSMC ( )
Value:
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
}while(0);
#define SYSCFG_MEMRMP_MEM_MODE
Definition stm32f207xx.h:11105
#define SYSCFG_MEMRMP_MEM_MODE_1
Definition stm32f207xx.h:11107

◆ __HAL_SYSCFG_REMAPMEMORY_SRAM [1/2]

#define __HAL_SYSCFG_REMAPMEMORY_SRAM ( )
Value:
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
}while(0);
#define SYSCFG_MEMRMP_MEM_MODE_0
Definition stm32f207xx.h:11106

◆ __HAL_SYSCFG_REMAPMEMORY_SRAM [2/2]

#define __HAL_SYSCFG_REMAPMEMORY_SRAM ( )
Value:
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
}while(0);

◆ __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH [1/2]

#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH ( )
Value:
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
}while(0);

◆ __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH [2/2]

#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH ( )
Value:
do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
}while(0);