Macros
#define	__HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE() SET_BIT(CRS->CR, CRS_CR_CEN)
	Enable the oscillator clock for frequency error counter.

#define	__HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_CEN)
	Disable the oscillator clock for frequency error counter.

#define	__HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE() SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)
	Enable the automatic hardware adjustment of TRIM bits.

#define	__HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE() CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)
	Enable or disable the automatic hardware adjustment of TRIM bits.

#define	__HAL_RCC_CRS_RELOADVALUE_CALCULATE(__FTARGET__, __FSYNC__) (((__FTARGET__) / (__FSYNC__)) - 1U)
	Macro to calculate reload value to be set in CRS register according to target and sync frequencies.

Macro Definition Documentation

◆ __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE

#define __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE ( ) CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)

Return values

None

#define __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE ( ) SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN)

Note: When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected.

Return values

None

#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE ( ) CLEAR_BIT(CRS->CR, CRS_CR_CEN)

Return values

None

#define __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE ( ) SET_BIT(CRS->CR, CRS_CR_CEN)

Note: when the CEN bit is set the CRS_CFGR register becomes write-protected.

Return values

None

#define __HAL_RCC_CRS_RELOADVALUE_CALCULATE	(		__FTARGET__,
			__FSYNC__ ) (((__FTARGET__) / (__FSYNC__)) - 1U)

Note: The RELOAD value should be selected according to the ratio between the target frequency and the frequency of the synchronization source after pre-scaling. It is then decreased by one in order to reach the expected synchronization on the zero value. The formula is the following: RELOAD = (fTARGET / fSYNC) -1

Parameters

__FTARGET__	Target frequency (value in Hz)
__FSYNC__	Synchronization signal frequency (value in Hz)

Return values

None