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#define | RCC_LPTIM1CLKSOURCE_PCLK1 ((uint32_t)0x00000000U) |
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#define | RCC_LPTIM1CLKSOURCE_LSI RCC_DCKCFGR2_LPTIM1SEL_0 |
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#define | RCC_LPTIM1CLKSOURCE_HSI RCC_DCKCFGR2_LPTIM1SEL_1 |
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#define | RCC_LPTIM1CLKSOURCE_LSE RCC_DCKCFGR2_LPTIM1SEL |
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#define | RCC_LPTIM1CLKSOURCE_CDPCLK1 (0x00000000U) |
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#define | RCC_LPTIM1CLKSOURCE_PCLK1 RCC_LPTIM1CLKSOURCE_CDPCLK1 |
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#define | RCC_LPTIM1CLKSOURCE_D2PCLK1 RCC_LPTIM1CLKSOURCE_CDPCLK1 |
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#define | RCC_LPTIM1CLKSOURCE_PLL2 RCC_CDCCIP2R_LPTIM1SEL_0 |
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#define | RCC_LPTIM1CLKSOURCE_PLL3 RCC_CDCCIP2R_LPTIM1SEL_1 |
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#define | RCC_LPTIM1CLKSOURCE_LSE (RCC_CDCCIP2R_LPTIM1SEL_0 | RCC_CDCCIP2R_LPTIM1SEL_1) |
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#define | RCC_LPTIM1CLKSOURCE_LSI RCC_CDCCIP2R_LPTIM1SEL_2 |
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#define | RCC_LPTIM1CLKSOURCE_CLKP (RCC_CDCCIP2R_LPTIM1SEL_0 | RCC_CDCCIP2R_LPTIM1SEL_2) |
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