|
|
#define | RCC_LPTIM2CLKSOURCE_SRDPCLK4 (0x00000000U) |
| |
|
#define | RCC_LPTIM2CLKSOURCE_PCLK4 RCC_LPTIM2CLKSOURCE_SRDPCLK4 |
| |
|
#define | RCC_LPTIM2CLKSOURCE_D3PCLK1 RCC_LPTIM2CLKSOURCE_SRDPCLK4 |
| |
|
#define | RCC_LPTIM2CLKSOURCE_PLL2 RCC_SRDCCIPR_LPTIM2SEL_0 |
| |
|
#define | RCC_LPTIM2CLKSOURCE_PLL3 RCC_SRDCCIPR_LPTIM2SEL_1 |
| |
|
#define | RCC_LPTIM2CLKSOURCE_LSE (RCC_SRDCCIPR_LPTIM2SEL_0 | RCC_SRDCCIPR_LPTIM2SEL_1) |
| |
|
#define | RCC_LPTIM2CLKSOURCE_LSI RCC_SRDCCIPR_LPTIM2SEL_2 |
| |
|
#define | RCC_LPTIM2CLKSOURCE_CLKP (RCC_SRDCCIPR_LPTIM2SEL_0 | RCC_SRDCCIPR_LPTIM2SEL_2) |
| |