RCC Extended MCOx Clock Config

Macros
#define	__HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, RCC_CFGR_MCO, (__MCOCLKSOURCE__))
	Macro to configure the MCO clock.
#define	__HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))
	Macro to configure the MCO1 clock.
#define	__HAL_RCC_MCO2_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 3U)));
	Macro to configure the MCO2 clock.
#define	__HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))
	Macro to configure the MCO1 clock.
#define	__HAL_RCC_MCO2_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 3U)));
	Macro to configure the MCO2 clock.
#define	__HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))
	Macro to configure the MCO1 clock.
#define	__HAL_RCC_MCO2_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 3)));
	Macro to configure the MCO2 clock.
#define	__HAL_RCC_MCO1_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))
	Macro to configure the MCO1 clock.
#define	__HAL_RCC_MCO2_CONFIG(__MCOCLKSOURCE__, __MCODIV__)    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 7)));
	Macro to configure the MCO2 clock.

Macro Definition Documentation

__HAL_RCC_MCO1_CONFIG [1/5]

#define __HAL_RCC_MCO1_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, RCC_CFGR_MCO, (__MCOCLKSOURCE__))

Macro to configure the MCO1 clock.

Parameters

__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock RCC_MCO1SOURCE_SYSCLK System clock (SYSCLK) selected as MCO clock RCC_MCO1SOURCE_HSI HSI selected as MCO clock RCC_MCO1SOURCE_HSE HSE selected as MCO clock RCC_MCO1SOURCE_PLLCLK PLL clock divided by 2 selected as MCO clock
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 No division applied on MCO clock source
__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock
__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLL1QCLK: PLL1Q clock selected as MCO1 source RCC_MCO1SOURCE_HSI48: HSI48 (48MHZ) selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO1 clock

__HAL_RCC_MCO1_CONFIG [2/5]

#define __HAL_RCC_MCO1_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))

Parameters

__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock
__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLL1QCLK: PLL1Q clock selected as MCO1 source RCC_MCO1SOURCE_HSI48: HSI48 (48MHZ) selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO1 clock

__HAL_RCC_MCO1_CONFIG [3/5]

#define __HAL_RCC_MCO1_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))

Parameters

__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock
__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLL1QCLK: PLL1Q clock selected as MCO1 source RCC_MCO1SOURCE_HSI48: HSI48 (48MHZ) selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO1 clock

__HAL_RCC_MCO1_CONFIG [4/5]

#define __HAL_RCC_MCO1_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))

Parameters

__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock
__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLL1QCLK: PLL1Q clock selected as MCO1 source RCC_MCO1SOURCE_HSI48: HSI48 (48MHZ) selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO1 clock

__HAL_RCC_MCO1_CONFIG [5/5]

#define __HAL_RCC_MCO1_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), ((__MCOCLKSOURCE__) | (__MCODIV__)))

Parameters

__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source RCC_MCO1SOURCE_PLL1QCLK: PLL1Q clock selected as MCO1 source RCC_MCO1SOURCE_HSI48: HSI48 (48MHZ) selected as MCO1 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO1 clock

__HAL_RCC_MCO2_CONFIG [1/4]

#define __HAL_RCC_MCO2_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 3U)));

Parameters

__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock
__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for all STM32F4 devices except STM32F410xx RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for STM32F410Rx devices RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock

Note

For STM32F410Rx devices, to output I2SCLK clock on MCO2, you should have at least one of the SPI clocks enabled (SPI1, SPI2 or SPI5).

Parameters

__MCOCLKSOURCE__

specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLL2PCLK: PLL2P clock selected as MCO2 source RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: PLL1P clock selected as MCO2 source RCC_MCO2SOURCE_CSICLK: CSI clock selected as MCO2 source RCC_MCO2SOURCE_LSICLK: LSI clock selected as MCO2 source

__MCODIV__

specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO2 clock

__HAL_RCC_MCO2_CONFIG [2/4]

#define __HAL_RCC_MCO2_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 3U)));

Parameters

__MCOCLKSOURCE__

specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for all STM32F4 devices except STM32F410xx RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for STM32F410Rx devices RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source

__MCODIV__

specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock

Note

For STM32F410Rx devices, to output I2SCLK clock on MCO2, you should have at least one of the SPI clocks enabled (SPI1, SPI2 or SPI5).

Parameters

__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock
__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLL2PCLK: PLL2P clock selected as MCO2 source RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: PLL1P clock selected as MCO2 source RCC_MCO2SOURCE_CSICLK: CSI clock selected as MCO2 source RCC_MCO2SOURCE_LSICLK: LSI clock selected as MCO2 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO2 clock

__HAL_RCC_MCO2_CONFIG [3/4]

#define __HAL_RCC_MCO2_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 3)));

Parameters

__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1: no division applied to MCOx clock RCC_MCODIV_2: division by 2 applied to MCOx clock RCC_MCODIV_3: division by 3 applied to MCOx clock RCC_MCODIV_4: division by 4 applied to MCOx clock RCC_MCODIV_5: division by 5 applied to MCOx clock
__MCOCLKSOURCE__	specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLL2PCLK: PLL2P clock selected as MCO2 source RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: PLL1P clock selected as MCO2 source RCC_MCO2SOURCE_CSICLK: CSI clock selected as MCO2 source RCC_MCO2SOURCE_LSICLK: LSI clock selected as MCO2 source
__MCODIV__	specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO2 clock

__HAL_RCC_MCO2_CONFIG [4/4]

#define __HAL_RCC_MCO2_CONFIG	(		__MCOCLKSOURCE__,
			__MCODIV__ )    MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), ((__MCOCLKSOURCE__) | ((__MCODIV__) << 7)));

Parameters

__MCOCLKSOURCE__

specifies the MCO clock source. This parameter can be one of the following values: RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source RCC_MCO2SOURCE_PLL2PCLK: PLL2P clock selected as MCO2 source RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source RCC_MCO2SOURCE_PLLCLK: PLL1P clock selected as MCO2 source RCC_MCO2SOURCE_CSICLK: CSI clock selected as MCO2 source RCC_MCO2SOURCE_LSICLK: LSI clock selected as MCO2 source

__MCODIV__

specifies the MCO clock prescaler. This parameter can be one of the following values: RCC_MCODIV_1 up to RCC_MCODIV_15 : divider applied to MCO2 clock