mikroSDK Reference Manual
Macros
AHB1 Force Release Reset
STM32F1xx_HAL_Driver | STM32F2xx_HAL_Driver | STM32F4xx_HAL_Driver | STM32F7xx_HAL_Driver | STM32H7xx_HAL_Driver » RCC » RCC Exported Macros

Force or release AHB1 peripheral reset. More...

Macros

#define __HAL_RCC_AHB1_FORCE_RESET()   (RCC->AHB1RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_GPIOA_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOARST))
 
#define __HAL_RCC_GPIOB_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOBRST))
 
#define __HAL_RCC_GPIOC_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOCRST))
 
#define __HAL_RCC_GPIOD_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIODRST))
 
#define __HAL_RCC_GPIOE_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOERST))
 
#define __HAL_RCC_GPIOF_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOFRST))
 
#define __HAL_RCC_GPIOG_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOGRST))
 
#define __HAL_RCC_GPIOH_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOHRST))
 
#define __HAL_RCC_GPIOI_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOIRST))
 
#define __HAL_RCC_CRC_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_CRCRST))
 
#define __HAL_RCC_DMA1_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_DMA1RST))
 
#define __HAL_RCC_DMA2_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_DMA2RST))
 
#define __HAL_RCC_USB_OTG_HS_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_OTGHRST))
 
#define __HAL_RCC_OTGHSULPI_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_OTGHSULPIRST))
 
#define __HAL_RCC_AHB1_RELEASE_RESET()   (RCC->AHB1RSTR = 0x00U)
 
#define __HAL_RCC_GPIOA_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOARST))
 
#define __HAL_RCC_GPIOB_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOBRST))
 
#define __HAL_RCC_GPIOC_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOCRST))
 
#define __HAL_RCC_GPIOD_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIODRST))
 
#define __HAL_RCC_GPIOE_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOERST))
 
#define __HAL_RCC_GPIOF_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOFRST))
 
#define __HAL_RCC_GPIOG_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOGRST))
 
#define __HAL_RCC_GPIOH_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOHRST))
 
#define __HAL_RCC_GPIOI_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOIRST))
 
#define __HAL_RCC_CRC_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_CRCRST))
 
#define __HAL_RCC_DMA1_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_DMA1RST))
 
#define __HAL_RCC_DMA2_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_DMA2RST))
 
#define __HAL_RCC_USB_OTG_HS_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_OTGHRST))
 
#define __HAL_RCC_OTGHSULPI_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_OTGHSULPIRST))
 
#define __HAL_RCC_AHB1_FORCE_RESET()   (RCC->AHB1RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_GPIOA_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOARST))
 
#define __HAL_RCC_GPIOB_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOBRST))
 
#define __HAL_RCC_GPIOC_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOCRST))
 
#define __HAL_RCC_GPIOH_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_GPIOHRST))
 
#define __HAL_RCC_DMA1_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_DMA1RST))
 
#define __HAL_RCC_DMA2_FORCE_RESET()   (RCC->AHB1RSTR |= (RCC_AHB1RSTR_DMA2RST))
 
#define __HAL_RCC_AHB1_RELEASE_RESET()   (RCC->AHB1RSTR = 0x00U)
 
#define __HAL_RCC_GPIOA_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOARST))
 
#define __HAL_RCC_GPIOB_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOBRST))
 
#define __HAL_RCC_GPIOC_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOCRST))
 
#define __HAL_RCC_GPIOH_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_GPIOHRST))
 
#define __HAL_RCC_DMA1_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_DMA1RST))
 
#define __HAL_RCC_DMA2_RELEASE_RESET()   (RCC->AHB1RSTR &= ~(RCC_AHB1RSTR_DMA2RST))