mikroSDK Reference Manual
Macros
AHB1 Peripheral Clock Enable Disable Status
STM32F1xx_HAL_Driver | STM32F2xx_HAL_Driver | STM32F4xx_HAL_Driver | STM32F7xx_HAL_Driver | STM32H7xx_HAL_Driver » RCC » RCC Exported Macros

Get the enable or disable status of the AHB1 peripheral clock. More...

Macros

#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)
 
#define __HAL_RCC_GPIOD_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIODEN)) != RESET)
 
#define __HAL_RCC_GPIOE_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOEEN)) != RESET)
 
#define __HAL_RCC_GPIOF_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOFEN)) != RESET)
 
#define __HAL_RCC_GPIOG_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOGEN)) != RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)
 
#define __HAL_RCC_GPIOI_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOIEN)) != RESET)
 
#define __HAL_RCC_CRC_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_CRCEN)) != RESET)
 
#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_BKPSRAMEN)) != RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)
 
#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_OTGHSEN)) != RESET)
 
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_OTGHSULPIEN)) != RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)
 
#define __HAL_RCC_GPIOD_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIODEN)) == RESET)
 
#define __HAL_RCC_GPIOE_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOEEN)) == RESET)
 
#define __HAL_RCC_GPIOF_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOFEN)) == RESET)
 
#define __HAL_RCC_GPIOG_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOGEN)) == RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)
 
#define __HAL_RCC_GPIOI_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOIEN)) == RESET)
 
#define __HAL_RCC_CRC_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_CRCEN)) == RESET)
 
#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_BKPSRAMEN)) == RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)
 
#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_OTGHSEN)) == RESET)
 
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_OTGHSULPIEN)) == RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)
 
#define __HAL_RCC_CRC_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA1EN)) != RESET)
 
#define __HAL_RCC_CRC_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA1EN)) == RESET)