mikroSDK Reference Manual
Macros
APB1 Force Release Reset
STM32F1xx_HAL_Driver | STM32F2xx_HAL_Driver | STM32F4xx_HAL_Driver | STM32F7xx_HAL_Driver | STM32H7xx_HAL_Driver » RCC » RCC Exported Macros

Force or release APB1 peripheral reset. More...

Macros

#define __HAL_RCC_APB1_FORCE_RESET()   (RCC->APB2RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_TIM2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST))
 
#define __HAL_RCC_TIM3_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST))
 
#define __HAL_RCC_WWDG_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST))
 
#define __HAL_RCC_USART2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_USART2RST))
 
#define __HAL_RCC_I2C1_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C1RST))
 
#define __HAL_RCC_BKP_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_BKPRST))
 
#define __HAL_RCC_PWR_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST))
 
#define __HAL_RCC_APB1_RELEASE_RESET()   (RCC->APB1RSTR = 0x00)
 
#define __HAL_RCC_TIM2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM2RST))
 
#define __HAL_RCC_TIM3_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM3RST))
 
#define __HAL_RCC_WWDG_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_WWDGRST))
 
#define __HAL_RCC_USART2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART2RST))
 
#define __HAL_RCC_I2C1_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C1RST))
 
#define __HAL_RCC_BKP_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_BKPRST))
 
#define __HAL_RCC_PWR_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_PWRRST))
 
#define __HAL_RCC_APB1_FORCE_RESET()   (RCC->APB1RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_TIM2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM2RST))
 
#define __HAL_RCC_TIM3_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM3RST))
 
#define __HAL_RCC_TIM4_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM4RST))
 
#define __HAL_RCC_TIM5_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST))
 
#define __HAL_RCC_TIM6_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM6RST))
 
#define __HAL_RCC_TIM7_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM7RST))
 
#define __HAL_RCC_TIM12_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM12RST))
 
#define __HAL_RCC_TIM13_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM13RST))
 
#define __HAL_RCC_TIM14_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM14RST))
 
#define __HAL_RCC_WWDG_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST))
 
#define __HAL_RCC_SPI2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI2RST))
 
#define __HAL_RCC_SPI3_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI3RST))
 
#define __HAL_RCC_USART2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_USART2RST))
 
#define __HAL_RCC_USART3_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_USART3RST))
 
#define __HAL_RCC_UART4_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_UART4RST))
 
#define __HAL_RCC_UART5_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_UART5RST))
 
#define __HAL_RCC_I2C1_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C1RST))
 
#define __HAL_RCC_I2C2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C2RST))
 
#define __HAL_RCC_I2C3_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C3RST))
 
#define __HAL_RCC_CAN1_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN1RST))
 
#define __HAL_RCC_CAN2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_CAN2RST))
 
#define __HAL_RCC_PWR_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST))
 
#define __HAL_RCC_DAC_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_DACRST))
 
#define __HAL_RCC_APB1_RELEASE_RESET()   (RCC->APB1RSTR = 0x00U)
 
#define __HAL_RCC_TIM2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM2RST))
 
#define __HAL_RCC_TIM3_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM3RST))
 
#define __HAL_RCC_TIM4_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM4RST))
 
#define __HAL_RCC_TIM5_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST))
 
#define __HAL_RCC_TIM6_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM6RST))
 
#define __HAL_RCC_TIM7_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM7RST))
 
#define __HAL_RCC_TIM12_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM12RST))
 
#define __HAL_RCC_TIM13_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM13RST))
 
#define __HAL_RCC_TIM14_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM14RST))
 
#define __HAL_RCC_WWDG_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_WWDGRST))
 
#define __HAL_RCC_SPI2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI2RST))
 
#define __HAL_RCC_SPI3_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI3RST))
 
#define __HAL_RCC_USART2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART2RST))
 
#define __HAL_RCC_USART3_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART3RST))
 
#define __HAL_RCC_UART4_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART4RST))
 
#define __HAL_RCC_UART5_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_UART5RST))
 
#define __HAL_RCC_I2C1_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C1RST))
 
#define __HAL_RCC_I2C2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C2RST))
 
#define __HAL_RCC_I2C3_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C3RST))
 
#define __HAL_RCC_CAN1_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN1RST))
 
#define __HAL_RCC_CAN2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_CAN2RST))
 
#define __HAL_RCC_PWR_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_PWRRST))
 
#define __HAL_RCC_DAC_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_DACRST))
 
#define __HAL_RCC_APB1_FORCE_RESET()   (RCC->APB1RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_TIM5_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_TIM5RST))
 
#define __HAL_RCC_WWDG_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST))
 
#define __HAL_RCC_SPI2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_SPI2RST))
 
#define __HAL_RCC_USART2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_USART2RST))
 
#define __HAL_RCC_I2C1_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C1RST))
 
#define __HAL_RCC_I2C2_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_I2C2RST))
 
#define __HAL_RCC_PWR_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST))
 
#define __HAL_RCC_APB1_RELEASE_RESET()   (RCC->APB1RSTR = 0x00U)
 
#define __HAL_RCC_TIM5_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_TIM5RST))
 
#define __HAL_RCC_WWDG_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_WWDGRST))
 
#define __HAL_RCC_SPI2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_SPI2RST))
 
#define __HAL_RCC_USART2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_USART2RST))
 
#define __HAL_RCC_I2C1_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C1RST))
 
#define __HAL_RCC_I2C2_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_I2C2RST))
 
#define __HAL_RCC_PWR_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_PWRRST))
 
#define __HAL_RCC_APB1_FORCE_RESET()   (RCC->APB1RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_WWDG_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_WWDGRST))
 
#define __HAL_RCC_PWR_FORCE_RESET()   (RCC->APB1RSTR |= (RCC_APB1RSTR_PWRRST))
 
#define __HAL_RCC_APB1_RELEASE_RESET()   (RCC->APB1RSTR = 0x00U)
 
#define __HAL_RCC_WWDG_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_WWDGRST))
 
#define __HAL_RCC_PWR_RELEASE_RESET()   (RCC->APB1RSTR &= ~(RCC_APB1RSTR_PWRRST))